Abstract: An integrated circuit includes a memory and processing circuitry. The memory stores an Elementary File Test (EFT) file including a record storing information to update a target elementary file (TGF) in a file system of the EFT. The stored information includes a file path identifier identifying a position of the TGF in the file system of the EFT file, which is a concatenation of a parent file identifier followed by an identifier of the TGF, a first length indicator of a first type of data, the data of the first type, a second length indicator to indicate a length of a second type of data, and the data of the second type. The processing circuitry, in operation, identifies the TGF based on the file path identifier and updates the content of the TGF to include the first data and one or more instances of the second data.

Abstract: A differential piezoelectric actuator-system includes an inductor and driver-circuit having switches for transferring energy between first and second actuators and the inductor, and between a voltage-supply node and the inductor. Control circuitry determines whether a next phase in which to operate the driver-circuit is a first charging-phase or a first recovery-phase. The first charging-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the voltage supply node to the inductor; and a third sub-phase to transfer energy from the inductor to the second actuator. The first recovery-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the inductor to the voltage supply node; and a third sub-phase to transfer energy from the inductor to the second actuator.

Abstract: A BGA package includes an array of electrically conductive balls providing electrical contact for a semiconductor die. A power channel is provided to convey power supply current towards the semiconductor die. The power channel is formed by a stack of electrically conductive planes. The electrically conductive planes are stacked in a stepped arrangement wherein a number of stacked planes in each step of the stack increases in a direction from a distal end to a proximal end of the power channel. Adjacent electrically conductive planes in the stack of the power channel are electrically coupled with electrically conductive vias extending therebetween. Current conduction paths towards the die area thus have resistance values that decrease from the distal end to the proximal end of the power channel.

Abstract: A system for detecting and evaluating environmental quantities and events is formed by a detection and evaluation device and a mobile phone, connected through a wireless connection. The device is enclosed in a containment casing housing a support carrying a plurality of inertial sensors and environmental sensors. A processing unit is coupled to the inertial sensors and to the environmental sensors. A wireless connection unit, is coupled to the processing unit and a wired connection port, is coupled to the processing unit. A programming connector is coupled to the processing unit and is configured to couple to an external programming unit to receive programming instructions of the processing unit. A storage structure is coupled to the processing unit and a power-supply unit supplied power in the detection and evaluation device. The mobile phone stores an application, which enables a basic use mode, an expert use mode, and an advanced use mode.

Abstract: MEMS structure, comprising: a semiconductor body; a cavity buried in the semiconductor body; a membrane suspended on the cavity; and at least one antistiction bump completely contained in the cavity with the function of preventing the side of the membrane internal to the cavity from sticking to the opposite side, which delimits the cavity downwardly.

Abstract: An enhancement mode high electron-mobility transistor (HEMT) device includes a semiconductor body having a top surface and including a heterostructure configured to generate a two-dimensional electron gas, 2DEG. The HEMT device includes a gate structure which extends on the top surface of the semiconductor body, is biasable to electrically control the 2DEG and includes a functional layer and a gate contact in direct physical and electrical contact with each other. The gate contact is of conductive material and the functional layer is of two-dimensional semiconductor material and includes a first doped portion with P-type electrical conductivity, which extends on the top surface of the semiconductor body and is interposed between the semiconductor body and the gate contact along a first axis.

Abstract: MEMS gyroscope, having a first movable mass configured to move with respect to a fixed structure along a first drive direction and along a first sense direction, transverse to the first drive direction; a first drive assembly, coupled to the first movable mass and configured to generate a first alternate drive movement; a first drive elastic structure, coupled to the first movable mass and to the first drive assembly, rigid in the first drive direction and compliant in the first sense direction; a second movable mass, configured to move with respect to the fixed structure in a second drive direction parallel to the first drive direction and in a second sense direction parallel to the first sense direction; a second drive assembly, coupled to the second movable mass and configured to generate a second alternate drive movement in the second drive direction; and a second drive elastic structure, coupled to the second movable mass and to the second drive assembly, rigid in the second drive direction and compliant

Abstract: A driving circuit is implemented for a driving resonator stage of a MEMS gyroscope including at least a first and a second electrode and a movable mass The driving circuit includes a synchronization stage which receives an electrical position signal indicative of the position of the movable mass and generates a reference signal phase- and frequency-locked with the electrical position signal; a driving stage which generates, on the basis of the reference signal, a first and a second driving signal, which are applied to the first and, respectively, the second electrodes, so that the movable mass is subject to a first and a second electrostatic force which cause the movable mass to oscillate.

Abstract: A monitoring circuit performing logical and temporal task monitoring of a plurality of tasks comprises a task recording circuit and a task management circuit receiving as input a plurality of task signals, each task signal being indicative of an execution state of a respective task. The task management circuit comprises a managing circuit configured to operate in at least three modes depending on a respective event corresponding to either detection of a rising edge of a given task signal, occurrence of a trigger signal, or detection of a falling edge of a given task signal being monitored. In each mode the managing circuit is configured to check whether a variable representing the operation state of the task contains an expected value corresponding to the occurrence of the event enabling the respective mode, and output a result of the check operation in an error signal for the given task being monitored.

Abstract: According to an embodiment, a flyback converter includes a transformer, a power switch coupled to the primary winding of the transformer, and a controller. The controller comprises a voltage-dependent current source, a reference capacitor, comparators, and logic circuitry. The controller estimates the primary inductance of the transformer based on the voltage across the reference capacitor, detects a saturation condition based on the estimated inductance and primary current, and implements a protection mechanism in response. The controller can distinguish between genuine overload conditions and potential magnetic tampering attempts. The protection mechanism may involve increasing the switching frequency. The controller may include an adjustable transconductance to set the saturation detection threshold and implement a delay before activating protection. This allows for more targeted protection against core saturation and magnetic interference while maintaining normal operation under high-load conditions.

Abstract: Provided is a DC-DC converter with galvanic isolation comprising a resonant oscillator coupled to a primary winding of a galvanic isolation transformer. A rectifier is coupled to a secondary winding of the transformer to provide an output voltage. The DC-DC converter comprises a regulation loop configured to regulate an output voltage with respect to a reference voltage by controlling a current flowing in the resonant oscillator as a function of a result of a signal indicative of the comparison between the output voltage and the reference voltage. The resonant oscillator is configured to operate at a frequency, in particular tuned at sub-resonant point, in particular sub-harmonic frequency, below a resonance frequency of the resonant oscillator which maximizes a quality factor of the resonant oscillator, in particular below a resonance frequency of a LC tank circuit comprised in the resonant oscillator which maximizes a quality factor of the LC tank circuit.

Abstract: A MOSFET transistor device includes a functional layer of silicon carbide, having a first conductivity type. Gate structures are formed on a top surface of the functional layer and each includes a dielectric region and an electrode region. Body wells having a second conductivity type are formed within the functional layer, and the body wells are separated from one another by surface-separation regions. Source regions having the first conductivity type are formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.

Abstract: A semiconductor chip or die is arranged on a first surface of a thermally conductive die pad of a substrate such as a leadframe. An encapsulation of insulating material in molded onto the die pad having the semiconductor die arranged on the first surface. At the second surface of the die pad, opposite the first surface, the encapsulation borders on the die pad at a borderline around the die pad. A recessed portion of the encapsulation is provided, for example, via laser ablation, at the borderline around the die pad. Thermally conductive material such as metal material is filled in the recessed portion of the encapsulation around the die pad. The surface area of the thermally conductive die pad is augmented by the filling of thermally conductive material in the recessed portion of the encapsulation thus improving thermal performance of the device.

Abstract: Electronic device including: a MEMS sensor device including a functional structure which transduces a chemical or physical quantity into a corresponding electrical quantity; a cap including a semiconductive substrate; and a bonding dielectric region, which mechanically couples the cap to the MEMS sensor device. The cap further includes a conductive region, which extends between the semiconductive substrate and the MEMS sensor device and includes: a first portion, which is arranged laterally with respect to the semiconductive substrate and is exposed, so as to be electrically coupleable to a terminal at a reference potential by a corresponding wire bonding; and a second portion, which contacts the semiconductive substrate.

Abstract: The present disclosure is directed to a voltage regulation circuit receiving as input an input voltage, in particular a DC voltage supply, and outputting a regulated voltage. The voltage regulation circuit includes a voltage reference circuit configured to supply a reference voltage which is independent, in particular with respect to temperature variations. The voltage regulation circuit includes a first circuit branch and a second circuit branch in parallel coupled between the input voltage and ground. The first branch includes a current generator including a first depletion MOSFET transistor, which gate source voltage is a PTAT (Proportional To Absolute Temperature) voltage, coupled between the input voltage and the voltage reference circuit.

Abstract: A process for manufacturing a HEMT device includes forming a conductive region on a work body having a semiconductive heterostructure. To obtain the conductive region, a first reaction region having carbon is formed on the heterostructure and a metal stack is formed having a second reaction region in contact with the first reaction region. The work body is annealed, so that the first reaction region reacts with the second reaction region, thus forming an interface portion of the conductive region. The interface portion is of a compound having carbon and is in ohmic contact with the semiconductive hetero structure.

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.

Abstract: Process for manufacturing a MEMS device, including: forming a dielectric region which coats part of a semiconductive substrate of a first semiconductive wafer; forming a region which is permeable to gases and coats the dielectric region; coupling the first semiconductive wafer to a second semiconductive wafer so as to form a first chamber, which houses a first movable mass and has a pressure equal to a first value, and a second chamber, which houses a second movable mass and has a pressure equal to the first value, the permeable region facing the second chamber; selectively removing a portion of the semiconductor substrate and an underlying portion of the dielectric region, so as to expose a part of the permeable region, so as to allow gas exchanges through the permeable region; placing the first and the second semiconductive wafers in an environment with a pressure equal to a second value, so that the pressure in the second chamber becomes equal to the second value; and subsequently forming, on the exposed p

Abstract: The disclosure pertains to adaptive wake-up threshold generation in variable power supplies, particularly applicable to USB-PD chargers and wireless charging devices with digital controllers. It addresses the problem of power consumption during zero-load conditions in burst mode operation. The invention comprises a circuit with a processor, a GPIO pin, and a wake-up threshold generator. The processor drives a signal generator in burst mode, alternating between wake-up phases and waiting intervals. The GPIO pin is set to different states based on the wake-up threshold's relation to predefined bounds. The wake-up threshold generator adjusts the threshold in response to the GPIO pin's state. This adaptive approach enables efficient power management by allowing deep sleep during waiting times while maintaining responsiveness to varying output voltages, thus improving overall system efficiency in variable power supply applications.

Abstract: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.