Abstract: An embodiment method of processing at least one sensing signal comprising a time-series of signal samples comprises high-pass filtering the time series of signal samples to produce a filtered time series; applying delay embedding processing to the filtered time series; producing a first matrix by storing the set of time-shifted time series as an ordered list of entries in the first matrix; applying a first truncation to produce a second matrix by truncating the entries in the ordered list of entries at one end of the first matrix to remove a number of items equal to the product of the first delay embedding parameter decreased by one times the second delay embedding parameter; applying entry-wise processing to the second matrix, and forwarding a set of estimated kernel densities and/or a set of images generated as a function of the set of estimated kernel densities to a user circuit.

Abstract: In an embodiment a DC-DC switching power converter includes a switching circuitry including switches, the switching circuitry configured to receive a DC input voltage and generate a DC output voltage via switching the switches, a switching control circuitry configured to control switching of the switches with a switching signal having a corresponding switching frequency with a corresponding duty cycle, the DC output voltage generated by the switching circuitry depending on the duty cycle, wherein the switching control circuitry is configured to set the duty cycle based on a difference between the DC output voltage and a reference voltage in a closed loop configuration and a compensation network configured to provide stability to an operation of the DC-DC switching power converter, wherein the compensation network has a capacitance having a value depending on the switching frequency.

Abstract: A direct current (DC) to DC (DC-DC) converter includes a comparator configured to set a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL configured increase the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer configured to selectively output a delayed version of the signal pulse; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit configured to adaptively adjust a precision of the DC-DC converter in accordance with a duty cycle of the DC-DC converter and a setpoint of the DC-DC converter.

Abstract: A memory includes a sequence of memory locations storing a corresponding sequence of state codes that specifying the shape of a waveform. The sequence of state codes is read from the memory and decoded by a long and toggle decoder circuit. The decoding operation generates a sequence of signal codes. When the state code is a long code, the sequence of signal codes includes same signal codes corresponding to a signal level of the waveform. When the state code is a toggle code, the sequence of signal codes includes a first signal code corresponding to one signal level of the waveform and a second signal code corresponding to another signal level of the waveform. A signal decode circuit then decodes the signal codes in the sequence of signal codes to generate the waveform for output which includes the signal levels corresponding to the decoded signal codes.

Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.

Abstract: Disclosed herein is a micro-electro-mechanical mirror device having a fixed structure defining an external frame delimiting a cavity, a tiltable structure extending into the cavity, a reflecting surface carried by the tiltable structure and having a main extension in a horizontal plane, and an actuation structure coupled between the tiltable structure and the fixed structure. The actuation structure is formed by a first pair of actuation arms causing rotation of the tiltable structure around a first axis parallel to the horizontal plane. The actuation arms are elastically coupled to the tiltable structure through elastic coupling elements and are each formed by a bearing structure and a piezoelectric structure. The bearing structure of each actuation arm is formed by a soft region of a first material and the elastic coupling elements are formed by a bearing layer of a second material, the second material having greater stiffness than the first material.

Abstract: Disclosed herein is a system including a power transistor having a first conduction terminal coupled to a supply node, a second conduction terminal coupled to an output node, and a control terminal controlled by a drive signal. The system further includes a driver configured to receive an input voltage from an external component and generate the drive signal based thereupon, and a sense circuit. The sense circuit is configured to, when the power transistor is powering a load coupled to the output node: detect whether the power transistor has entered an overload condition, and if so, determine a duration of time that the power transistor is in the overload condition; and assert a diagnostic signal in response to the duration of time being outside of a time window.

Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.

Abstract: A half bridge switching power stage includes high/low side switches driven in response to a cycle-by-cycle protected driving signal derived from a PWM signal. Signals indicative of detected over-currents at said high/low side switches are processed to output the cycle-by-cycle protected driving signal, when the signal indicative of the detected over-current indicates, during a time interval within which the high/low side switch is turned on, that current flowing in the turned on high/low side switch crosses a given threshold, as an inverted PWM signal by turning off the turned on high/low side switch, and otherwise outputting said cycle-by-cycle protected driving signal as a not inverted PWM signal. An anomaly detection circuit receives the signals indicative of the over-current and switches off both the high/low side switches when an anomaly is detected in a pattern of over-current events in the signals indicative of the over-current.

Abstract: The present disclosure relates to solutions for operating a flyback converter comprising an active clamp. The flyback converter comprises two input terminals and two output terminals. A first electronic switch and the primary winding of a transformer are connected in series between the input terminals. An active clamp circuit is connected in parallel with the primary winding. The active clamp circuit comprises a series connection of a clamp capacitor and a second electronic switch. A third electronic switch and the secondary winding of the transformer are connected in series between the two output terminals. In particular, the present disclosure relates to solutions for switching the first, second and third electronic switch in order to achieve a zero-voltage switching of the first electronic switch.

Abstract: Disclosed herein is a method for manufacturing a semiconductor product package. The method includes arranging a leadframe with one or more leads such that each lead has an inner end facing a portion of a die-pad, attaching a semiconductor chip to the die-pad, attaching a first electrically conductive mass to the die-pad such that it is aligned with the inner end of a lead protruding over the die-pad, attaching an electrical component to the first electrically conductive mass such that a longitudinal axis of the electrical component is arranged traverse to the die-pad, and coupling a second electrically conductive mass between a termination of the electrical component and the inner end of the lead.

Abstract: A DC-DC boost converter includes an input receiving an input voltage and an output producing an output voltage. A switching stage is formed by a low-side transistor arranged between a switching node and a ground node, and a high-side transistor arranged between the switching node and the output. The high-side transistor includes a body diode having an anode coupled to the switching node and a cathode coupled to the output. The converter is controlled in an asynchronous operation mode where the low-side transistor is driven alternately to a conductive state and a non-conductive state, and the high-side transistor is driven steadily to a non-conductive state. A variable load circuit is selectively coupled between the two output terminals when the converter is in the asynchronous operation mode in order to sink a load current having a value that is a function of a value of the input voltage.

Abstract: A switching regulator circuit has a switching transistor actuated during a switching on phase of a duty cycle. The current flowing through an inductor of the switching regulator circuit is determined from sensing a transistor current flowing through the switching transistor during switching on phase and selectively charging a capacitor of a switched capacitor circuit dependent on a current sense signal during the switching on phase.

Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.

Abstract: A system for detecting a presence in an environment to be monitored includes an electrostatic charge variation sensor, a vibration sensor, and an environmental pressure sensor. A processing unit is configured to acquire, from the electrostatic charge variation sensor, an electrostatic charge variation signal, and detect in the electrostatic charge variation signal, first signal characteristics indicative of the presence of a subject in the environment to be monitored. The processing unit further validates the detection of presence of the subject using the vibration and pressure signals provided by the other sensors.

Abstract: A first RF-to-DC circuit receives a radiofrequency signal and produces a first converted signal delivered to an energy storage circuit. A second RF-to-DC circuit, which is a down-scaled replica of the first RF-to-DC circuit, produces a second converted signal from the radiofrequency signal that is indicative of an open-circuit voltage of the first RF-to-DC circuit. The first RF-to-DC section includes N sub-stages, with a sub-set of sub-stages being selectively activatable. A window comparison of the second converted signal generates a first signal and a second signal indicative of whether the second converted signal is within a range of values proportional to a voltage reference signal. The sub-set of sub-stages is selectively deactivated, respectively activated, when the performed window comparison has a first result, respectively, a second result.

Abstract: A signal processing circuit includes a filter generating a quantizer input signal from a noise shaping input signal and a quantizer output signal. A quantizer divides the quantizer input signal by a scaling factor to produce a noise shaping output signal and multiplies the noise shaping output signal by the scaling factor to produce the quantizer output signal. Receiver circuitry scales the quantizer output signal by a second scaling factor. A dynamic range optimization circuit compares a current value of the noise shaping input signal to a threshold value, lowers or raises the scaling factor in response to the comparison, and proportionally lowers or raises the scaling factor such that a ratio between the scaling factor and second scaling factor remains substantially constant.

Abstract: An audio device includes a gain step selection circuit that receives a different requested gain value and an associated requested step size from each of a plurality of sources, compares each requested gain value to a same feedback gain value and generates a polarity based thereupon, performs step polarization on each requested step size as a function of the generated polarity therefor to thereby generate a plurality of step values, and outputs a least of the plurality of step values as an output step value. An accumulator circuit generates a current input gain value based upon the output step value and the feedback gain value, and then updates the feedback gain value to be equal to the current input gain value. A normalizing circuit multiplies an input data value by the current input gain value and applies a truncation function to a result thereof to produce an output data value.

Abstract: A method of driving an electrical load includes coupling a power supply source to a power supply pin of a driver circuit, and coupling an electrical load to at least one output pin of the driver circuit. A driver sub-circuit of the driver circuit produces at least one driving signal for driving the electrical load. The at least one driving signal is provided to the electrical load via the at least one output pin. The at least one driving signal is modulated to supply the electrical load with a load current and to subsequently interrupt the load current. A compensation current pulse is sunk from the power supply pin, at a compensation circuit of the driver circuit, in response to the load current being interrupted.

Abstract: A device includes: a micromechanical sensing structure configured to provide an electrical detection quantity as a function of a load; and a package enclosing the micromechanical sensing structure and providing a mechanical and electrical interface with respect to an external environment. The package includes a housing structure defining a cavity housing the micromechanical sensing structure; and a package coating that coats, at least in part, the housing structure, the package coating including a mechanical interface configured to transfer, in a uniform manner, the load on the housing structure and on the micromechanical sensing structure, wherein the housing structure includes a deformable layer interposed and in contact between the micromechanical sensing structure and the package coating, and wherein the deformable layer defines a mechanical-coupling interface.