Abstract: A method to determine a relative delay between a current-overshoot signal and a write data signal for a hard disk drive preamplifier, the method including using a memory element to strobe a test current-overshoot signal with a test data signal; counting a number of strobed transitions of the test current-overshoot signal; adjusting the delay based on the number of strobed transitions; setting a phase difference between the current-overshoot signal and the write data signal according to the delay; and using the memory element to strobe the current-overshoot signal with the write data signal.

Abstract: A preamplifier circuit comprises a first pair of transistors and a second pair of transistors having current flow paths therethrough coupled at first and second output nodes and providing first and second current flow lines intermediate a supply node and ground. The two pairs of transistors comprise: first and second input transistors located intermediate the outputs nodes and one of the supply node and ground providing respective input nodes, first and second load transistors intermediate the output nodes and the other of the supply node and ground. The load transistors have control terminals capacitively coupled to the other of the supply node and ground and a reset switch arrangement is provided periodically activatable to short the first output node, the second output node as well as the control terminals of the first load transistor and the second load transistor.

Abstract: A system for detecting and evaluating environmental quantities and events is formed by a detection and evaluation device and a mobile phone, connected through a wireless connection. The device is enclosed in a containment casing housing a support carrying a plurality of inertial sensors and environmental sensors. A processing unit is coupled to the inertial sensors and to the environmental sensors. A wireless connection unit, is coupled to the processing unit and a wired connection port, is coupled to the processing unit. A programming connector is coupled to the processing unit and is configured to couple to an external programming unit to receive programming instructions of the processing unit. A storage structure is coupled to the processing unit and a power-supply unit supplied power in the detection and evaluation device. The mobile phone stores an application, which enables a basicuse mode, an expert use mode, and an advanced use mode.

Abstract: A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

Abstract: In an embodiment a circuit includes drive circuitry configured to be coupled to a control terminal of an electronic switch and configured to apply a discharge signal to the control terminal causing the electronic switch to become conductive and provide an electrical discharge path for an energized element, a sensing node configured to be coupled to the control terminal and configured to sense a voltage at the control terminal and a feedback network coupled between the sensing node and the drive circuitry, wherein the feedback network includes a comparator circuit coupled to the sensing node and configured to compare the voltage at the control terminal and sensed at the sensing node with a reference threshold and to provide a comparison signal having a first value and a second value, respectively, in response to the voltage at the control terminal being higher or lower than the reference threshold, and wherein the drive circuitry is configured to produce the discharge signal as a function of the comparison sig

Abstract: A method of controlling a half-bridge circuit includes receiving an analog feedback signal proportional to an output of the half-bridge circuit, comparing the received analog feedback signal with a threshold value, selecting a digital feedback signal based on a result of the comparing, comparing the digital feedback signal with a digital reference signal to generate a digital error signal, integrating the digital error signal to generate an integration error signal, downscaling the integral error signal to generate a downscaled integration signal, sampling the downscaled integration signal to generate a sampled integration signal, and generating pulsed signals from the sampled integration signal to provide an input to the half-bridge circuit.

Abstract: A semiconductor die is arranged on a substrate and an encapsulation of laser direct structuring (LDS) material is molded onto the semiconductor die. A through mold via (TMV) extends through the encapsulation. This TMV includes a collar section that extends through a first portion of the encapsulation from an outer surface to an intermediate level of the encapsulation, and a frusto-conical section that extends from a bottom of the collar section through a second portion of the encapsulation. The collar section has a first cross-sectional area at the intermediate level. The first end of the frusto-conical section has a second cross-section area at the intermediate level. The second cross-sectional area is smaller than the first cross-sectional area. The TMV can have an aspect ratio which is not limited to 1:1.

Abstract: A vehicle such as a motor car (V) equipped with a radio equipment (14) is provided with a rearview camera 5 (10). Video frames from the rearview camera (10) are received at the radio equipment (14) and transmitted to a mobile communication device (S) such as a smart phone equipped with a video screen (S1) so that video frames from the rearview camera (10) are displayed on the 10 video screen (S1) of the mobile communication device (S).

Abstract: In accordance with an embodiment, a system includes an oscillator equipped circuit having an oscillator control circuit configured to be coupled to an external oscillator and a processing unit comprising a clock controller. The clock controller includes an interface circuit configured to exchange handshake signals with the oscillator control circuit, a security circuit configured to receive the external oscillator clock signal and configured to select the external oscillator clock signal as the system clock, and a detection block configured to detect a failure in the external oscillator clock signal. Upon detection of the failure, a different clock signal is selected as the system clock and the interface circuit to interrupts a propagation of the external oscillator.

Abstract: In an embodiment, a digital output driver circuit comprises an output stage having first and second transistors. A drive stage is configured to drive control terminals of the first and second transistors and comprising switching circuitry and current generator circuitry. In a first configuration, the driver circuit is configured to connect a control terminal of the second transistor to the reference node to turn off the second transistor; and connect a first capacitance to the current generator circuitry and to a control terminal of the first transistor to turn on the first transistor. In a second configuration, the driver circuit is configured to turn off the first transistor and connect the control terminal of the second transistor to the current generator circuitry and to the second capacitance to turn on the second transistor.

Abstract: A method for operating a differential memory includes: operating a main memory module differentially while executing a first program; copying first logic data from a first submodule of the main memory module to an auxiliary memory module; storing third logic data associated with a second program in a second submodule of the main memory module by overwriting second logic data associated with the first program, while maintaining the first logic data contained in the first submodule of the main memory module unaltered, where the second logic data are complementary to the first logic data; when a request for reading the first logic data is received during the storing of the third logic data in the second submodule of the main memory module, reading the first logic data from the auxiliary memory module; and executing the first or second programs by operating the main memory module in single-ended mode.

Abstract: Charge pump stages are coupled between flying capacitor pairs and arranged in a cascaded between a bottom voltage line and an output voltage line. Gain stages apply pump phase signals having a certain amplitude to the charge pump stages via the flying capacitors. A feedback signal path from the output voltage line to the bottom voltage line applies a feedback control signal to the bottom voltage line. Power supply for the gain stages is provided by a voltage of the feedback control signal in order to control the amplitude of the pump phase signals. An asynchronous logic circuit generates the switching drive signals for the gain stages with a certain switching frequency which is a function of a logic supply voltage derived from the voltage of the feedback control signal.

Abstract: A method and apparatus for adaptive rectification for preventing current inversion in motor windings are provided. In the method and apparatus, first and second half bridges of a plurality of half bridges are operated to synchronously rectify and permit passage of current, through the windings of the motor, in a first direction. A change of direction of the current from the first direction to a second direction opposite the first direction is detected. In response to detecting that the current changed direction to the second direction, the first and second half bridges of the plurality of half bridges are operated to quasi-synchronously rectify and block passage of the current through the windings in the second direction.

Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

Abstract: An embodiment method comprises receiving a satellite signal in a tracking channel, generating a set of replicas of a pseudo random noise sequence, comprising a punctual replica and a plurality of replicas that are different in time with respect to the punctual replica over a given time spacing, correlating the received signal with each replica to obtain amplitude correlation values, monitoring the tracking channel to detect a spoofed signal by generating a further plurality of replicas of the pseudo random noise sequence having a respective time spacing greater than the given time spacing, correlating the received signal of the tracking channel with each further replica to obtain further amplitude correlation values, calculating a shape anomaly factor based on the further correlation amplitude values, verifying the shape anomaly factor is greater than a given shape anomaly threshold, and signaling detection of a spoofed signal on the tracking channel.

Abstract: In start-up, current is sourced by a current source to a first plate of a first capacitor while a second capacitor is maintained at zero charge. In a subsequent first operating phase, current is sourced to a first plate of the second capacitor while a second plate of the first capacitor is connected to the first plate of the second capacitor. At the end of the first operating phase, the first capacitor is discharged. In a subsequent second operating phase, current is sourced to the first plate of the first capacitor while a second plate of the second capacitor is connected to the first plate of the first capacitor. At the end of the second operating phase, the second capacitor is discharged. Steady state operation of the circuit involves an alternation of the first and second operating phases interleaved with transition phases where the first and second capacitors are discharged.

Abstract: A power switch current sensing circuit includes matching first and second transistors having sources connected to first and second terminals, respectively, of the power switch. A current mirror has a first node coupled to a drain of the first transistor and a second node coupled to a drain of the second transistor. The current mirror sinks a current from the first node equal to a current flowing through the second transistor. A biasing circuit provides a same biasing voltage to the control terminals of the first and second transistors. An output resistance is coupled between the first node and a reference voltage node. A difference between a current flowing through the first transistor and the current sunk by the current mirror circuit from the first node flows through the output resistance. An output voltage produced at the first node is indicative of the current flowing through the power switch.

Abstract: A microelectromechanical system (MEMS) accelerometer sensor has a mobile mass and a sensing capacitor. To self-test the sensor, a test signal having a variably controlled excitation voltage and a fixed pulse width is applied to the sensing capacitor. The leading and trailing edges of the test signal are aligned to coincide with reset phases of a sensing circuit coupled to the sensing capacitor. The variably controlled excitation voltage of the test signal is configured to cause an electrostatic force which produces a desired physical displacement of the mobile mass. During a read phase of the sensing circuit, a variation in capacitance of sensing capacitor due to the actual physical displacement of the mobile mass is sensed for comparison to the desired physical displacement.

Abstract: An input signal arranged in frames is received. The frames include a cyclic redundancy check (CRC) field including a number of bits having bit edges. A timing signal is generated to include adjustable duration waveforms at one of a first duration value and a second duration value. A CRC check determines the occurrence, over the duration, of a number of waveforms of the timing signal having their duration adjusted to one of the first duration value and the second duration value which corresponds to the number of bits. A check signal is produced having a pass/fail value. If pass, the duration of the waveforms in the timing signal is maintained adjusted to the one of the first duration value and the second duration value. If fail, the duration of the waveforms in the timing signal is re-adjusted to the other of the first duration value and the second duration value.

Abstract: A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.