Patents Assigned to STMicroelectronic S.r.l.
  • Patent number: 11721614
    Abstract: A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: August 8, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michele Derai, Dario Vitello
  • Patent number: 11722133
    Abstract: In an embodiment an isolated gate driver device includes a low-voltage section having a control input configured to receive a PWM control signal with a switching frequency from a control stage, a high-voltage section, galvanically isolated from the low-voltage section the high-voltage section including a driving output configured to provide a gate-driving signal as a function of the PWM control signal to a power stage having at least one switch, a feedback input configured to receive at least one feedback signal indicative of an operation of the power stag, and an ADC module configured to convert the feedback signal into a digital data stream and a conversion-control module coupled to the ADC module and configured to provide a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: August 8, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vittorio D'Angelo, Salvatore Cannavacciuolo, Valerio Bendotti, Paolo Selvo, Diego Alagna
  • Patent number: 11719761
    Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: August 8, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Argento, Orazio Pennisi, Stefano Castorina, Vanni Poletto, Matteo Landini, Andrea Maino
  • Publication number: 20230245955
    Abstract: A semiconductor device includes an electrically conductive clip arranged in a bridge-like position between a semiconductor integrated circuit chip and an electrically conductive pad of a leadframe. The electrically conductive clip is soldered to the semiconductor integrated circuit chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor integrated circuit chip and the electrically conductive pad. Prior to soldering, the clip is immobilized in the desired bridge-like position via one of welding (such as laser welding) or gluing at dedicated immobilization areas.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 3, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mauro MAZZOLA, Fabio MARCHISI
  • Publication number: 20230245994
    Abstract: A semiconductor device semiconductor chip mounted to a leadframe that includes an electrically conductive pad. An electrically conductive clip is arranged in a bridge-like position between the semiconductor chip and the electrically conductive pad. The electrically conductive clip is soldered to the semiconductor chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor chip and the electrically conductive pad. The device further includes a pair of complementary positioning formations formed by a cavity in the electrically conductive clip and a protrusion (such as a stud bump or a stack of stud bumps) formed in the electrically conductive pad. The complementary positioning formations are mutually engaged to retain the electrically conductive clip in the bridge-like position to avoid displacement during soldering.
    Type: Application
    Filed: January 27, 2023
    Publication date: August 3, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mauro MAZZOLA, Fabio MARCHISI
  • Patent number: 11715769
    Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: August 1, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Simone Rascuna, Claudio Chibbaro
  • Patent number: 11716061
    Abstract: A circuit for startup of a multi-stage amplifier circuit includes a pair of input nodes and at least two output nodes configured to be coupled to a multi-stage amplifier circuit. A startup differential stage includes a differential pair of transistors having respective control terminals coupled to the pair of input nodes, and each transistor in the differential pair of transistors has a respective current path therethrough between a respective output node and a common source terminal. The startup differential stage is configured to sense a common mode voltage drop at a first differential stage of the multi-stage amplifier circuit. Current mirror circuitry includes a plurality of transistors coupled to the common terminal of the differential pair of transistors and coupled to two output nodes of the at least two output nodes.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: August 1, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Modaffari, Germano Nicollini
  • Publication number: 20230234836
    Abstract: Techniques to be described herein are based upon the combination of a digital lock-in amplifier approach with a numerical method to yield accurate estimations of the amplitude and phase of a sense signal obtained from a movement sensor associated with a resonant MEMS device such as a MEMS mirror. The techniques described herein are efficient from a computational point of view, in a manner which is suitable for applications in which the implementing hardware is to follow size and power consumption constraints.
    Type: Application
    Filed: January 25, 2022
    Publication date: July 27, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Raffaele Enrico FURCERI, Luca MOLINARI
  • Publication number: 20230238055
    Abstract: A circuit includes a memory array with memory cells arranged in a matrix of rows and columns, where each row includes a word line connected to the memory cells of the row, and each column includes a bit line connected to the memory cells of the column. Computational weights for an in-memory compute operation (IMCO) are stored in the memory cells. A word line control circuit simultaneously actuates word lines in response to input signals providing coefficient data for the IMCO by applying word line signal pulses. A column processing circuit connected to the bit lines processes analog signals developed on the bit lines in response to the simultaneous actuation of the word lines to generate multiply and accumulate output signals for the IMCO. Pulse widths of the signal pulses are modulated to compensate for cell drift. The IMCO further handles positive/negative calculation for the coefficient data and computational weights.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Applicants: STMicroelectronics S.r.l., Alma Mater Studiorum - Universita' Di Bologna
    Inventors: Marco PASOTTI, Marcella CARISSIMI, Antonio GNUDI, Eleonora FRANCHI SCARSELLI, Alessio ANTOLINI, Andrea LICO
  • Publication number: 20230238873
    Abstract: A voltage regulator receives a reference voltage and generates a regulated voltage using a MOSFET having a gate terminal configured to receive a control voltage. A charge pump receives the regulated voltage and generates a charge pump voltage in response to an enable signal and a clock signal generated in response to the enable signal. The voltage regulator further includes a first switched capacitor circuit coupled to the gate terminal and configured to selectively charge a first capacitor with a first current and impose a first voltage drop on the control voltage in response to assertion of the enable signal. The voltage regulator also includes a second switched capacitor circuit coupled to the gate terminal and configured to selectively charge a second capacitor with a second current and impose a second voltage drop on the control voltage in response to one logic state of the clock signal.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco Pasotti, Laura Capecchi, Riccardo Zurla, JR., Marcella Carissimi
  • Publication number: 20230236161
    Abstract: A gas sensor is formed by a thin-film semiconductor metal-oxide gas sensing layer, with a thermally conductive and electrically-insulating layer in direct physical contact with a back of the gas sensing layer to carry the gas sensing layer. Sensing circuitry applies a voltage to the gas sensing layer and measures a current flowing through the gas sensing layer. The current flowing through the gas sensing layer is indicative of whether a gas under detection has been detected by the gas sensing layer, and serves to self-heat the gas sensing layer. A support structure extends from a substrate to make direct physical contact with and carry the thermally conductive and electrically insulating layer about a perimeter of a back face thereof, with the support structure shaped to form an air gap between the back of the thermally conductive and electrically insulating layer and a front of the substrate.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 27, 2023
    Applicants: STMicroelectronics PTE LTD, STMicroelectronics S.r.l.
    Inventors: Ravi SHANKAR, Wei Ren Douglas LEE, Giuseppe BRUNO
  • Publication number: 20230240160
    Abstract: A phase-change memory cell includes a heater, a memory region made of a phase-change material located above said heater, and an electrically conductive element positioned adjacent to the memory region and the heater at a first side of the heater. The electrically conductive element extends parallel to a first axis and has, parallel to the first axis, a first dimension at the first side that is greater than a second dimension at a second side opposite to the first side.
    Type: Application
    Filed: January 20, 2023
    Publication date: July 27, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mario ALLEGRA, Andrea REDAELLI
  • Patent number: 11710450
    Abstract: Driving a LED array includes determining total charge to be transferred to the LEDs during an image frame, and determining a number of drive pulses of equal width and amplitude that would drive the LEDs with nearly the total charge during display of the image frame. One of the drive pulses is modified so the drive pulses drive the LEDs with the total charge during display. If the width is greater than a minimum width and less than a maximum width, the LEDs are driven with the drive pulses. If the width is less than the minimum width and if an amplitude is greater than a minimum amplitude, the amplitude of the drive pulses is decremented. If the width is less than the minimum width and if the amplitude is equal to the minimum amplitude and if the number of drive pulses is greater than one, the number is decremented.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: July 25, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gaetano L'Episcopo, Giovanni Conti, Mario Antonio Aleo
  • Patent number: 11709185
    Abstract: An amplification interface includes first and second differential input terminals, first and second differential output terminals providing first and second output voltages defining a differential output signal, and first and second analog integrators coupled between the first and second differential input terminals and the first and second differential output terminals, the first and second analog integrators being resettable by a reset signal. A control circuit generates the reset signal such that the first and second analog integrators are periodically reset during a reset interval and activated during a measurement interval, receives a control signal indicative of offsets in the measurement sensor current and the reference sensor current, and generates a drive signal as a function of the control signal. First and second current generators coupled first and second compensation circuits to the first and second differential input terminals as a function of a drive signal.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: July 25, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michele Vaiana, Calogero Marco Ippolito, Angelo Recchia, Antonio Cicero, Pierpaolo Lombardo
  • Patent number: 11706392
    Abstract: A light projection system includes a MEMS mirror operating on a mirror drive signal to generate a mirror sense signal resulting from operation of the MEMS mirror based on the mirror drive signal. A mirror driver generates the mirror drive signal from a drive control signal. A controller receives the mirror sense signal from the MEMS mirror, obtains a first sample of the mirror sense signal at a first phase thereof, obtains a second sample of the mirror sense signal at a second phase thereof, wherein the first and second phases are separated by a half period of the mirror drive signal, with the second phase occurring after the first phase, and generates the drive control signal based on a difference between the first and second samples to keep the mirror drive signal separated in phase from the mirror sense signal by a desired amount of phase separation.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: July 18, 2023
    Assignees: STMicroelectronics LTD, STMicroelectronics S.r.l.
    Inventors: Massimo Ratti, Eli Yaser, Naomi Petrushevsky, Yotam Nachmias
  • Patent number: 11705388
    Abstract: A first device includes a rectangular substrate having a first width and a first length and a first pattern of electrical interface nodes at first, second and third sides with a first set of electrical interface nodes at the fourth side. A second device includes a second rectangular substrate having a second width equal to the first width, a second length and a median line extending in the direction of the second width. A second pattern of electrical interface nodes for the second device includes two unmorphed replicas of the first pattern arranged mutually rotated 180° on opposite sides of the median line as well as two second sets of electrical interface nodes formed by two smaller morphed replicas of the first set of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: July 18, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristina Somma, Giovanni Graziosi
  • Patent number: 11705904
    Abstract: A microcontroller includes an input pin and internal pull-up and pull-down circuits. External pull-up and pull-down circuits are also coupled to the input pin. The microcontroller is operable according to different configuration modes which include configuring the input pin in a floating state. A control logic then configures the internal pull-up and pull-down circuits according to an internal pull-up mode to acquire a first input voltage signal (at a first logic value) from the input pin, and further configure the internal pull-up and pull-down circuits according to an internal pull-down mode to acquire a second input voltage signal (at a second logic value) from the input pin. A selection of the operating mode of the MCU is then made based on the acquired first and second logic values.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: July 18, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniele Mangano, Alessandro Inglese
  • Patent number: 11703897
    Abstract: In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: July 18, 2023
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (Rousset) SAS
    Inventors: Michel Cuenca, Bruno Gailhard, Daniele Mangano
  • Patent number: 11704354
    Abstract: In accordance with an embodiment, a method of managing an automotive infotainment media library, in which media content files sourced from a set of source devices, and the media content files are accessible via respective playback paths by at least one media player application having a plurality of configurations, includes: parsing the media content files in the media library to create at least one indexed table including a respective list of identifiers associated to media content files, wherein the media content files are parsed as a function of at least one of a source device in the set of source devices, as a function of a configuration in the plurality of configurations of the at least one media player application, or as a function of folders grouping the media content files in the media library.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: July 18, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Silvio Fiorese, Riccardo Parisi
  • Publication number: 20230222984
    Abstract: A non-emissive display includes a backlight controller sending a pulse during each sub-frame of a plurality of frames to row and column drivers that drive backlight zones. The row drivers count each pulse to keep a pulse count total, and reset the pulse count total when it is equal to a first number indicating how many row drivers are present. Each row driver activates its channels and waits for a next pulse if the pulse count total is not equal to the first number and if the pulse count total is equal to a second number indicating in which sub-frame that first driver is to be activated. Each row driver waits for a next pulse if the pulse count total is not equal to the first number and the second number. Each column driver activates its channel in response to receipt of each pulse.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 13, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Gaetano L'EPISCOPO, Giovanni CONTI, Carmelo OCCHIPINTI, Mario Antonio ALEO