Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: The present disclosure is directed to embodiments of a conductive structure on a conductive barrier layer that separates the conductive structure from a conductive layer on which the conductive barrier layer is present. A gap or crevice extends along respective surfaces of the conductive structure and along respective surfaces of one or more insulating layers. The gap or crevice separates the respective surfaces of the one or more insulating layers from the respective surfaces of the conductive structure. The gap or crevice provides clearance in which the conductive structure may expand into when exposed to changes in temperature. For example, when coupling a wire bond to the conductive structure, the conductive structure may increase in temperature and expand into the gap or crevice. However, even in the expanded state, respective surfaces of the conductive structure do not physically contact the respective surfaces of the one or more insulating layers.

Abstract: A first wafer includes a first semiconductor layer and first metal contacts on a side of a first surface of the first semiconductor layer. A second wafer includes a second semiconductor layer and second metal contacts on a side of a first surface of the second semiconductor layer. A handle is bonded onto a surface of the second wafer opposite to the second semiconductor layer. The second semiconductor layer is then removed to expose the second metal contacts. A bonding is then performed between the first and second wafers to electrically connect the first metal contacts to the second metal contacts.

Abstract: A method of fabricating a package for an integrated circuit chip, includes: a) mounting the integrated circuit chip to a support; b) forming a first resist layer over the integrated circuit chip which has a first opening emerging onto a central portion of the integrated circuit chip; c) forming a second resist layer over the first resist layer which has a second opening having a central portion emerging onto the first opening and a peripheral portion emerging onto the first layer; d) arranging a transparent plate in the second opening; and e) forming a third resist layer over the second resist layer and transparent plate which has a third opening emerging onto a central portion of the transparent plate.

Abstract: An electronic device, comprising plurality of source metal strips in a first metal level; a plurality of drain metal strips in the first metal level; a source metal bus in a second metal level above the first metal level; a drain metal bus, in the second metal level; a source pad, coupled to the source metal bus; and a drain pad, coupled to the drain metal bus. The source metal bus includes subregions shaped in such a way that, in top-plan view, each of them has a width which decreases moving away from the first conductive pad; the drain metal bus includes subregions shaped in such a way that, in top-plan view, each of them has a width which decreases moving away from the second conductive pad. The first and second subregions are interdigitated.

Abstract: A light-emitter device comprising: a body of solid-state material; and a P-N junction in the body, including: a cathode region, having N-type conductivity; an anode region, having P-type conductivity, extending in direct contact with the cathode region and defining a light-emitting surface; and a depletion region around an interface between the anode and the cathode regions. The light-emitting surface has at least one indentation that extends towards the depletion region. The depletion region has a peak defectiveness area, housing irregularities in crystal lattice, in correspondence of said at least one indentation. The defectiveness area, which includes point defects, line defects, bulk defects, etc., is generated as a direct consequence of the formation of the indentation by an indenter or nanoindenter system. In the defectiveness area color centers are generated.

Abstract: A bipolar transistor is manufactured by: forming a collector region; forming a first layer made of a material of a base region and an insulating second layer; forming a cavity reaching the collector region; forming a portion of the collector region and a portion of the base region in the cavity; forming an insulating fourth layer made of a same material as the insulating second layer in the periphery of the bottom of the cavity, the insulating fourth layer having a same thickness as the insulating second layer; forming an emitter region; and simultaneously removing the insulating second and a portion of the insulating fourth layer not covered by the emitter region.

Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

Abstract: A scanning laser projector includes an optical module with a housing defined by a top surface, a bottom surface, and sidewalls extending between the top surface and bottom surface to define an interior compartment within the housing. A given one of the sidewalls has an exit window defined therein. A first light detector is positioned at an interior surface of the given one of the sidewalls about a periphery of the exit window. A second light detector positioned at the interior surface of the given one of the sidewalls about the periphery of the exit window and on a different side thereof than the first light detector.

Abstract: In an embodiment a power converter includes a first capacitor and a second capacitor coupled in series with the first capacitor, wherein the converter is configured to charge, during a first phase, the first and second capacitors by a supply voltage so that a voltage across terminals of each of the first and second capacitors is substantially equal to half the supply voltage and discharge, during a second phase, the second capacitor to a third capacitor.

Abstract: An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.

Abstract: A circuit includes an amplifier, a bias voltage node, and a first set of switches configured, based on a first reset signal having a first value, to couple first and second input nodes to the bias voltage node and to couple first and second output nodes of the amplifier. First and second feedback branches each include a respective RC network including a plurality of capacitances. The first and second feedback branches further include a second set of switches intermediate input nodes and the capacitances, and a third set of switches intermediate input nodes and the plurality of capacitances. These switches selectively couple the capacitances to the input nodes and output nodes, based on a second reset signal having a first value. The second reset signal keeps the first value for a determined time interval exceeding a time interval in which the first reset signal has the first value.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line precharge circuit generates a precharge voltage for application to each pair of bit lines. The precharge voltage has a first voltage level (not greater than a positive supply voltage for the SRAM cells) when the memory array is operating in a data read/write mode. The precharge voltage has a second voltage level (greater than the first voltage level) in advance of the simultaneous actuation of the word lines for the in-memory compute operation.

Abstract: The present disclosure is directed to a contactless card including an actuation security structure that is actuated to provide authorization in accessing identifying information on an integrated circuit within the contactless card. In at least one embodiment, the actuation security structure includes a pair of conductive layers and a pair of electrodes. Ends of the pair of conductive layers overlap respective ones of the pair of electrodes. The ends of the pair of conductive layers are at and in a first elastically deformable region and the respective ones of the pair of electrodes are at and in a second elastically deformable region. An owner of the contactless card may provide authorization to access the identification information on the contactless card by applying force to both the first and second elastically deformable regions inward resulting in the ends of the conductive layers moving into electrical communication with the pair of electrodes.

Abstract: An encapsulation hood is fastened onto electrically conductive zones of a support substrate using springs. Each spring has a region in contact with an electrically conductive path contained in the encapsulation hood and another region in contact with a corresponding one of the electrically conductive zones. The fastening of the part of the encapsulation hood onto the support substrate compresses the springs and further utilizes a bead of insulating glue located between the compressed springs.

Abstract: A flexible RAM loader including a shift register that includes a first data section coupled with a serial data input, and a second data section selectively coupled with a first parallel data input. The shift register is configured to load data serially from the serial data input to the first data section and the second data section when the second data section is uncoupled from the first parallel data input, and, when the second data section is coupled with the first parallel data input, configured to load data in parallel from the serial data input into the first data section and from the first parallel data input into the second data section. The flexible RAM loader also including a test register comprising a selection bit to couple the second data section with the first parallel data input.

Abstract: The MEMS actuator is formed by a body, which surrounds a cavity and by a deformable structure, which is suspended on the cavity and is formed by a movable portion and by a plurality of deformable elements. The deformable elements are arranged consecutively to each other, connect the movable portion to the body and are each subject to a deformation. The MEMS actuator further comprises at least one plurality of actuation structures, which are supported by the deformable elements and are configured to cause a translation of the movable portion greater than the deformation of each deformable element. The actuation structures each have a respective first piezoelectric region.

Abstract: A pixel includes a SPAD having a cathode connected to a first node and an anode coupled to a first negative voltage, and a transistor circuit coupled between a supply voltage and a third node, that turns on in response to an enable signal. A cascode transistor connected between the third node and the first node is controlled by a cascode control signal. A cathode setting capacitor is connected between the first node and ground. A readout inverter is coupled between the intermediate node and an output node and generates an output signal. Turn-on of the transistor circuit sources current from the supply voltage node to the cathode setting capacitor, setting a reverse bias voltage across the SPAD to greater than its breakdown voltage. A photon impinging upon the SPAD cause avalanche of the SPAD which, when occurring after turn off of the transistor circuit, discharges the cathode setting capacitor.

Abstract: A microelectromechanical resonator device has: a main body, with a first surface and a second surface, opposite to one another along a vertical axis, and made of a first layer and a second layer, arranged on the first layer; a cap, having a respective first surface and a respective second surface, opposite to one another along the vertical axis, and coupled to the main body by bonding elements; and a piezoelectric resonator structure formed by: a mobile element, constituted by a resonator portion of the first layer, suspended in cantilever fashion with respect to an internal cavity provided in the second layer and moreover, on the opposite side, with respect to a housing cavity provided in the cap; a region of piezoelectric material, arranged on the mobile element on the first surface of the main body; and a top electrode, arranged on the region of piezoelectric material, the mobile element constituting a bottom electrode of the piezoelectric resonator structure.