Patents Assigned to STMicroelectronics (Crolles 2)
  • Patent number: 11942496
    Abstract: A digital image sensor package includes an image sensor substrate and a glass covering. The image sensor substrate carries photodiodes. The glass covering has a bottom surface, a top surface opposite the bottom surface, and a sidewall delimiting a perimeter edge of the glass covering. The glass covering overlies the photodiodes. A surface area of the top surface of the glass covering is greater than a surface area of the bottom surface of the glass covering such that the sidewall is anti-perpendicular to the top and bottom surfaces of the glass.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: March 26, 2024
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Laurent Herard, David Gani
  • Publication number: 20240095191
    Abstract: A method of pairing between a first host device and a first peripheral device includes entering by a user of the first host device a verification value, as well as comparing, by the first peripheral device, between the verification value and a first secret value stored in a memory of the first peripheral device. When the verification corresponds to the first secret value, the method of pairing further includes calculating and storing a first pairing key by the first host device and the first peripheral device to perform the pairing.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 21, 2024
    Applicants: STMicroelectronics (Rousset) SAS, Proton World International N.V.
    Inventors: Denis FARISON, Joris DELCLEF
  • Publication number: 20240096898
    Abstract: The present description concerns an electronic device comprising: a silicon layer, an insulating layer in contact with a first surface of the silicon layer, a transistor comprising source, drain, and body regions arranged in the silicon layer, and a gate region topping the body region and comprising a gate portion laterally extending beyond the source and drain regions, the body region being continued by a body contact region not covered with the gate region, and a region of extension of the body region being located under the gate portion; the device further comprising, under the gate portion, a partial insulating trench in the silicon layer extending from a second surface of the silicon layer down to a depth smaller than the thickness of the silicon layer.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMicroelectronics (Crolles 2) SAS
    Inventors: Tadeu MOTA FRUTUOSO, Xavier GARROS, Blandine DURIEZ, Sebastien CREMER
  • Publication number: 20240097030
    Abstract: The present description concerns an electronic device comprising: —a silicon layer having a first surface and a second surface, —an insulating layer in contact with the first surface of the silicon layer, —at least one transistor comprising source, drain, and body regions arranged in the silicon layer, and a gate region topping the body region and comprising a gate portion laterally extending beyond the source and drain regions, the body region being continued by a body contact region not covered with the gate region, and a region of extension of the body region being located under the gate portion; the gate portion being less heavily doped than the rest of the gate region.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien CREMER, Tadeu MOTA FRUTUOSO, Xavier GARROS, Blandine DURIEZ
  • Patent number: 11936288
    Abstract: An AC capacitor is coupled to a totem-pole type PFC circuit. In response to detection of a power input disconnection, the PFC circuit is controlled to discharge the AC capacitor. The PFC circuit includes a resistor and a first MOSFET and a second MOSFET coupled in series between DC output nodes with a common node coupled to the AC capacitor. When the disconnection event is detected, one of the first and second MOSFETs is turned on to discharge the AC capacitor with a current flowing through the resistor and the turned on MOSFET. Furthermore, a thyristor may be simultaneously turned on, with the discharge current flowing through a series coupling of the MOSFET, resistor and thyristor. Disconnection is detected by detecting a zero-crossing failure of an AC power input voltage or lack of input voltage decrease or input current increase in response to MOSFET turn on for a DC input.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: March 19, 2024
    Assignees: STMicroelectronics (Tours) SAS, STMicroelectronics LTD
    Inventors: Ghafour Benabdelaziz, Laurent Gonthier
  • Patent number: 11934217
    Abstract: In accordance with an embodiment, a linear voltage regulator includes: a first transistor coupled between a first input terminal and an output terminal, the first input terminal adapted to receive a first voltage, and the output terminal adapted to provide a regulated voltage; a second transistor coupled between a second input terminal and the output terminal, the second input terminal adapted to receive a second voltage; and an amplifier of a difference between a third voltage proportional to the voltage at the output terminal and a reference voltage, an output of said amplifier being selectively coupled to a control terminal of the first transistor and to a control terminal of the second transistor, the amplifier being supplied by a fourth voltage corresponding to a highest voltage of the first voltage and the second voltage.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics Razvoj Polprevodnikov D.O.O.
    Inventors: Albin Pevec, Nejc Suhadolnik, Vinko Kunc, Maksimiljan Stiglic
  • Patent number: 11933861
    Abstract: A method and apparatus for performing an on-system built-in self-test of a converter are provided. In the method, a controller generates a test signal and outputs the test signal to the converter. The controller receives a response signal from the converter and determines a plurality of bin powers of a plurality of bins, respectively, of a frequency domain signal representative of the response signal. The controller determines a figure of merit for the converter based on a first bin power of a first bin of the plurality of bin powers, where the first bin corresponds to a frequency of the test signal.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Ankur Bal, Sharad Gupta
  • Patent number: 11934329
    Abstract: Data exchanges between an ultra-wide band communication module and a secure element are controlled such that the data exchanges pass through a near-field communication router. The near-field communication router controls routing of the data exchanges so that the data exchanges do not pass through a host circuit that is also coupled to the near-field communication router.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Tramoni, Alexandre Charles
  • Patent number: 11935828
    Abstract: A semiconductor region includes an isolating region which delimits a working area of the semiconductor region. A trench is located in the working area and further extends into the isolating region. The trench is filled by an electrically conductive central portion that is insulated from the working area by an isolating enclosure. A cover region is positioned to cover at least a first part of the filled trench, wherein the first part is located in the working area. A dielectric layer is in contact with the filled trench. A metal silicide layer is located at least on the electrically conductive central portion of a second part of the filled trench, wherein the second part is not covered by the cover region.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Abderrezak Marzaki
  • Patent number: 11933968
    Abstract: A microelectromechanical (MEMS) structure includes a fixed frame internally defining a cavity, and a mobile mass suspended in the cavity and movable with a first resonant rotational mode about a first rotation axis and with a second resonant rotational mode about a second rotation axis orthogonal to the first. A pair of supporting elements extends in the cavity, is rigidly coupled to the fixed frame, and is elastically deformable to cause rotation of the mobile mass about the first rotation axis. A pair of elastic-coupling elements is elastically coupled between the mobile mass and the first pair of supporting elements. Each of the elastic-coupling elements includes a first and second elastic portions, the first elastic portion being compliant to torsion about the second rotation axis. The second elastic portion is compliant to bending outside of a horizontal plane of main extension of the MEMS structure.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nicolo' Boni, Roberto Carminati, Massimiliano Merli
  • Patent number: 11935992
    Abstract: An electronic device includes a first electronic component and a second electronic. Each electronic component includes a carrier substrate having a back side and a front side, an electronic chip including an integrated optical element, an overmolded transparent block encapsulating the electronic chip above the carrier substrate, and electrical connections between the electronic chip and electrical contacts of the carrier substrate. An overmolded grid encapsulates and holds the first and second electronic components. The grid is configured so that sides of the first and second electronic components are at least partially exposed.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Remi Brechignac, Jean-Michel Riviere
  • Patent number: 11935607
    Abstract: An integrated circuit die includes memory sectors, each memory sector including a memory array. The die includes a voltage regulator with a first transistor driven by an output voltage to thereby generate a gate voltage, the output voltage being generated based upon a difference between a constant current and a leakage current. A selection circuit selectively couples the gate voltage to a selected one of the plurality of memory sectors. A leakage detector circuit drives a second transistor with the output voltage to thereby generate a copy voltage based upon a difference between a variable current and a replica of the constant current, increases the variable current in response to the copy voltage being greater than the gate voltage, and asserts a leakage detection signal in response to the copy voltage being less than the gate voltage, the leakage detection signal indicating excess leakage within the memory array.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Vikas Rana, Vivek Tyagi
  • Patent number: 11936339
    Abstract: A voltage controlled oscillator includes a series resonant circuit having a resonance frequency and an active voltage driving device coupled to the series resonant circuit. The active voltage driving device provides a driving voltage and has an output negative resistance in an operative voltage range at the resonance frequency. The active voltage driving device includes a cross-coupled differential pair having voltage supply terminals providing the driving voltage. The series resonant circuit is coupled between the voltage supply terminals of the cross-coupled differential pair.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Franceschin, Andrea Mazzanti, Andrea Pallotta
  • Patent number: 11933966
    Abstract: Disclosed herein is a method of making a microelectromechanical (MEMS) device. The method includes, in a single structural layer, affixing a tiltable structure to an anchorage portion with first and second supporting arms extending between the anchorage portion and opposite sides of the tiltable structure, and forming first and second resonant piezoelectric actuation structures extending between a constraint portion of the first supporting arm and the anchorage portion, on opposite sides of the first supporting arm. The method further includes coupling a handling wafer underneath the structural layer to define a cavity therebetween, and forming a passivation layer over the structural layer, the passivation layer having contact openings defined therein for routing metal regions for electrical coupling to respective electrical contact pads, the electrical contact pads being electrically connected to the first and second resonant piezoelectric actuation structures.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 19, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Carminati, Nicolo' Boni, Massimiliano Merli
  • Publication number: 20240086891
    Abstract: A first near-field communication device detects the presence of a second near-field communication device located within range. In response to that detection, there is an initiation of a near-field communication between the first and second devices. In case of a failure of the initiation of the near-field communication, instead an initiation of a contactless bank transaction between the first and second devices occurs.
    Type: Application
    Filed: September 6, 2023
    Publication date: March 14, 2024
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (China) Investment Co., Ltd.
    Inventors: Pierre RIZZO, Laurent TRICHEUR
  • Publication number: 20240089860
    Abstract: A wireless communication device includes a battery, and a platform powered by the battery, with the platform including a processor. The device also includes a voltage regulator powered by the battery, an ultra-wideband communication unit powered by the voltage regulator via the platform when the platform is powered up, and a near-field communication unit powered directly by the battery, and being configured to order the voltage regulator to power the ultra-wideband communication unit when the platform is powered down.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Alexandre TRAMONI
  • Publication number: 20240088885
    Abstract: A control circuit for controlling a first transistor includes a diode for suppressing transient voltages. A cathode of the diode is coupled to a first conduction terminal of the first transistor, and an anode of the diode is coupled to a first node. A first resistor is coupled between the first node and a control terminal of the first transistor. A second transistor has a control terminal coupled to the first node, a first conduction terminal configured to receive a first supply voltage, and a second conduction terminal coupled to the control terminal of the first transistor.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Jean-Michel SIMONNET, Fabrice GUITTON
  • Publication number: 20240087977
    Abstract: An integrated circuit includes an electronic chip having a face covered with a thermal interface material layer. A heat sink includes a mounting area fixed to the chip via the thermal interface material layer. The heat sink includes open notches extending into the mounting area to delimit fins separated from each other by the open notches.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain COFFY, Jerome LOPEZ
  • Publication number: 20240088844
    Abstract: Signal processing is applied to a digital audio input signal to provide an analog audio output signal using a switching converter circuit driven by a pulse-width-modulated (PWM) signal. The analog audio output signal is sensed to provide an analog feedback signal. The signal processing that is applied includes: converting the digital audio input signal to producing an analog replica; producing an analog error signal indicative of a difference between the analog replica of the digital input signal and the analog feedback signal; converting the analog error signal to produce a digital error signal; digitally filtering the digital error signal to produce a filtered digital error signal; and generating the PWM signal from the filtered digital error signal.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Edoardo BOTTI, Francesco STILGENBAUER, Piero MALCOVATI, Edoardo BONIZZONI, Matteo DE FERRARI
  • Publication number: 20240081660
    Abstract: An earphone device has a casing having a measurement portion dedicated to acquisition of at least one measurement quantity with the earphone device arranged outside an ear of a subject. The earphone device is provided with at least one sensor, operatively coupled to the measurement portion within the casing for acquiring signals indicative of the measurement quantity, and a processing module that processes the signals acquired by the sensor so as to provide a processed output signal for monitoring the measurement quantity, as a function of the acquired signals. Electrical-connection elements define electrical paths within the casing in electrical connection with the sensor.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Enrico Rosario ALESSI, Enri DUQI, Fabio PASSANITI