Patents Assigned to STMICROELECTRONICS (GRENOVLE 2) SAS
  • Patent number: 11929748
    Abstract: A wobulated signal generator includes a chain of delay elements and control circuitry. The chain of delay elements includes first delay elements, second delay elements, and third delay elements. The control circuitry, in operation, enables a number of the first delay elements, disables a number of the third delay elements, and enables a selected number of the second delay elements, defining a period of time between two consecutive rising edges of a digital wobulated signal at an output of the wobulated signal generator. The control circuitry monitors an average frequency of the digitally wobulated signal, and selectively modifies the number of enabled first delay elements and the number of disabled third delay elements based on the monitored average frequency of the digitally wobulated signal.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: March 12, 2024
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Ugo Mureddu, Gilles Pelissier, Guillaume Reymond
  • Patent number: 11929259
    Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 12, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Ian Harvey Arellano, Aaron Cadag, Ela Mia Cadag
  • Publication number: 20240074676
    Abstract: A system for measuring cardiac parameters uses a movements sensor to generate a seismocardiographic signal and a cardiac parameters calculation unit. The cardiac parameters calculation unit provides for generating an envelope signal correlated to the seismocardiographic signal; identifies, in the envelope signal, signal segments having a repetitive pattern; identifies, among the signal segments, pairs of successive peaks such that a first peak of each pair of successive peaks is a systolic peak and a second peak of each pair of successive peaks is a diastolic peak; and calculates a systolic period and a diastolic period for each pair of successive peaks.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 7, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Enrico Rosario ALESSI, Fabio PASSANITI, Oriana Rita Antonia DI MARCO
  • Publication number: 20240075499
    Abstract: MEMS ultrasonic transducer, MUT, device, comprising a semiconductor body with a first and a second main face, including: a modulation cavity extending into the semiconductor body from the second main face; a membrane body suspended on the modulation cavity and comprising a transduction membrane body and a modulation membrane body; a piezoelectric modulation structure on the modulation membrane body; a transduction cavity extending into the membrane body, the transduction membrane body being suspended on the transduction cavity; and a piezoelectric transduction structure on the transduction membrane body. The modulation membrane body has a first thickness and the transduction membrane body has a second thickness smaller than the first thickness. In use, the modulation membrane vibrates at a first frequency and the transduction membrane vibrates at a second frequency higher than the first frequency, to emit and/or receive acoustic waves at a frequency dependent on the first and the second frequencies.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 7, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Francesco FONCELLINO
  • Publication number: 20240079237
    Abstract: Method of manufacturing an electronic device, comprising forming an ohmic contact at an implanted region of a semiconductor body. Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.
    Type: Application
    Filed: August 1, 2023
    Publication date: March 7, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Mario Giuseppe SAGGIO, Cateno Marco CAMALLERI, Gabriele BELLOCCHI, Simone RASCUNA'
  • Publication number: 20240081160
    Abstract: A memory cell includes a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element. The memory cell is formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor. The gate is formed on the active layer and has a lateral flank covered with a second insulating layer. The variable-resistance element includes a first layer covering a lateral flank of the active layer in a trench formed through the active layer along the lateral flank of the gate and reaching the first insulating layer, and a second layer made of a variable-resistance material.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicants: STMicroelectronics (Crolles 2) SAS, STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Philippe BOIVIN, Simon JEANNOT
  • Patent number: 11921834
    Abstract: A method of authenticating a first electronic circuit includes generating a first signature using the first electronic circuit, the generating of the first signature being based on states of a plurality of electric nodes distributed within the first electronic circuit. A second signature is generated using a second electronic circuit, the generating of the second signature being based on states of a plurality of electric nodes distributed within the second electronic circuit. The first signature is compared to the second signature. The first electronic circuit is authenticated based on the comparison of the first signature to the second signature.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: March 5, 2024
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Fabrice Marinet
  • Patent number: 11921655
    Abstract: A microcontroller includes a memory, direct memory access (DMA) controllers and a microprocessor. The microprocessor maintains one or more memory protection (MP) configurations to control access to protected memory areas of the microcontroller. In response to a secure service call of an unsecure user-application, the microprocessor executes a state machine which disables interrupt requests, determining whether DMA controller configurations and MP configurations satisfy secure-service criteria. When the secure-service criteria are satisfied, at least one secure operation associated with the secure service call is performed, and memory areas accessed during the execution of the at least one secure operation are cleaned. The interrupt requests are re-enabled and a response to the secure service call is generated.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: March 5, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Massimo Panzica, Maurizio Gentili
  • Patent number: 11921242
    Abstract: A method for providing an estimate of a time-of-flight between an ultrasonic signal emitted by a device and an ultrasonic echo signal returned by a target object hit by the ultrasonic signal and received at the device.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: March 5, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Davide Ruggiero, Rosario Schiano Lo Moriello, Annalisa Liccardo, Giuseppe Caiazzo
  • Patent number: 11923770
    Abstract: Provided is a circuit including a switching transistor having a control terminal configured to receive a control signal and having a current flow path therethrough. The switching transistor becomes conductive in response to the control signal having a first value. The current flow path through the switching transistor provides a current flow line between two nodes. In a non-conductive state, a voltage drop stress is across the switching transistor. The circuit comprises a sense transistor that is coupled to and a scaled replica of the switching transistor. The sense transistor has a sense current therethrough. The sense current is indicative of the current of the switching transistor. The circuit includes coupling circuitry configured to apply the voltage drop stress across the sense transistor in response to the switching transistor being non-conductive. In the non-conductive state, the voltage drop stress is replicated across both the switching transistor and the sense transistor.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: March 5, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Marco Cignoli, Vanni Poletto
  • Patent number: 11918889
    Abstract: A device comprising at least one controller handset possessing a housing and at least one control element that is arranged so as to protrude from the housing and to be movable with respect to the housing so as to allow a user to control at least one movement of at least one object that is external to the device, and a contactless transponder having at least one antenna that is housed in the at least one control element.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: March 5, 2024
    Assignees: STMICROELECTRONICS KK, STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Hirokazu Sakamoto, Anthony Tornambe
  • Patent number: 11921548
    Abstract: The present disclosure is directed to a detection method of a first or second state of a foldable electronic device including a first and a second hardware element tiltable to each other and accommodating a first and a second electrode which are in contact with each other when the foldable electronic device is in the first state and at a distance from each other otherwise. The detection method includes: acquiring a first and a second charge variation signal indicative of environmental electric/electrostatic charge variations detected by the first and second electrodes; generating a differential signal indicative of a difference between the first and the second charge variation signals; generating, as a function of the differential signal, one or more feature signals; and generating, as a function of the one or more feature signals, a contact signal indicative of the first or second states of the foldable electronic device.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: March 5, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Stefano Paolo Rivolta, Roberto Mura, Lorenzo Bracco, Federico Rizzardini
  • Publication number: 20240067184
    Abstract: A system includes inertial sensors and a GPS. The system generates a first estimated vehicle velocity based on motion data and positioning data, generates a second estimated vehicle velocity based on the processed motion data and the first estimated vehicle velocity, and generates fused datasets indicative of position, velocity and attitude of a vehicle based on the processed motion data, the positioning data and the second estimated vehicle velocity. The generating the second estimated vehicle velocity includes: filtering the motion data, transforming the filtered motion data in a frequency domain based on the first estimated vehicle velocity, generating spectral power density signals, generating an estimated wheel angular frequency and an estimated wheel size based on the spectral power density signals, and generating the second estimated vehicle velocity as a function of the estimated wheel angular frequency and the estimated wheel size.
    Type: Application
    Filed: October 27, 2023
    Publication date: February 29, 2024
    Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC., STMicroelectronics (Grand Ouest) SAS
    Inventors: Nicola Matteo PALELLA, Leonardo COLOMBO, Andrea DONADEL, Roberto MURA, Mahaveer JAIN, Joelle PHILIPPE
  • Publication number: 20240072922
    Abstract: An integrated circuit includes a control circuit, a primary sensor device coupled to the control circuit, and a plurality of groups of secondary sensor devices coupled to the primary sensor device. The primary sensor device receives a master clock signal from the control device and outputs, to each group of secondary sensor devices, a respective secondary clock signal with a frequency lower than the primary clock signal. The primary sensor device generates primary sensor data. The primary sensor device receives secondary sensor data from each group of secondary sensor devices. The primary sensor device combines the primary sensor data and all of the secondary sensor data into a sensor data stream with a time division-multiplexing scheme and outputs the sensor data stream to the control circuit.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Matteo QUARTIROLI, Alessandra Maria RIZZO PIAZZA RONCORONI
  • Publication number: 20240069901
    Abstract: A server builds an update file to update software. The server compiles source code of an updated version of the software, generating a binary file of the updated version of the software. Memory locations are mapped to sections of the binary file based on mappings of sections of a binary file of a prior version of the software. Bits of sections of a plurality of sections of the binary file of the prior version are logically combined, bit-by-bit, with bits of corresponding sections of the binary file of the updated version. The logically combining includes: applying an exclusive or operation; or applying an exclusive nor operation. The update file is built based on the mapping of the memory locations and on results of the logical combining.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 29, 2024
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Yoann BOUVET, Jean-Paul COUPIGNY
  • Publication number: 20240071912
    Abstract: SiC-based MOSFET electronic device comprising: a solid body; a gate terminal, extending into the solid body; a conductive path, extending at a first side of the solid body, configured to be electrically couplable to a generator of a biasing voltage; a protection element of a solid-state material, coupled to the gate terminal and to the conductive path, the protection element forming an electronic connection between the gate terminal and the conductive path, and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current through the protection element greater than a critical threshold; a buried cavity in the solid body accommodating, at least in part, the protection element.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 29, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Laura Letizia SCALIA, Cateno Marco CAMALLERI, Edoardo ZANETTI, Alfio RUSSO
  • Publication number: 20240072214
    Abstract: The present description concerns a package for an electronic device. The package including a plate and a lateral wall, separated by a layer made of a bonding material and at least one region made of a material configured to form in the region an opening between the inside and the outside of the package when the package is heated.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Olivier ZANELLATO, Remi BRECHIGNAC, Jerome LOPEZ
  • Publication number: 20240072775
    Abstract: A multi-level pulser circuit comprises a set of first input pins for receiving respective positive voltage signals at different voltage levels, a set of second input pins for receiving respective negative voltage signals at different voltage levels, and a reference input pin configured to receive a reference voltage signal intermediate the positive voltage signals and the negative voltage signals. The circuit comprises an output pin configured to supply a pulsed output signal. The circuit further comprises control circuitry configured to selectively couple the output pin to one of the first input pins, the second input pins and the reference input pin to generate the pulsed output signal at the output pin.
    Type: Application
    Filed: September 13, 2023
    Publication date: February 29, 2024
    Applicant: STMICROELECTRONICS S.R.L.
    Inventor: Marco VITI
  • Patent number: 11913831
    Abstract: An optical sensor includes at least one photodetector configured to be reverse biased at a voltage exceeding a breakdown voltage by an excess bias voltage. At least one control unit is configured to adjust the reverse bias of the at least one photodetector. A method of operating an optical sensor is also disclosed.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: February 27, 2024
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Neale Dutton, John Kevin Moore
  • Patent number: 11916353
    Abstract: Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: February 27, 2024
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Fabien Quercia, Jean-Michel Riviere