Patents Assigned to STMicroelectronics, Inc.
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Patent number: 10863681Abstract: The present disclosure is directed to a greenhouse or single container for plant growth coupled to the Internet of Things and including a microfluidic die for water or nutrient distribution. The microfluidic die is controllable automatically or with instructions from a remote user, based on sensors included within a growth environment.Type: GrantFiled: October 23, 2018Date of Patent: December 15, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Marco De Fazio, Simon Dodd
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Patent number: 10868906Abstract: A portable device includes one or more memories and travel mode control circuitry coupled to the one or more memories. The travel mode control circuitry, in operation, monitors motion data and detects a first travel state of the device based on the monitored motion data and an acceleration profile. When the first travel state of the device is detected, motion data and pressure data are monitored to detect a transition from the first travel state to a second travel state of the device. When the transition to the second travel state of the device is detected, one or more control signals are generated to cause the device to enter a first travel mode of operation.Type: GrantFiled: June 3, 2020Date of Patent: December 15, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Mahaveer Jain, Mahesh Chowdhary
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Patent number: 10859379Abstract: In an embodiment, a method for determining a speed of a vehicle in a dead-reckoning system includes measuring a centripetal acceleration, using an accelerometer, of the vehicle traversing a curved path on a plane of travel. The method also includes measuring an angular velocity, using a gyroscope, of the vehicle. The speed of the vehicle is calculated from the centripetal acceleration and the angular velocity.Type: GrantFiled: August 22, 2017Date of Patent: December 8, 2020Assignee: STMICROELECTRONICS, INC.Inventor: Dominique Paul Barbier
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Patent number: 10861984Abstract: An integrated transistor in the form of a nanoscale electromechanical switch eliminates CMOS current leakage and increases switching speed. The nanoscale electromechanical switch features a semiconducting cantilever that extends from a portion of the substrate into a cavity. The cantilever flexes in response to a voltage applied to the transistor gate thus forming a conducting channel underneath the gate. When the device is off, the cantilever returns to its resting position. Such motion of the cantilever breaks the circuit, restoring a void underneath the gate that blocks current flow, thus solving the problem of leakage. Fabrication of the nano-electromechanical switch is compatible with existing CMOS transistor fabrication processes. By doping the cantilever and using a back bias and a metallic cantilever tip, sensitivity of the switch can be further improved. A footprint of the nano-electromechanical switch can be as small as 0.1×0.1 ?m2.Type: GrantFiled: September 9, 2019Date of Patent: December 8, 2020Assignee: STMicroelectronics, Inc.Inventors: Qing Liu, John H. Zhang
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Patent number: 10854606Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.Type: GrantFiled: November 26, 2019Date of Patent: December 1, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Pierre Morin, Nicolas Loubet
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Patent number: 10854750Abstract: A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, and source and drain regions adjacent the channel region to generate shear and normal strain on the channel region. A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, source and drain regions adjacent the channel region, and a gate over the channel region. The fin may be canted with respect to the source and drain regions to generate shear and normal strain on the channel region.Type: GrantFiled: November 11, 2019Date of Patent: December 1, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Pierre Morin, Nicolas Loubet
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Patent number: 10847654Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.Type: GrantFiled: September 26, 2019Date of Patent: November 24, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Nicolas Loubet, Pierre Morin
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Patent number: 10845870Abstract: The present disclosure is directed to a system and method of determining a movement of a user's head with a ranging sensor. The ranging sensor transmits a ranging signal that is reflected off of a user's shoulder and received back at the ranging sensor. The received ranging signal can be used to determine distance between the user's head and the user's shoulder or to determine the reflectivity of the user's shoulder. With the distance or the reflectivity, a processor can be used to determine movement of the user's head. Furthermore, a multiple zone ranging sensor or multiple ranging sensors can be used to detect the user's shoulder in different spatial zones.Type: GrantFiled: August 10, 2018Date of Patent: November 24, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Xiaoyong Yang, Rui Xiao
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Patent number: 10843465Abstract: A method of making inkjet print heads may include forming recesses in a first surface of a first wafer to define inkjet chambers. The method may also include forming openings extending from a second surface of the first wafer through to respective ones of the inkjet chambers to define inkjet orifices. The method may further include forming a second wafer including ink heaters, and joining the first and second wafers together so that the ink heaters are aligned within respective inkjet chambers to thereby define the inkjet print heads.Type: GrantFiled: October 19, 2018Date of Patent: November 24, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Murray J. Robinson, Kenneth J. Stewart
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Patent number: 10840168Abstract: The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.Type: GrantFiled: October 29, 2018Date of Patent: November 17, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Jefferson Talledo, Tito Mangaoang
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Patent number: 10836167Abstract: The present disclosure provides supports for a microfluidic die and one or more additional die including, but not limited to, microfluidic die, ASICs, MEMS devices, and sensors. This includes semi-flexible supports that allow a microfluidic die to be at a 90 degree angle with respect to another die and rigid supports that allow a microfluidic and another die to be in close proximity to each other.Type: GrantFiled: November 2, 2018Date of Patent: November 17, 2020Assignee: STMICROELECTRONICS, INC.Inventor: Simon Dodd
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Patent number: 10823826Abstract: A time of flight range detection device includes a laser configured to transmit an optical pulse into an image scene, a return single-photon avalanche diode (SPAD) array, a reference SPAD array, a range detection circuit coupled to the return SPAD array and the reference SPAD array, and a laser driver circuit. The range detection circuit in operation determines a distance to an object based on signals from the return SPAD array and the reference SPAD array. The laser driver circuit in operation varies an output power level of the laser in response to the determined distance to the object.Type: GrantFiled: May 25, 2017Date of Patent: November 3, 2020Assignee: STMicroelectronics, Inc.Inventors: Xiaoyong Yang, Rui Xiao, Arnaud Deleule
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Patent number: 10824175Abstract: Devices, systems, and methods are provided for monitoring air flow through a server using differential pressure measurements. The device includes an external pressure sensor, an internal pressure sensor, and a controller that receives the pressures from the external and internal pressure sensors. The external pressure sensor detects air pressure of the ambient air around a server enclosure, the internal pressure sensor detects air pressure through a server enclosure, and the controller calculates a pressure differential between the pressure from the external pressure sensor and the internal pressure sensor. The controller can then generate a signal based on the pressure differential, the signal optionally controlling a cooling fan, generating an interrupt for the server circuitry, or performing some other action.Type: GrantFiled: July 24, 2018Date of Patent: November 3, 2020Assignee: STMicroelectronics, Inc.Inventor: Dominique Paul Barbier
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Patent number: 10816729Abstract: A sequence of processing steps presented herein is used to embed an optical signal path within an array of nanowires, using only one lithography step. Using the techniques disclosed, it is not necessary to mask electrical features while forming optical features, and vice versa. Instead, optical and electrical signal paths can be created substantially simultaneously in the same masking cycle. This is made possible by a disparity in the widths of the respective features, the optical signal paths being significantly wider than the electrical ones. Using a damascene process, the structures of disparate widths are plated with metal that over-fills narrow trenches and under-fills a wide trench. An optical cladding material can then be deposited into the trench so as to surround an optical core for light transmission.Type: GrantFiled: March 4, 2019Date of Patent: October 27, 2020Assignee: STMICROELECTRONICS, INC.Inventor: John H. Zhang
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Patent number: 10812079Abstract: An integrated circuit system-on-chip (SOC) includes a semiconductor substrate, a plurality of components made up of transistors formed in the substrate, and a plurality of interconnection lines providing electrical connectivity among the components. Use of a channel-less design eliminates interconnection channels on the top surface of the chip. Instead, interconnection lines are abutted to one another in a top layer of metallization, thus preserving 5-10% of chip real estate. Clock buffers that are typically positioned along interconnection channels between components are instead located within regions of the substrate that contain the components. Design rules for channel-less integrated circuits permit feed-through interconnections and exclude multi-fanout interconnections.Type: GrantFiled: September 26, 2018Date of Patent: October 20, 2020Assignee: STMicroelectronics, Inc.Inventors: Chetan Bisht, Harry Scrivener, III
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Patent number: 10804377Abstract: Stress is introduced into the channel of an SOI FinFET device by transfer directly from a metal gate. In SOI devices in particular, stress transfer efficiency from the metal gate to the channel is nearly 100%. Either tensile or compressive stress can be applied to the fin channel by choosing different materials to be used in the gate stack as the bulk gate material, a gate liner, or a work function material, or by varying processing parameters during deposition of the gate or work function materials. P-gates and N-gates are therefore formed separately. Gate materials suitable for use as stressors include tungsten (W) for NFETs and titanium nitride (TiN) for PFETs. An optical planarization material assists in patterning the stress-inducing metal gates. A simplified process flow is disclosed in which isolation regions are formed without need for a separate mask layer, and gate sidewall spacers are not used.Type: GrantFiled: March 13, 2018Date of Patent: October 13, 2020Assignee: STMICROELECTRONICS, INC.Inventor: John H. Zhang
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Patent number: 10802572Abstract: A system may include a motion sensor configured to generate a motion signal in response to a movement of an electronic device, and at least one feature detection circuit configured to determine at least one metric based on the motion signal. The system may further include a classifying circuit configured to determine whether the electronic device is in contact with a human body based on the at least one metric.Type: GrantFiled: February 2, 2017Date of Patent: October 13, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Sankalp Dayal, Mahesh Chowdhary, Mahaveer Jain
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Patent number: 10796984Abstract: The present disclosure is directed to a leadframe package having leads with protrusions on an underside of the leadframe. The protrusions come in various shapes and sizes. The protrusions extend from a body of encapsulant around the leadframe to couple to surface contacts on a substrate. The protrusions have a recess that is filled with encapsulant. Additionally, the protrusions may be part of the lead or may be a conductive layer on the lead. In some embodiments a die pad of the leadframe supporting a semiconductor die also has a protrusion on the underside of the leadframe. The protrusion on the die pad has a recess that houses an adhesive and at least part of the semiconductor die. The die pad with a protrusion may include anchor locks at the ends of the die pad to couple to the encapsulant.Type: GrantFiled: January 16, 2019Date of Patent: October 6, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Rennier Rodriguez, Raymond Albert Narvadez, Ernesto Antilano, Jr.
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Patent number: 10783240Abstract: A secure engine method includes providing an embedded microcontroller in an embedded device, the embedded microcontroller having internal memory. The method also includes providing a secure environment in the internal memory. The secure environment method recognizes a boot sequence and restricts user-level access to the secure environment by taking control over the secure environment memory. Taking such control may include disabling DMA controllers, configuring at least one memory controller for access to the secure environment, preventing the execution of instructions fetched from outside the secure environment, and only permitting execution of instructions fetched from within the secure environment. Secure engine program instructions are then executed to disable interrupts, perform at least one secure operation, and re-enable interrupts after performing the at least one secure operation.Type: GrantFiled: September 29, 2017Date of Patent: September 22, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Maurizio Gentili, Massimo Panzica
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Patent number: 10759169Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.Type: GrantFiled: March 18, 2019Date of Patent: September 1, 2020Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC., STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Simon Dodd, David S. Hunt, Joseph Edward Scheffelin, Dana Gruenbacher, Stefan H. Hollinger, Uwe Schober, Peter Janouch