Abstract: A microfluidic MEMS device is formed by a plurality of ejection cells each having a fluid chamber; an actuator chamber; a membrane having a first surface facing the actuator chamber and a second surface facing the fluid chamber; a piezoelectric actuator on the first surface of the membrane; and a passivation layer on the piezoelectric actuator. The membrane has an elongated area defining a longitudinal direction and a transverse direction. The passivation layer has a plurality of holes. The holes extend throughout the thickness of the passivation layer and, in a plan view, have an elongated shape with a greater dimension parallel to the longitudinal direction of the membrane and a smaller dimension parallel to the transverse direction.

Abstract: A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.

Abstract: Embodiments of the present disclosure are directed to a leadframe package with recesses formed in outer surface of the leads. The recesses are filled with a filler material, such as solder. The filler material in the recesses provides a wetable surface for filler material, such as solder, to adhere to during mounting of the package to another device, such as a printed circuit board (PCB). This enables strong solder joints between the leads of the package and the PCB. It also enables improved visual inspection of the solder joints after the package has been mounted.

Abstract: Generally described, one or more embodiments are directed to a leadframe package having a plurality of leads, a die pad, a semiconductor die coupled to the die pad, and encapsulation material. An inner portion of the die pad includes a perimeter portion that includes a plurality of protrusions that are spaced apart from each other. The protrusions aid in locking the die pad in the encapsulation material. The plurality of leads includes upper portions and base portions. The base portion of the plurality of leads are offset (or staggered) relative to the plurality of protrusions of the die pad. In particular, the base portions extend longitudinally toward the die pad and are located between respective protrusions. The upper portions of the leads include lead locks that extend beyond the base portions in a direction of adjacent leads. The lead locks and the protrusion in the die pad aid in locking the leads and the die pad in the encapsulation material.

Abstract: A first side of a tapeless leadframe package is etched to form a ring shaped protrusion and a lead protrusion extending from a base layer. An integrated circuit die is mounted to tapeless leadframe package in flip chip orientation with a front side facing the first side. An electrical and mechanical attachment is made between a bonding pad of the integrated circuit die and the lead protrusion. A mechanical attachment is made between the front side of the integrated circuit die and the ring shaped protrusion. The integrated circuit die and the protrusions from the tapeless leadframe package are encapsulated within an encapsulating block. The second side of the tapeless leadframe package is then etched to remove portions of the base layer and define a lead for a leadframe from the lead protrusion and further define a die support for the leadframe from the ring shaped protrusion.

Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.

Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.

Abstract: A device is provided that includes a first die having a first alignment structure that includes a plurality of first transmission columns arranged in a pattern and a second die positioned on the first die, the second die having a second alignment structure that includes a plurality of second transmission columns arranged in the same pattern as the first transmission columns. The first and second transmission columns are each coplanar with a first surface and a second surface of the first and second die, respectively.

Abstract: One or more embodiments are directed to semiconductor device packages having a cap with integrated metal interconnects or conductive leads. One embodiment is directed to a semiconductor device package that includes a cap having a cover extending along a first direction and sidewalls extending from the cover along a second direction that is transverse to the first direction. A plurality of electrical leads are disposed on inner surfaces of the sidewalls and extend over lower surfaces of the sidewalls. A semiconductor die is attached to an inner surface of the cover of the cap, and the semiconductor die is electrically coupled to the plurality of electrical leads.

Abstract: A device including microelectromechanical systems (MEMS) sensors is used in dead reckoning in conditions where Global Positioning System (GPS) signals or Global Navigation Satellite System (GNSS) signals are lost. The device is capable of tracking the location of the device after the GPS/GNSS signals are lost by using MEMS sensors such as accelerometers and gyroscopes. By calculating a misalignment angle between a sensor frame of the device with either the movement direction of the vehicle or the walking direction of a pedestrian using the MEMS sensors, the device can accurately calculate the location of a user of the device even without the GPS/GNSS signals. Accordingly, a device capable of tracking the location of a pedestrian and a user riding in a vehicle without utilizing GPS/GNSS signals can be provided.

Abstract: A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

Abstract: A method includes receiving, at a master agent, announcements from candidate consumer agents indicating the presence of the candidate consumer agents. Each announcement includes display parameters for a display of the corresponding candidate consumer agent. The method further includes receiving at the master agent content parameters from a producer agent, the content parameters defining characteristics of content to be provided by the consumer agent. A mosaic screen is configured based on the received announcements and the content parameters. This configuring of the mosaic screen includes selecting ones of the consumer agents for which an announcement was received and generating content distribution parameters based on the content parameters and the display parameters of the selected ones of the consumer agents. The generated content distribution parameters are provided to the consumer agent.

Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP) or a package containing a semiconductor die, with a die embedded within a substrate that is surrounded by an elastomer. The package includes nonconductive layers on surfaces of the substrate and the elastomer as well as conductive layers and conductive vias that extend through these layers to form electrical connections in the package. The package includes surfaces of the conductive material, which may be referred to as contacts. These surfaces of the conductive material are exposed on both sides of the package and allow the package to be mounted within an electronic device and have other electronic components coupled to the package, or allow the package to be included in a stacked configuration of semiconductor dice or packages.

Abstract: An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.

Abstract: A drive signal is applied to a MEMS gyroscope having several intrinsic resonant modes. Frequency and amplitude of mechanical oscillation in response to the drive signal is sensed. At startup, the drive signal frequency is set to a kicking frequency offset from a resonant frequency corresponding to a desired one of the intrinsic resonant modes. In response to sufficient sensed amplitude of mechanical oscillation at the kicking frequency, a frequency tracking process is engaged to control the frequency for the drive signal to sustain mechanical oscillation at the frequency of the desired one of the plurality of intrinsic resonant modes as the oscillation amplitude increases. When the increasing amplitude of the mechanical oscillation exceeds a threshold, a gain control process is used to exercise gain control over the applied drive signal so as to cause the amplitude of mechanical oscillation to match a further threshold. At that point start-up terminates.

Abstract: A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the substrate. Each semiconductor fin may have opposing first and second ends and a medial portion therebetween, and outermost fins of the plurality of semiconductor fins may comprise an epitaxial growth barrier on outside surfaces thereof. The FINFET may further include at least one gate overlying the medial portions of the semiconductor fins, a plurality of raised epitaxial semiconductor source regions between the semiconductor fins adjacent the first ends thereof, and a plurality of raised epitaxial semiconductor drain regions between the semiconductor fins adjacent the second ends thereof.

Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.

Abstract: In one embodiment, a method for detecting functional state of a microelectromechanical (MEMS) sensor is described. The method includes monitoring an input common-mode feedback (ICMFB) voltage generated by an ICMFB circuit coupled to the MEMS sensor through a plurality of nodes. The method also includes determining, using the monitored ICMFB voltage, whether all of the plurality of nodes of the MEMS sensor are electrically connected to the ICMFB circuit.

Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.