Abstract: A multi-chip system in which at least one of the chips includes a performance parameter encoded thereon. After system assembly, the performance parameter can be obtained by a companion chip and used to automatically or semi-automatically fine tune the companion chip to the specific parameters of the at least one chip.

Abstract: A method and integrated circuit for preserving a battery's charge and protecting electrical devices is disclosed. A maximum and a minimum battery voltage value at the output port are stored in a memory. A steady state battery voltage at the output port is measured and stored in the memory. A processor compares the measured steady battery voltage value to the maximum and the minimum battery voltage values. If the measured steady state battery voltage value is greater than the maximum battery voltage value, an over voltage state is reported by the processor. If the measured steady state battery voltage value is less than the minimum battery voltage value, a low battery voltage state is reported by the processor.

Abstract: A frequency-domain upmix process uses vector-based signal decomposition and methods for improving the selectivity of center channel extraction. The upmix processes described do not perform an explicit primary/ambient decomposition. This reduces the complexity and improves the quality of the center channel derivation. A method of upmixing a two-channel stereo signal to a three-channel signal is described. A left input vector and a right input vector are added to arrive at a sum magnitude. Similarly, the difference between the left input vector and the right input vector is determined to arrive at a difference magnitude. The difference between the sum magnitude and the difference magnitude is scaled to compute a center channel magnitude estimate, and this estimate is used to calculate a center output vector. A left output vector and a right output vector are computed. The method is completed by outputting the left output vector, the center output vector, and the right output vector.

Abstract: A simplified docking station arranged to couple together a media source device and a media sink device is disclosed. The docking station is configured to accept power from the media source device for powering the docking station itself and for providing power to the media sink device.

Abstract: Methods and systems are described for improving a data at a receiver using one or more signal peak detectors. A signal is received having an initial signal level from the transmitter, the signal having a long bit and a short bit. The initial signal voltage of the signal is measured using a signal peak detector. A pre-emphasis value is determined using the signal voltage and is communicated to the transmitter, causing the transmitter to transmit the signal using an adjusted signal level. A second signal voltage of the initial signal is measured using a second signal peak detector, the second signal voltage being used to determine the pre-emphasis value. In another embodiment, a state machine having data relating to appropriate pre-emphasis is used in determining the pre-emphasis value. In another embodiment, one peak detector is used to measure the long bit and another peak detector is used to measure the short bit. In another embodiment, the signal does not have associated link training data.

Abstract: A method and integrated circuit for preserving a battery's charge and protecting electrical devices is disclosed. A maximum and a minimum battery voltage value at the output port are stored in a memory. A steady state battery voltage at the output port is measured and stored in the memory. A processor compares the measured steady battery voltage value to the maximum and the minimum battery voltage values. If the measured steady state battery voltage value is greater than the maximum battery voltage value, an over voltage state is reported by the processor. If the measured steady state battery voltage value is less than the minimum battery voltage value, a low battery voltage state is reported by the processor.

Abstract: A processor executes one or more prefetch threads and one or more main computing threads. Each prefetch thread executes instructions ahead of a main computing thread to retrieve data for the main computing thread, such as data that the main computing thread may use in the immediate future. Data is retrieved for the prefetch thread and stored in a memory, such as data fetched from an external memory and stored in a buffer. A prefetch controller determines whether the memory is full. If the memory is full, a cache controller stalls at least one prefetch thread. The stall may continue until at least some of the data is transferred from the memory to a cache for use by at least one main computing thread. The stalled prefetch thread or threads are then reactivated.

Abstract: A data-storage disk includes a disk sector for storing data and a servo wedge located at the beginning of the sector. The servo wedge indentifies the sector in conjunction with both an initial positioning of a read-write head and a data read or write operation. By using a servo wedge to provide both an initial head position on disk spin up and a head position during a read or write operation, one can increase a disk's data-storage capacity by reducing the number of, or altogether eliminating, spin-up wedges.

Abstract: Methods and systems are described for displaying enabling the transmission, formatting, and display of multimedia data after a hot plug event during a start-up dead period. In particular, approaches for transmission, formatting, and display of multimedia data in the absence or non-operation of a hot plug detect system or signal, so that multimedia information can be displayed in a proper format even during the dead period when no hot plug detect signal is received.

Abstract: Methods and systems are described for transmitting and displaying video data after a hot plug event during a start-up dead period. In particular, hot plug events occurring when a toggleable hot plug detection mechanism is use.

Abstract: Methods, chips, systems, computer program products and data structures are described for conducting modification of color video signals from a first color format associated with an originating format to a second format compatible with a display media of a display device.

Abstract: Methods and systems are described for enabling display system data transmission during use. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes input processing circuitry for receiving audio-video signal and converting the audio-video data stream input into a low voltage differential signal (LVDS). The package includes a timing controller having timing extraction circuitry, a set of symbol buffers, a scheduler, and timing control circuitry. All configured to implement LVDS data transfer and in some implementation enable point to point data transfer from data buffers to associated column drivers.

Abstract: Methods and systems are described for displaying video data after a hot plug event during a start-up dead period. In particular, approaches for receiving data, determining whether link training can be performed and, if not, self-configuring a receiver to display the information in a proper format even during the dead period.

Abstract: Apparatus and methods for wireless data transmission in a multimedia network are disclosed. Disclosed is a network having a source coupled to a sink using a virtual channel that includes a wireless communication channel. A source end of the system provides a packetizing data stream having a stream of payloads such that each payload is associated with its respective originating source stream. The system configured to encode the packetized data stream for wireless transport. A non-wireless source end of the system receives quality of service information from downstream. Thereby enabling adjustments to the source content and packetized data streams.

Abstract: Methods and systems are described for enabling display system power saving during the operation of display devices. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes timing control circuitry configured to implement a power saving process during the blanking periods of the video signal. The invention further includes methods that support the operation of power saving processes.

Abstract: A system for supporting software pipelining using a shifting register queue is provided. The system includes a register file that comprises a plurality of registers. The register file is operable to receive a shift mask signal and a shift signal and to identify a shifting register queue within the register file based on the shift mask signal. The shifting register queue comprises a plurality of queue registers. The register file is further operable to shift the contents of the queue registers based on the shift signal.

Abstract: A detector recovers servo data from a servo signal generated by a read-write head, and determines the head-connection polarity from the recovered servo data. Such a detector allows a servo circuit to compensate for a reversed-connected read-write head, and thus allows a manufacturer to forego time-consuming and costly testing to determine whether the head is correctly connected to the servo circuit.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key including a first ciphering branch arranged to encrypt the at least part of the input data; a second ciphering branch arranged to generate the tag; and a single key schedule unit arranged to receive the key, to generate at least one sub-key based on the key and to provide the at least one sub-key to the first and second ciphering branches.

Abstract: A battery monitor circuit. The circuit includes a control module, a resistive load having a resistive value between a first and a second terminals and a part of that resistive value between the first and an intermediate terminals, a switch configured to couple the full load between circuit input and a common potential in response a pulse signal, a first comparator having inputs separately coupled to a voltage reference and the intermediate terminal, a second comparator having inputs separately coupled to the voltage reference and an input potential, a latch, a detection module having input coupled to second comparator output, and an alarm module. The latch is configured to latch a value at output of first comparator to another input of the detection module in response to the pulse signal; if input potential is less than a preselected magnitude, detection module output is configured to activate the alarm module.

Abstract: A threshold personalization circuit for a reset or supervisor chip includes personalization fuses, which shift a resistor divider to provide a variety of selectable voltage thresholds. The personalization fuses may provide hundreds of millivolts of adjustment. The threshold personalization circuit further includes trim fuses to fine tune the threshold to within a few millivolts of the target threshold voltage. The threshold personalization circuit includes a test mode to cycle through to a particular personalization trim, such that at prelaser testing the personalized value is found (the fuse blow for personalization is emulated) and then the trim fuse amount can be based on the actual final personalized voltage. This results in very accurate threshold voltages for all personalized values.