Patents Assigned to STMicroelectronics International N.V.
  • Patent number: 12020760
    Abstract: Disclosed herein is a method of operating a system in a test mode. When the test mode is an ATPG test mode, the method includes beginning stuck-at testing by setting a scan control signal to a logic one, setting a transition mode signal to a logic 0, and initializing FIFO buffer for ATPG test mode. The FIFO buffer is initialized for ATPG test mode by setting a scan reset signal to a logic 0 to place a write data register and a read data register associated with the FIFO buffer into a reset state, enabling latches of the FIFO buffer using an external enable signal, removing the external enable signal to cause the latches to latch, and setting the scan reset signal to a logic 1 to release the write data register and the read data register from the reset state, while not clocking the write data register.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: June 25, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Venkata Narayanan Srinivasan, Balwinder Singh Soni, Avneep Kumar Goyal
  • Patent number: 12019118
    Abstract: In an embodiment a processing system includes a test circuit configured to set an address value, an upper address limit and a lower address limit to a given reference bit sequence, verify whether the upper-limit comparison signal has a respective third logic level and/or whether the lower-limit comparison signal has the respective third logic level, assert an error signal in response to determining that the upper-limit comparison signal does not have the respective third logic level or the lower-limit comparison signal does not have the respective third logic level, repeat a certain operation for each of the N bits.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: June 25, 2024
    Assignees: STMicroelectronics International N.V., STMicroelectronics Application GmbH
    Inventors: Roberto Colombo, Vivek Mohan Sharma, Samiksha Agarwal
  • Publication number: 20240200980
    Abstract: A microelectromechanical sensor device has a detection structure and an associated electronic circuitry, configured to receive, when the device is powered, an external power supply voltage and provided with a voltage regulator generating a regulated voltage and with at least one voltage domain powered by the regulated voltage. The electronic circuitry has a power supply management core, always powered by the external power supply voltage and which controls the voltage regulator to selectively interrupt the power supply of the voltage domain to implement: a first power-down condition wherein the voltage regulator is disabled; and a second power-down condition wherein the voltage regulator is enabled to power the aforementioned voltage domain through the regulated voltage, the first and the second power-down conditions being associated with absence of data acquisition and/or processing by the sensor device.
    Type: Application
    Filed: November 17, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Salvatore POLI, Carmela MARCHESE
  • Publication number: 20240205611
    Abstract: The present disclosure is directed to transducer assemblies or device in which one or more buried cavities are present within a substrate and define or form one or more membranes along a surface of the substrate. One or more piezoelectric actuators are formed on the one or more membranes and the one or more piezoelectric actuators drive the membranes at an operating frequency with an operating bandwidth of the transducer assemblies. Each of the one or more membranes is anchored at respective portions to a main body portion of the substrate to provide robust and strong anchoring of each of the one or more membranes to push unwanted flexure modes outside the operating bandwidth of the transducer assemblies.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Domenico GIUSTI, Fabio QUAGLIA, Marco FERRERA, Carlo Luigi PRELINI
  • Publication number: 20240204127
    Abstract: The present description concerns an avalanche photodiode comprising: a main PN junction adapted to being reverse-biased; and a plurality of semiconductor regions including at least: a first epitaxial semiconductor region of a first conductivity type; and a second semiconductor region of the second conductivity type, said second region being arranged to at least partially surround the first region, and comprising surfaces in contact with surfaces of said first region. The present description also concerns a method of manufacturing such a photodiode.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Antonin ZIMMER, Dominique GOLANSKI, Sebastien PLACE, Guillaume MARCHAND
  • Publication number: 20240206039
    Abstract: A device is configured to operate in a first mode of operation during which the device is configured to receive a first supply voltage in a contactless manner. The device includes a light emitting element and a first circuit. The first circuit is configured to receive a second supply voltage generated from the first supply voltage. A first current is generated from the first supply voltage, independent from the second voltage, and applied to the light emitting element which is selectively turned on.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Albin PEVEC, Nejc SUHADOLNIK, Damjan BERCAN, Maksimiljan STIGLIC
  • Publication number: 20240199415
    Abstract: Disclosed herein is a process flow for forming a MEMS IMU including an accelerometer and a gyroscope each located in a separate sealed cavity maintained at a different pressure. Formation of the MEMS IMU includes the use of a first vHF release to etch a sacrificial layer underneath a structural layer containing the accelerometer and gyroscope and capping the device under formation to set both cavities at a first pressure. The floor of one of the cavities is formed to including a gas permeable layer. Formation further includes forming a chimney underneath the gas permeable layer and then performing a second vHF release to etch through the gas permeable layer and expose the cavity containing the gas permeable layer so that its pressure may be set to be different than that of the other cavity when the chimney is sealed.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Federico VERCESI, Andrea NOMELLINI, Paolo FERRARI
  • Publication number: 20240205055
    Abstract: Provided is a receiver circuit that receives a differential signal including positive and negative spikes. A first comparator produces an intermediate set signal that includes a pulse at each positive spike of the differential signal, and a second comparator produces an intermediate reset signal that includes a pulse at each negative spike of the differential signal. A sensing circuit extracts a common-mode voltage signal from the differential signal and asserts a control signal when the amplitude of the common-mode voltage signal exceeds a threshold. A logic circuit asserts a masking signal for an interval in response to asserting the control signal and de-asserts the masking signal in response to the interval elapsing. The logic circuit produces a corrected set signal. The logic circuit produces a corrected reset signal. An output circuit generates an output signal from the corrected set signal and the corrected reset signal.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Valerio GENNARI SANTORI, Carlo CURINA, Valerio BENDOTTI, Nicola DE CAMPO
  • Publication number: 20240201024
    Abstract: An integrated circuit temperature sensor includes two diode-connected bipolar transistors having different sizes. A switching circuit selectively applies the base-emitter voltages generated across the two diode-connected bipolar transistors to the input of a buffer circuit. A control unit controls alternate switching by the switching circuit. An analog-to-digital converter has an input connected to an output of the buffer circuit. The analog-to-digital converter calculates a numeric value corresponding to a difference between the voltages generated across the two diode-connected bipolar transistors, this difference in voltages being proportional to absolute temperature.
    Type: Application
    Filed: December 12, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Vincent BINET, Sebastien ORTET
  • Publication number: 20240201717
    Abstract: A microelectromechanical sensor device has a detection structure and an associated electronic circuitry; the electronic circuitry receives, when the microelectromechanical sensor device is powered, an external power supply voltage and is provided with a voltage regulator which generates a regulated voltage having a different value from the external power supply voltage and at least one voltage domain powered by the regulated voltage. The electronic circuitry has a power supply management core, always powered by the external power supply voltage and controlling the voltage regulator to interrupt power supply to the voltage domain and implement a first power-down condition of the microelectromechanical sensor device.
    Type: Application
    Filed: November 14, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Carmela MARCHESE, Salvatore POLI
  • Publication number: 20240202148
    Abstract: A computer system includes a central processing unit, a peripheral circuit configured to process data having a first format, a memory configured to store data intended for the peripheral circuit, the data having a second format distinct from the first format. The system includes a direct memory access controller configured, during a transmission of data from the memory towards the peripheral circuit, to recover data intended for the peripheral circuit and stored in the memory, to modify the format of the recovered data to obtain data having the first format, and to transmit the data according to the first format to the peripheral circuit. The central processing unit is configured to initialize a data transmission from the memory towards the peripheral circuit via the direct memory access controller.
    Type: Application
    Filed: December 12, 2023
    Publication date: June 20, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Jean-Christophe BATLLO, Zied GRISSA, Delphine LE GOASCOZ, Gwendhal BORREMANS
  • Publication number: 20240195405
    Abstract: A receiver circuit receives a differential signal that includes positive and negative spikes, and produces an output signal as a function of the differential signal. A first comparator produces an intermediate set signal that includes a pulse at each positive spike of the differential signal, and a second comparator produces an intermediate reset signal that includes a pulse at each negative spike of the differential signal. A logic circuit detects whether the digital signal switches between a first value and a second value, and whether the intermediate reset signal and the intermediate set signal include pulses lasting longer than a threshold. The logic produces a set correction signal and a reset correction signal. The logic circuit produces a corrected set signal and a corrected reset signal. An output circuit produces an output signal based on the corrected set signal and the corrected reset signal.
    Type: Application
    Filed: December 1, 2023
    Publication date: June 13, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Carlo CURINA, Valerio BENDOTTI, Nicola DE CAMPO, Valerio GENNARI SANTORI
  • Publication number: 20240188837
    Abstract: A blood pressure monitoring device includes a patch including two inertial measurement units placed adjacent to the skin of a user. The blood pressure monitoring device includes a control unit coupled to the patch and configured to receive sensor data from the inertial measurement units. The control unit includes an analysis model trained with multiple machine learning processes to generate blood pressure estimations based on the sensor data. A first general machine learning process trains the analysis model with a training set gathered from plurality of other individuals. The second general machine learning process retrains a portion of the analysis model with a second machine learning process utilizing individualized training set gathered from the user.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicants: STMICROELECTRONICS, INC., STMicroelectronics International N.V.
    Inventors: Mahesh CHOWDHARY, Vijay KUMAR, Goldy, Kolin PAUL
  • Publication number: 20240191996
    Abstract: A sensor system includes a plurality of inertial measurement units (IMU) and a control circuit. The control circuit is configured to receive sensor data from each of the inertial measurement units two alignment the timestamps of the sensor data, and to fuse the sensor data from the various IMUs. The control circuit detects whether the sensor data indicates a high degree movement or a low degree of movement and selects a high dynamic fusion process or a low dynamic fusion process based on the detected degree of movement.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Swapnil Sayan SAHA, Denis CIOCCA, Mahesh CHOWDHARY
  • Publication number: 20240194570
    Abstract: A common electrically conductive substrate includes substrate portions configured to host semiconductor chips. Adjacent substrate portions have mutually facing sides with elongate sacrificial connecting bars extending between the mutually facing sides. The electrically conductive substrate is cut along a length of the elongate sacrificial connecting bars to provide singulated individual substrate portions. The elongate sacrificial connecting bars are provided with an apertured structure comprising apertures distributed along the length of the elongate sacrificial connecting bars wherein the apertures provide zones of reduced resistance to cutting.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 13, 2024
    Applicant: STMicroelectronics International N.V.
    Inventor: Mauro MAZZOLA
  • Patent number: 12008200
    Abstract: A method for operating a touch sensing panel includes a touchscreen controller determining a first plurality of excitation signals in accordance with a first plurality of codes, wherein a sum of the first plurality of codes is a sequence of numbers having a same absolute value and signs alternating between adjacent numbers in the sequence of numbers. The method further includes the touchscreen controller transmitting each of the first plurality of excitation signals to a respective transmitting (TX) touch sensor of the touch sensing panel simultaneously during a first time frame. The method further includes the touchscreen controller determining touch strengths in accordance with a first plurality of output signals received by a plurality of receiving (RX) touch sensors of the touch sensing panel during the first time frame.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: June 11, 2024
    Assignee: STMicroelectronics International N.V.
    Inventor: Kien Beng Tan
  • Patent number: 12009830
    Abstract: A time-interleaved analog to digital converter (TI-ADC) includes a first sub-ADC configured to sample and convert an input analog signal to generate a first digital signal and a second sub-ADC configured to sample and convert said input analog signal to generate a second digital signal. Sampling by the second sub-ADC occurs with a time skew mismatch. A multiplexor interleaves the first and second digital signals to generate a third digital signal. A time skew mismatch error determination circuit processes the first and second digital signals to generate a time error corresponding to the time skew mismatch. A slope value of said third digital signal is determined and multiplied by the time error to generate a signal error. The signal error is summed with the third digital signal to generate a digital output signal which eliminates the error due to the time skew mismatch. This correction is performed in real time.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: June 11, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Ankur Bal, Vikram Singh
  • Publication number: 20240186991
    Abstract: An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a first inverter and a second inverter. The Schmitt trigger includes a pull-up transistor coupled to an input of the second inverter and configure to supply a high reference voltage to the input of the second inverter.
    Type: Application
    Filed: February 15, 2024
    Publication date: June 6, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Manoj Kumar TIWARI, Saiyid Mohammad Irshad RIZVI
  • Publication number: 20240186679
    Abstract: A waveguide has a first input/output for receiving/outputting a radio frequency (RF) wave and guiding the RF wave between the first input/output and a second input/output. An electronic integrated circuit chip is electrically connected at a front face to a metal level of a carrier substrate which includes a patch antenna. An electrically insulating embedding material surrounds the electronic chip and is disposed between the patch antenna and the first input/output of the waveguide which is at least in contact with the embedding material. The electronic chip cooperates electrically with the patch antenna so as to cause the patch antenna to transmit the RF wave to the first input/output through the embedding material. The electronic chip also processes an electrical signal from the patch antenna in response to the patch antenna receiving the radio frequency wave output by the first input/output via the embedding material.
    Type: Application
    Filed: December 1, 2023
    Publication date: June 6, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Romain COFFY, Laurent SCHWARTZ, Ludovic FOURNEAUD
  • Publication number: 20240186195
    Abstract: An integrated circuit package includes a support substrate having a mounting face and a lateral wall having an inner face and an outer face. The inner face delimits with the mounting face a cavity. The outer face includes a step extending outwardly of the package. An electronic chip disposed in the cavity and electrically connected to electrically-conductive contact pads. A sealing structure is bonded by a glue to an upper face of the lateral wall to seal the cavity. The glue does not spill out over the outer face of the lateral wall. Electrically-conductive connection elements are located over a lower face of the support substrate and electrically cooperate with the contact pads through an interconnection network located in the support substrate.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 6, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Laurent HERARD, Olivier ZANELLATO, Patrick LAURENT