Patents Assigned to STMicroelectronics Limited
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Patent number: 7353508Abstract: Call frame information is used by debugging software. It records how to restore the parent stack frame at any point during execution of a program. It is normally generated during compilation and stored in the executable in a compressed format, consisting of sequences of instructions that describe how the current call frame changes during execution of each function. Described herein is a means of generating call frame information at link time, using linker macro calls generated by a small set of assembler macros.Type: GrantFiled: July 26, 2002Date of Patent: April 1, 2008Assignee: STMicroelectronics LimitedInventors: Antony Bowers, Richard Shann
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Patent number: 7346822Abstract: An integrated circuit including test circuitry, the test circuitry including a counter for counting clock signals and having an output for providing a control signal. The counter being arranged to have an internal state, and the counter being arranged to change the control signal on the internal state of counter reaching a predetermined value.Type: GrantFiled: April 7, 2005Date of Patent: March 18, 2008Assignee: STMicroelectronics LimitedInventors: Robert Warren, Robert M. Mills
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Publication number: 20080030172Abstract: A battery charger is provided which has a power output to charge a battery. The battery charger comprises a power input and a circuit for determining a temperature at the battery charger. The battery charger further includes a controller which varies the power output among a plurality of non-zero power levels in dependence upon the difference between the determined temperature and a reference temperature.Type: ApplicationFiled: July 27, 2007Publication date: February 7, 2008Applicant: STMicroelectronics LimitedInventor: Saul Darzy
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Publication number: 20080034162Abstract: A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.Type: ApplicationFiled: July 26, 2007Publication date: February 7, 2008Applicant: STMicroelectronics LimitedInventors: Andrew Sturges, David May
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Patent number: 7325018Abstract: A method is disclosed for operating a computer system in order to validate data stored in a plurality of data files in a database. Each of the data files have an associated file type and are arranged in a plurality of data stores in the database. At least one of the data files is a data dependent file which contains data dependent upon data in one or more other files of the data store. The method includes the steps of selecting a file locator which is associated with a respective one data store in the database, via the selected file locator identifying a first dependent file and identifying one or more other files on which said first file is dependent. For each identified file a first file reader is selected which is associated with the file type of the identified file. Via each selected first file reader a predetermined parameter of the identified file is determined.Type: GrantFiled: January 24, 2001Date of Patent: January 29, 2008Assignee: STMicroelectronics LimitedInventor: David Smith
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Patent number: 7307631Abstract: An image is rendered which includes at least one light source, a first, shadow-casting object with a second, shadow-receiving object located on the side of the first shadow-casting object remote from said at least one light source. A shadow mask is generated which identifies for each of a plurality of pixels on the shadow receiving surface a grey level representing the intensity of shadow in each pixel. The intensity is determined utilizing the distance between the shadow-casting object and the shadow-receiving object.Type: GrantFiled: March 26, 2004Date of Patent: December 11, 2007Assignee: STMicroelectronics LimitedInventor: Mathieu Robart
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Publication number: 20070280475Abstract: A monolithic semiconductor integrated circuit is provided for selectively encrypting or decrypting data transmitted between one of a plurality of devices on the circuit and an external memory. Two series of data pathways connect the devices and the external memory. The first series of data pathways passes through a cryptographic circuit causing data to be encrypted or decrypted, and the other series of data pathways provides an unhindered route. When a data access request is made by a device, the data is selectively routed along one of the two series of data pathways according to the identification of the device making the data access request. In one example, if data is transmitted from a device to the external memory, the data is selectively encrypted before being stored in the external memory if the device transmitting the data is identified as secure.Type: ApplicationFiled: December 17, 2004Publication date: December 6, 2007Applicant: STMicroelectronics LimitedInventors: Andrew Dellow, Howard Gurney
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Patent number: 7299462Abstract: A method of preparing an executable program from a plurality of object code modules, at least one of said object code modules including section data specifying a plurality of functions associated with relocation instructions, at least some of which functions are called in the executable program. The method comprises the steps of assigning an attribute to each function, said attribute being capable of providing an indication of whether the function is reachable, reading the section data and relocation instructions to ascertain if the function is called and setting the attribute to indicate the called status and preparing the executable program to only include functions with an indicated called status of reachable. A linker is provided for preparing the executable program from object code modules containing the relocation instructions. A computer program is provided to control the linker.Type: GrantFiled: May 7, 2001Date of Patent: November 20, 2007Assignee: STMicroelectronics LimitedInventors: Richard Shann, Stephen Jones
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Publication number: 20070200960Abstract: A semiconductor integrated circuit for the processing of conditional access television signals that includes an input interface for receiving encrypted television signals and an output interface for output of decrypted television signals. The semiconductor integrated circuit is provided with some functionality restricted in some way by preventing one or more hardware circuit elements from operating, such as an MPEG decoder, display engine, IO ports or main CPU. To enable the functionality, a subscriber must pay for a service and then receives an encrypted message broadcast to the semiconductor integrated circuit that is decrypted and instructs functionality to be turned on or off.Type: ApplicationFiled: October 16, 2003Publication date: August 30, 2007Applicant: STMicroelectronics LimitedInventors: Peter Bennett, Paul Elliott, Andrew Dellow
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Patent number: 7253816Abstract: A computer graphics accelerator apparatus and method determines whether a pixel at predetermined pixel co-ordinates in an area being rasterized is within a triangle defining a sub-area of the area. The coordinate system in relation to which the triangle is defined is translated such that the pixel co-ordinates are disposed at the origin of the coordinate system. Determinants of matrices based on at least two of the coordinate values of at least two of the vertices are calculated and their signs compared. Based on this comparison a determination as to pixel location with respect to the triangle may be made.Type: GrantFiled: March 7, 2003Date of Patent: August 7, 2007Assignee: STMicroelectronics LimitedInventor: Toni Brkic
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Patent number: 7248602Abstract: A circuit and method for demultiplexing in a receiver a digital data stream including at least two types of data. In one particular application, such a receiver is used in a television system having a digital set-top-box receiver. A first control circuit extracts a packet identifier from an input data packet in the digital data stream, and generates a signal in dependence on whether the input data packet is of the first or second type. Sets of information associated with the first types of data packets and required by the receiver are stored in a memory under the control of a second control circuit. A third control circuit, responsive to receipt of the first type of input data packet, determines whether at least part of the input data packet matches the stored sets of information, and sets a match signal responsive thereto.Type: GrantFiled: April 22, 2003Date of Patent: July 24, 2007Assignee: STMicroelectronics LimitedInventors: William Robbins, David Wilkins
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Publication number: 20070160151Abstract: A video decoding circuit comprising: a first video data processor; a second video data processor; and a connection connecting the first video data processor and the second data processor; wherein the first video data processor is arranged to receive a first signal comprising encoded video data, process the first signal to provide a second signal and output the second signal. The first video data processor being arranged to process the first signal dependent on at least part of the received first signal. The second video data processor is arranged to receive at least a part of the second signal, process the at least a part of the second signal to provide a third signal, and output the third signal, the second and third signals comprising a decoded video image stream. The second video data processor is arranged to process the at least part of the second signal dependent on at least part of the at least part of second signal.Type: ApplicationFiled: November 23, 2004Publication date: July 12, 2007Applicants: STMicroelectronics Limited, STMicroelectronics S.r.Ll.Inventors: Martin Bolton, Michele Carrano
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Patent number: 7243202Abstract: A method of locating packet identifiers held in respective memory locations in a memory, the method comprising receiving a plurality of packets, each packet including a packet identifier, searching said memory locations in a sequence to compare an incoming packet identifier with packet identifiers stored in the memory until a match is found, incrementing one of a set of counters associated respectively with the memory locations, said incremented counter being the one associated with the memory location where the match packet identifier is held, and reading values of each of the counters and using said values to determine the sequence in which the memory locations are searched for subsequent incoming packet identifiers.Type: GrantFiled: March 27, 2002Date of Patent: July 10, 2007Assignee: STMicroelectronics LimitedInventor: Tom Thomas
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Patent number: 7234089Abstract: Circuitry for testing and implementing a distributed tristate bus, the circuitry being configured in the testing mode, when a first signal is supplied to a first enable input and a test enable signal is operative, the cascade circuitry outputs a cascade out signal to the cascade input via the cascade output, causing the second cascade circuitry to disable the enable input of the second tristate cell, thereby to reduce the possibility of contention of the data bus during scan testing.Type: GrantFiled: October 27, 2001Date of Patent: June 19, 2007Assignee: STMicroelectronics LimitedInventor: Gary Morton
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Publication number: 20070121943Abstract: A portion of data is obfuscated by performing a bitwise XOR function between bits of the data portion and bits of a mask. The mask is generated based on the memory address of the data portion. A bitfield representing the memory address of the data portion is split into subset bitfields. Each subset then forms the input of a corresponding primary randomizing unit. Each primary randomizing unit is arranged to generate an output bitfield that appears to be randomly correlated with the input, but which may be determined from the input if certain secret information is known. The output of the primary randomizing units is input into a series of secondary randomizing units. Each secondary randomizing unit is arranged to input at least one bit of the output of every primary randomizing unit. The output of the secondary randomizing units are then combined by concatenation to form a data mask.Type: ApplicationFiled: September 18, 2006Publication date: May 31, 2007Applicant: STMicroelectronics LimitedInventors: Andrew Dellow, Rodrigo Cordero
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Publication number: 20070124811Abstract: A memory stores data in an encrypted form. A modifiable register stores a memory address, a0, defining a boundary separating the memory into two regions. The lower region stores data encrypted using a key B, and the upper region stores data encrypted using a different key A. Data stored on the boundary address is encrypted using key A. Accordingly, when data is read from a memory address a, key A is used to decrypt the data if a?a0, and key B is used if a<a0. However, when data is written to a memory address a, then key A is used to encrypt the data if a?a0+1, key B is used if a<a0+1. When data is written to the boundary address, a0, the position of the boundary is caused to increase by one unit.Type: ApplicationFiled: September 18, 2006Publication date: May 31, 2007Applicant: STMicroelectronics LimitedInventors: Andrew Dellow, Peter Bennett, Rodrigo Cordero
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Publication number: 20070103997Abstract: A filter is arranged to selectively block or allow a data access command from an initiator according to whether the initiator is secure or insecure and whether a data source or destination being accessed is privileged or unprivileged. The data access command contains an identification of the initiator from which the data access command originated and an identification of the data source or destination being accessed. The security filter compares the initiator identification and data source or destination identification contained within the data access command with a list of those initiators defined as secure and a list of those data sources or destinations which are defined as unprivileged. The filter then blocks or allows the data access command signal according to a set of rules.Type: ApplicationFiled: August 18, 2006Publication date: May 10, 2007Applicant: STMicroelectronics LimitedInventors: Peter Bennett, Andrew Dellow
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Patent number: 7216342Abstract: A method of linking a plurality of object files to generate an executable program, the method comprises identifying in the object files at least one routine to be locked into a cache when the program is executed, locating said routine at a set of memory addresses which man onto a set of cache locations and introducing into the executable program gaps at other sets of memory addresses which map onto the same set of cache locations.Type: GrantFiled: March 14, 2002Date of Patent: May 8, 2007Assignee: STMicroelectronics LimitedInventors: Trefor Southwell, Peter Hedinger
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Patent number: 7200843Abstract: A method of linking a plurality of object code modules to form an executable program, each object code module having section data, a set of relocation instructions and one or more symbols, each symbol having a plurality of attributes associated therewith, wherein the relocation instructions include a data retrieval instruction having a symbol field identifying a symbol and an attribute field identifying a symbol attribute associated with the identified symbol to be retrieved, the method including reading at least one relocation instruction from the set of relocation instructions and where the relocation instruction is a data retrieval instruction, determining the symbol identified by the symbol field and retrieving one of the plurality of symbol attributes associated with the symbol in dependence on the contents of the symbol attributes field of the instruction.Type: GrantFiled: December 20, 2001Date of Patent: April 3, 2007Assignee: STMicroelectronics LimitedInventor: Richard Shann
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Publication number: 20070067621Abstract: A device for locating a DES key value that corresponds to a packet identification (PID) contained at a variable possible location which comprises part only of a 32-bit packet header. A table stored in memory contains for each DES key: (i) a packet header having 32 bits with a PID of either 12, 9 or 8 bits contained at a defined location and with zero values elsewhere, and (ii) a mask value also having 32 bits with ones contained at the said defined location of the PID and zeros elsewhere. The table is divided into regions for respective packet format types. An incoming packet header at an input is combined with a first one of the mask values from the table to provide a combined value that consists of the value held in the input packet header at the defined location and zeros elsewhere. This combined value is compared with the corresponding packet header stored in the table. When they are not equal, the combining and comparison is repeated for the next row of the table.Type: ApplicationFiled: September 15, 2006Publication date: March 22, 2007Applicant: STMicroelectronics LimitedInventor: Andrew Dellow