Patents Assigned to STMicroelectronics Limited
  • Image sensor
    Publication number: 20060125941
    Abstract: The image sensor includes an array of pixels, each pixel having a photo-diode, for providing a pixel voltage, an analog-to-digital converter (ADC) operable to convert the pixel voltage to a digital value and a memory for storing the digital value. Read circuitry is included for reading out the digital values from the pixels of the array in a predetermined order. The image sensor may be configured such that a counter incorporates the memory, and the counter may be adapted to operate as a shift register. The counters of two or more pixels may be connected to form one or more chains such that digital values can be read out in a bit-serial manner.
    Type: Application
    Filed: November 14, 2005
    Publication date: June 15, 2006
    Applicant: STMicroelectronics Limited
    Inventor: Donald Baxter
  • Processor and a method for handling and encoding no-operation instructions
    Patent number: 7062634
    Abstract: A processor is described in which the need to encode no-operation instructions (nops) in the program is minimised by providing a device for generating nops in response to information encoded in operative instructions.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: June 13, 2006
    Assignee: STMicroelectronics Limited
    Inventors: Trefor Southwell, Peter Hedinger
  • Voltage reference circuit
    Patent number: 7057382
    Abstract: A voltage reference circuit comprising a first reference voltage source, a second reference voltage source, at least one of said first and second reference voltage sources being dependent on temperature, and first circuitry connected to at least one of said first and second reference voltage sources to provide a third reference voltage, said third reference voltage being dependent on temperature.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: June 6, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Anna Sigurdardottir
  • Photodiode detector
    Publication number: 20060108657
    Abstract: The photodiode includes a substrate of a first semiconductor material and an isolating layer of a second semiconductor material. The second semiconductor material is of opposite doping character or type to the first semiconductor material. The isolating layer of the second semiconductor material is implanted with one or more wells of the first and second semiconductor materials and the substrate is separated from the isolating layer of the second semiconductor material by an epitaxial layer of the first semiconductor material.
    Type: Application
    Filed: November 23, 2005
    Publication date: May 25, 2006
    Applicant: STMicroelectronics Limited
    Inventor: Jeff Raynor
  • Device and method for processing a stream of data
    Patent number: 7050436
    Abstract: This invention relates to a device and method for producing a stream of data. The device receives a stream of data as an input and includes means for identifying a portion of the input stream and outputting the identified portion. The device also includes means for selecting a further portion of the input stream and outputting the selected portion. The relative timing between the two output streams is monitored and maintained with respect to the input stream.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: May 23, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Howard Gurney
  • Processing system
    Patent number: 7047245
    Abstract: A processing system which comprises means for storing a plurality of items defining a queue, pointer means having a first pointer and a second pointer associated with the beginning of said queue and a second pointer associated with the back of said queue; at least one writer for adding items to said queue; at least one reader for deleting items from said queue; and means for updating said second pointer when said at least one writer adds an item to said queue, said second pointer being updated by a swap operation.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: May 16, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Andrew Michael Jones
  • Secure OTP using external memory
    Publication number: 20060092049
    Abstract: A set-top-box has on-chip OTP memory emulated using an external flash memory and a series of on-chip fuses. The external memory is comprised of one or more regions, each having its own unique region identification. Each on-chip fuse corresponds to one of the memory regions and comprises a component which can be caused to change to a particular (blown) state irreversibly. When data first needs to be written to a region of the external memory, the identification of that region is appended to the data itself together with a parity field and a validity field. The resultant data packet is then encrypted by a cryptographic circuit using a secret key unique to the set-top-box and the encrypted data packet is written to the specified region of the external memory. Then, the on-chip fuse corresponding to the region that has been written to is irreversibly blown, effectively locking that region.
    Type: Application
    Filed: September 27, 2005
    Publication date: May 4, 2006
    Applicant: STMicroelectronics Limited
    Inventor: Andrew Dellow
  • Scan chain element and associated method
    Patent number: 7038494
    Abstract: A scan chain element in an integrated circuit, the scan chain element including; a first latch connected to accept test data as an input, a second latch connected to accept the output of the first latch as an input, control logic for accepting a clock signal and a hold signal, the scan chain element being operable in a first mode such that the control logic is configured to supply the clock signal to the first latch and subsequently, in response to the hold signal, to supply the clock signal to the second latch to latch the data from the output of the first latch.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: May 2, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Gary Morton
  • Common stack system for a debugging device and method
    Patent number: 7039831
    Abstract: During debugging of target system by a host system, s single stack is used for an exception by a set of applications running on the processor of the target. To achieve this, the stack is dynamically loaded by the host to a reserved memory region, and a vector of the target is set to point to that reserved memory region. The exception handlers of each application then use the vector to access the stack.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: May 2, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Mark Phillips
  • Circuitry for carrying out at least one of a square root and a division operation
    Patent number: 7039666
    Abstract: The invention provides circuitry for carrying out at least one of a square root operation and a division operation. The circuitry utilizes a carry slave adder and a carry propagate adder part. The carry save adder and the carry propagate adder part are arranged in parallel.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: May 2, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Tariq Kurd
  • Interface device
    Patent number: 7031903
    Abstract: A communication device for a target integrated circuit chip having a digital processor, an on-chip emulator for controlling the digital processor and for collecting operation data from the digital processor for communicating to off-chip circuitry, and a target on-chip universal serial bus interface connected to the on-chip emulator, the communication device including an Ethernet port, an universal serial bus port and a further integrated circuit chip having on-chip universal serial bus interface, the on-chip Ethernet interface being connected to the Ethernet port, the interfaces being connected to the processing circuitry for translating between Ethernet protocol data on an Ethernet bus connected to the Ethernet port and universal serial bus data for the target on-chip universal serial bus interface.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: April 18, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Anthony Debling
  • Cell replacement algorithm
    Patent number: 7017131
    Abstract: A method of replacing standard cells with high speed cells in the design of a circuit using a computer program, said application specific integrated circuit design comprising a plurality of high speed cells and a plurality of standard cells, said high speed cells and standard cells being arranged to form a plurality of paths on said application specific integrated circuit, said method comprising the steps of: timing said plurality of paths identifying cells occurring on paths for which timing targets are not met; upgrading at least one of said identified cells to a high speed cell.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: March 21, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Paul Barnes
  • Built-in test support for an integrated circuit
    Patent number: 7010732
    Abstract: Test circuitry for testing an integrated circuit, the integrated circuit being configurable to accept input data from stimulus scan cells and to provide output data to response scan cells, the test circuitry including stimulus circuitry for providing test data to the integrated circuit; input selection means operable to control which of the test data and the input data are received at the integrated circuit; capture circuitry for capturing output data from the integrated circuit and generating response data; output selection means operable to select which of the output data and the response data are received by the response scan cells.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: March 7, 2006
    Assignee: STMicroelectronics Limited
    Inventors: Steven Firth, William Bryan Barnes
  • Compiling computer programs including branch instructions
    Patent number: 7007272
    Abstract: This patent describes a method of compiling a computer program from a sequence of computer instructions including a plurality of first, set branch, instructions which each identify a target address for a branch and a plurality of associated second, effect branch instructions which each implement a branch to a target address. The method comprising the steps of: reading the computer instructions in blocks; allocating each set branch instruction to an initial node in a dominator tree, the initial node being the node which contains the corresponding effect branch instruction; for the first determining the effect of migrating set branch instructions to each of a set of ancestor nodes in the dominator tree based on a performance cost parameter and selecting an ancestor node with the best performance cost parameter; locating said set branch instruction at the selected ancestor node.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: February 28, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Stephen Clarke
  • Reset in a system-on-chip circuit
    Publication number: 20060036888
    Abstract: An electronic device having first circuitry operating in a first clock environment and second circuitry operating in a second clock environment, the first circuitry being arranged to generate a soft reset signal for resetting the second circuitry, the integrated circuit further including: a soft reset hold circuit clocked in the first clock environment connected to receive the soft reset signal and to generate an output reset signal in an asserted state; and a synchronizer clocked in the second clock environment connected to receive the output reset signal and to generate a retimed reset signal in an asserted state after a predetermined period, wherein the retimed reset signal is fed back to the soft reset hold circuit to cause the output reset signal to adopt a deasserted state at the end of said predetermined period.
    Type: Application
    Filed: July 5, 2005
    Publication date: February 16, 2006
    Applicant: STMicroelectronics Limited
    Inventors: Robert Warren, David Smith
  • Method and system for identifying inaccurate models
    Patent number: 6996513
    Abstract: A method and system for identifying an inaccurate model of a hardware circuit includes the steps of simulating a digital model and an analogue model of the circuit to provide first and second sets of simulation results respectively. For each result in the first and second sets of simulation an integer value is determined which represents that result. The integer values are stored in first and second sets of comparison results respectively and the sets of comparison results are compared. An output signal indicating that at least one of the models is inaccurate is produced if the comparison results contradict.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: February 7, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Peter Bellam
  • Packet conversion
    Patent number: 6990100
    Abstract: A method of converting a packet of data from a source format to a target format, the packet including a type indicator and at least one data field, the method including the steps of storing a table for each packet type, each table including for each data field of that packet type a value representative of a storage requirement in memory and a corresponding field descriptor denoting the nature of the data field; receiving a packet in a source format; identifying the type of packet from the type indicator; accessing the stored table for the type of packet identified and thus obtaining for each data field a value representative of a storage requirement in memory and a field descriptor for that field; and using the value and the field descriptor to load the packet into a target memory according to the target format specified by the field descriptor.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: January 24, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Douglas John Turner
  • Switchable clock source
    Patent number: 6982573
    Abstract: A clock source selector for selecting either a first clock signal A or a second clock signal B in accordance with a switch request signal includes three retiming circuits each consisting of two clocked flip-flops. The switch request signal is first retimed relative to clock A to give a signal P, is then retimed relative to clock B to give a signal Q, and finally is retimed relative to clock A to give a signal R. Selector circuitry operates such that when signal Q is asserted, the second clock signal B is output, when neither signal P nor signal R, as combined by a NOR gate, are asserted, the first clock signal A is output, and at other times a zero level is output. The clock source selector can be used in an integrated circuit to form a glitch-free multiplexer.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: January 3, 2006
    Assignee: STMicroelectronics Limited
    Inventors: Matt Hutson, Andrew Dellow, Tom Ryan, Paul Elliott
  • Card detection
    Publication number: 20050284938
    Abstract: A card reader reads data stored on a card. A contact signal is produced whose state is indicative of the presence or absence of electrical contact between the card and the card reader. A high state indicates the presence of electrical contact and a low state indicates the absence of electrical contact. Upon insertion of the card into the card reader, vibrations and other mechanical perturbations of the card cause the state of the contact signal to fluctuate rapidly between high and low states. The state of the contact signal is periodically sampled for a predetermined period of time and the number of samples for which the contact signal was high are counted. If the number of high samples exceeds a threshold then stable electrical contact is deemed to have been established between the card and the card reader and a system reset is performed.
    Type: Application
    Filed: June 14, 2005
    Publication date: December 29, 2005
    Applicant: STMicroelectronics Limited
    Inventors: Jeremy Whaley, Matthew Hutson
  • Orientation sensor and associated methods
    Publication number: 20050285946
    Abstract: An orientation sensor for use with an image sensor is provided, which includes at least two polarizers with different orientations and associated photodetectors and a signal processing unit. The orientation sensor can be incorporated in a digital camera. When the camera is exposed to daylight, which is polarized, the relative outputs from the differently oriented polarizers can be compared to record the orientation of the camera. This orientation can be stored with the image data so that a user does not have to manually change the orientation of an image on an image display device.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 29, 2005
    Applicant: STMicroelectronics Limited
    Inventor: Jeffrey Raynor