Abstract: The present disclosure is directed to a package that includes a plurality of die that are stacked on each other. The plurality of die are within a first resin and conductive layer is on the first resin. The conductive layer is coupled between ones of first conductive vias extending into the first resin to corresponding ones of the plurality of die. The conductive layer and the first conductive vias couple ones of the plurality of die to each other. A second conductive via extends into the first resin to a contact pad of the substrate, and the conductive layer is coupled to the second conductive via coupling ones of the plurality of die to the contact pad of the substrate. A second resin is on and covers the first resin and the conductive layer on the first resin. In some embodiments, the first resin includes a plurality of steps (e.g., a stepped structure). In some embodiments, the first resin includes inclined surfaces (e.g., sloped surfaces).

Abstract: A molded carrier is formed by a unitary body made of a laser direct structuring (LDS) material and includes a blind opening with a bottom surface. The unitary body includes: a floor body portion defining a back side and the bottom surface of the blind opening and an outer peripheral wall body portion defining a sidewall surface of the blind opening. LDS activation followed by electro-plating is used to produce: a die attach pad and bonding pad at the bottom surface; land grid array (LGA) pads at the back side; and vias extending through the floor body portion to make electrical connections between the die attach pad and one LGA pad and between the bonding pad and another LGA pad. An integrated circuit chip is mounted to the die attach pad and wire bonded to the bonding pad. A wafer-scale manufacturing process is used to form the molded carrier.

Abstract: The present disclosure is directed to embodiments of optical sensor packages. For example, at least one embodiment of an optical sensor package includes a light-emitting die, a light-receiving die, and an interconnect substrate within a first resin. A first transparent portion is positioned on the light-emitting die and the interconnect substrate, and a second transparent portion is positioned on the light-receiving die and the interconnect substrate. A second resin is on the first resin, the interconnect substrate, and the first and second transparent portions, respectively. The second resin partially covers respective surfaces of the first and second transparent portions, respectively, such that the respective surfaces are exposed from the second resin.

Abstract: An integrated circuit transistor device includes a semiconductor substrate providing a drain, a first doped region buried in the semiconductor substrate providing a body and a second doped region in the semiconductor substrate providing a source. A trench extends into the semiconductor substrate and passes through the first and second doped regions. An insulated polygate region within the trench surrounds a polyoxide region that may have void inclusion. The polygate region is formed by a first gate lobe and second gate lobe on opposite sides of the polyoxide region. A pair of gate contacts are provided at each trench. The pair of gate contacts includes: a first gate contact extending into the first gate lobe at a location laterally offset from the void and a second gate contact extending into the second gate lobe at a location laterally offset from the void.

Abstract: The present disclosure is directed to a gas sensor device that detects gases with large molecules (e.g., a gas with a molecular weight between 150 g/mol and 450 g/mol), such as siloxanes. The gas sensor device includes a thin film gas sensor and a bulk film gas sensor. The thin film gas sensor and the bulk film gas sensor each include a semiconductor metal oxide (SMO) film, a heater, and a temperature sensor. The SMO film of the thin film gas sensor is an thin film (e.g., between 90 nanometers and 110 nanometers thick), and the SMO film of the bulk film gas sensor is an thick film (e.g., between 5 micrometers and 20 micrometers thick). The gas sensor device detects gases with large molecules based on a variation between resistances of the SMO thin film and the SMO thick film.

Abstract: A semiconductor device having a channel between active sections or portions of the device is disclosed. An elastic material, such as dielectric or a polymer, is deposited into the channel and cured to increase flexibility and thermal expansion properties of the semiconductor device. The elastic material reduces the thermal and mechanical mismatch between the semiconductor device and the substrate to which the semiconductor device is coupled in downstream processing to improve reliability. The semiconductor device may also include a plurality of channels formed transverse with respect to each other. Some of the channels extend all the way through the semiconductor device, while other channels extend only partially through the semiconductor device.

Abstract: A molded carrier is formed by a unitary body made of a laser direct structuring (LDS) material and includes a blind opening with a bottom surface. The unitary body includes: a floor body portion defining a back side and the bottom surface of the blind opening and an outer peripheral wall body portion defining a sidewall surface of the blind opening. LDS activation followed by electro-plating is used to produce: a die attach pad and bonding pad at the bottom surface; land grid array (LGA) pads at the back side; and vias extending through the floor body portion to make electrical connections between the die attach pad and one LGA pad and between the bonding pad and another LGA pad. An integrated circuit chip is mounted to the die attach pad and wire bonded to the bonding pad. A wafer-scale manufacturing process is used to form the molded carrier.

Abstract: An integrated circuit device includes a metal contact and a passivation layer extending on a sidewall of the metal contact and on first and second surface portions of a top surface of the metal contact. The passivation layer is format by a stack of layers including: a tetraethyl orthosilicate (TEOS) layer; a Phosphorus doped TEOS (PTEOS) layer on top of the TEOS layer; and a Silicon-rich Nitride layer on top of the PTEOS layer. The TEOS and PTEOS layers extend over the first surface portion, but not the second surface portion, of the top surface of the metal contact. The Silicon-rich Nitride layer extends over both the first and second surface portions, and is in contact with the second surface portion.

Abstract: An integrated circuit includes a polysilicon region that is doped with a dopant. A portion of the polysilicon region is converted to a polyoxide region which includes un-oxidized dopant ions. A stack of layers overlies over the polyoxide region. The stack of layers includes: a first ozone-assisted sub-atmospheric pressure thermal chemical vapor deposition (O3 SACVD) TEOS layer; and a second O3 SACVD TEOS layer; wherein the first and second O3 SACVD TEOS layers are separated from each other by a dielectric region. A thermally annealing is performed at a temperature which induces outgassing of passivation atoms from the first and second O3 SACVD TEOS layers to migrate to passivate interface charges due to the presence of un-oxidized dopant ions in the polyoxide region.

Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.

Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.

Abstract: Disclosed herein is a method of reducing noise captured by an image sensor. The method includes affixing a bottom surface of a glass covering to the image sensor, permitting light to impinge upon the glass covering, and shaping the glass covering such that when the light that impinges upon the glass covering impinges upon a sidewall of the glass covering, the sidewall reflects the light on a trajectory away from the image sensor.

Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.

Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.

Abstract: A proximity sensor includes a printed circuit board substrate, a semiconductor die, electrical connectors, a lens, a light emitting assembly, and an encapsulating layer. The semiconductor die is positioned over the printed circuit board substrate with its upper surface facing away from the printed circuit board substrate. Each of the electrical connectors is in electrical communication with a contact pad of the semiconductor die and a respective contact pad of the printed circuit board substrate. The lens is positioned over a sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads facing the printed circuit board substrate. The encapsulating layer is positioned on the printed circuit board substrate, at least one of the electrical connectors, the semiconductor die, the lens, and the light emitting assembly.

Abstract: The present disclosure is directed to at least one semiconductor package including a die within an encapsulant having a first sidewall, an adhesive layer on the encapsulant and having a second sidewall coplanar with the first sidewall of the encapsulant, and an insulating layer on the adhesive layer having a third sidewall coplanar with the first sidewall and the second sidewall. A method of manufacturing the at least one semiconductor package includes forming an insulating layer on a temporary adhesion layer of a carrier, forming an adhesive layer on the insulating layer, and forming a plurality of openings through the adhesive layer and the insulating layer. The plurality of openings through the adhesive layer and the insulating layer may be formed by exposing the adhesive layer and the insulating layer to a laser.

Abstract: A method of manufacturing a chip-sized package includes providing a wafer having a die area formed therein adjacent a front face thereof, with the die area having pads formed thereon. Vias in the wafer are formed to extend between a back face of the wafer and a back side of some of the pads of the die area. Solder pads connected to the vias are formed, and a thermal pad is formed on the back side of the wafer opposite to the die area. Cavities are formed in the back face of the wafer to define pillars extending outwardly from a planar portion of the die area, some of the pillars having the solder pads at a distal end thereof, at least one of the pillars having the thermal pad at a distal end thereof. The wafer is singulated to form a chip-sized package including an integrated circuit die.

Abstract: A digital image sensor package includes an image sensor substrate and a glass covering. The image sensor substrate carries photodiodes. The glass covering has a bottom surface, a top surface opposite the bottom surface, and a sidewall delimiting a perimeter edge of the glass covering. The glass covering overlies the photodiodes. A surface area of the top surface of the glass covering is greater than a surface area of the bottom surface of the glass covering such that the sidewall is anti-perpendicular to the top and bottom surfaces of the glass.

Abstract: Trenches are opened from a top surface of a production wafer that extend down through scribe areas to a depth that is only partially through a semiconductor substrate. Prior to performing a bumping process, a first handle is attached to the top surface of the production wafer. A back surface of the semiconductor substrate is then thinned to reach the trenches and form a wafer level chip scale package at each integrated circuit location delimited by the trenches. A second handle is then attached to a bottom surface of the thinned semiconductor substrate, and the first handle is removed to expose underbump metallization pads at the top surface. The bumping process is then performed to form a solder ball at each of the exposed underbump metallization pads.

Abstract: The present disclosure is directed to a gas sensor device that detects gases with large molecules (e.g., a gas with a molecular weight between 150 g/mol and 450 g/mol), such as siloxanes. The gas sensor device includes a thin film gas sensor and a bulk film gas sensor. The thin film gas sensor and the bulk film gas sensor each include a semiconductor metal oxide (SMO) film, a heater, and a temperature sensor. The SMO film of the thin film gas sensor is an thin film (e.g., between 90 nanometers and 110 nanometers thick), and the SMO film of the bulk film gas sensor is an thick film (e.g., between 5 micrometers and 20 micrometers thick). The gas sensor device detects gases with large molecules based on a variation between resistances of the SMO thin film and the SMO thick film.