Patents Assigned to STMicroelectronics Pte Ltd
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Publication number: 20240194709Abstract: Disclosed herein is a method of reducing noise captured by an image sensor. The method includes affixing a bottom surface of a glass covering to the image sensor, permitting light to impinge upon the glass covering, and shaping the glass covering such that when the light that impinges upon the glass covering impinges upon a sidewall of the glass covering, the sidewall reflects the light on a trajectory away from the image sensor.Type: ApplicationFiled: February 21, 2024Publication date: June 13, 2024Applicant: STMicroelectronics PTE LTDInventors: Laurent HERARD, David GANI
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Patent number: 12002898Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.Type: GrantFiled: June 10, 2021Date of Patent: June 4, 2024Assignee: STMICROELECTRONICS PTE LTDInventor: Jing-En Luan
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Patent number: 11996397Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.Type: GrantFiled: June 28, 2021Date of Patent: May 28, 2024Assignee: STMICROELECTRONICS PTE LTDInventor: David Gani
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Patent number: 11988743Abstract: A proximity sensor includes a printed circuit board substrate, a semiconductor die, electrical connectors, a lens, a light emitting assembly, and an encapsulating layer. The semiconductor die is positioned over the printed circuit board substrate with its upper surface facing away from the printed circuit board substrate. Each of the electrical connectors is in electrical communication with a contact pad of the semiconductor die and a respective contact pad of the printed circuit board substrate. The lens is positioned over a sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads facing the printed circuit board substrate. The encapsulating layer is positioned on the printed circuit board substrate, at least one of the electrical connectors, the semiconductor die, the lens, and the light emitting assembly.Type: GrantFiled: November 14, 2022Date of Patent: May 21, 2024Assignee: STMICROELECTRONICS PTE LTDInventors: Jing-En Luan, Jerome Teysseyre
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Publication number: 20240145258Abstract: The present disclosure is directed to at least one semiconductor package including a die within an encapsulant having a first sidewall, an adhesive layer on the encapsulant and having a second sidewall coplanar with the first sidewall of the encapsulant, and an insulating layer on the adhesive layer having a third sidewall coplanar with the first sidewall and the second sidewall. A method of manufacturing the at least one semiconductor package includes forming an insulating layer on a temporary adhesion layer of a carrier, forming an adhesive layer on the insulating layer, and forming a plurality of openings through the adhesive layer and the insulating layer. The plurality of openings through the adhesive layer and the insulating layer may be formed by exposing the adhesive layer and the insulating layer to a laser.Type: ApplicationFiled: October 18, 2023Publication date: May 2, 2024Applicant: STMICROELECTRONICS PTE LTDInventor: David GANI
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Publication number: 20240128203Abstract: A method of manufacturing a chip-sized package includes providing a wafer having a die area formed therein adjacent a front face thereof, with the die area having pads formed thereon. Vias in the wafer are formed to extend between a back face of the wafer and a back side of some of the pads of the die area. Solder pads connected to the vias are formed, and a thermal pad is formed on the back side of the wafer opposite to the die area. Cavities are formed in the back face of the wafer to define pillars extending outwardly from a planar portion of the die area, some of the pillars having the solder pads at a distal end thereof, at least one of the pillars having the thermal pad at a distal end thereof. The wafer is singulated to form a chip-sized package including an integrated circuit die.Type: ApplicationFiled: September 18, 2023Publication date: April 18, 2024Applicant: STMicroelectronics PTE LTDInventor: Jing-En LUAN
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Patent number: 11942496Abstract: A digital image sensor package includes an image sensor substrate and a glass covering. The image sensor substrate carries photodiodes. The glass covering has a bottom surface, a top surface opposite the bottom surface, and a sidewall delimiting a perimeter edge of the glass covering. The glass covering overlies the photodiodes. A surface area of the top surface of the glass covering is greater than a surface area of the bottom surface of the glass covering such that the sidewall is anti-perpendicular to the top and bottom surfaces of the glass.Type: GrantFiled: May 21, 2021Date of Patent: March 26, 2024Assignee: STMicroelectronics Pte LtdInventors: Laurent Herard, David Gani
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Patent number: 11908831Abstract: Trenches are opened from a top surface of a production wafer that extend down through scribe areas to a depth that is only partially through a semiconductor substrate. Prior to performing a bumping process, a first handle is attached to the top surface of the production wafer. A back surface of the semiconductor substrate is then thinned to reach the trenches and form a wafer level chip scale package at each integrated circuit location delimited by the trenches. A second handle is then attached to a bottom surface of the thinned semiconductor substrate, and the first handle is removed to expose underbump metallization pads at the top surface. The bumping process is then performed to form a solder ball at each of the exposed underbump metallization pads.Type: GrantFiled: September 23, 2021Date of Patent: February 20, 2024Assignee: STMicroelectronics PTE LTDInventors: Chun Yi Teng, David Gani
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Publication number: 20240036169Abstract: The present disclosure is directed to an optical sensor package with a first assembly and a second assembly with an encapsulant extending between and coupling the first assembly and the second assembly. The first assembly includes a first substrate, a first die on the first substrate, a transparent material on the first die, and an infrared filter on the transparent material. The second assembly includes a second substrate, a second die on the second substrate, a transparent material on the second die, and an infrared filter on the transparent material. Apertures are formed through the encapsulant aligned with the first die and the second die. The first die is configured to transmit light through one aperture, wherein the light reflects off an object to be detected and is received at the second die through another one of the apertures.Type: ApplicationFiled: October 12, 2023Publication date: February 1, 2024Applicant: STMicroelectronics PTE LTDInventor: Jing-En LUAN
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Publication number: 20240036019Abstract: The present disclosure is directed to a gas sensor device that detects gases with large molecules (e.g., a gas with a molecular weight between 150 g/mol and 450 g/mol), such as siloxanes. The gas sensor device includes a thin film gas sensor and a bulk film gas sensor. The thin film gas sensor and the bulk film gas sensor each include a semiconductor metal oxide (SMO) film, a heater, and a temperature sensor. The SMO film of the thin film gas sensor is an thin film (e.g., between 90 nanometers and 110 nanometers thick), and the SMO film of the bulk film gas sensor is an thick film (e.g., between 5 micrometers and 20 micrometers thick). The gas sensor device detects gases with large molecules based on a variation between resistances of the SMO thin film and the SMO thick film.Type: ApplicationFiled: October 11, 2023Publication date: February 1, 2024Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS PTE LTDInventors: Malek BRAHEM, Hatem MAJERI, Olivier LE NEEL, Ravi SHANKAR, Enrico Rosario ALESSI, Pasquale BIANCOLILLO
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Publication number: 20240030115Abstract: The present disclosure is directed to a power package with copper plating terminals. The power package includes at least two terminals coupled to a semiconductor die. An area of a first terminal is greater than an area of a second terminal. The first and second terminals extend to a first and second conductive layers in a backside of the package. A third conductive layer is coupled to a backside surface of the die that is coplanar with the first and second conductive layers. The terminals and conductive layers are copper plating. A first molding compound covers the die and terminals, while a second molding compound fills distances between the die and the extensions of the terminals. The copper plating and the molding compounds enhance the performance of the packaged device in a high-power circuit. In addition, robustness of the package is enhanced compared with conventional packages including wire bonding.Type: ApplicationFiled: July 14, 2023Publication date: January 25, 2024Applicant: STMICROELECTRONICS PTE LTDInventor: Loic Pierre Louis RENARD
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Publication number: 20230411332Abstract: A wafer level chip scale package (WLCSP) with portions that have different thicknesses. A first passive surface of a die in the WLSCP includes a plurality of surfaces. The plurality of surfaces may include inclined surfaces or flat surfaces. Thicker portions of die, with more semiconductor material remaining are non-critical portions that increase a WLCSP's strength for further processing and handling after formation, and the thinner portions are critical portions that reduce a Coefficient of Thermal Expansion (CTE) mismatch between a WLCSP and a PCB.Type: ApplicationFiled: June 23, 2023Publication date: December 21, 2023Applicant: STMICROELECTRONICS PTE LTDInventor: Jing-En LUAN
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Patent number: 11848378Abstract: A semiconductor substrate has a trench extending from a front surface and including a lower part and an upper part. A first insulation layer lines the lower part of the trench, and a first conductive material in the lower part is insulated from the semiconductor substrate by the first insulating layer to form a field plate electrode of a transistor. A second insulating layer lines sidewalls of the upper part of said trench. A third insulating layer lines a top surface of the first conductive material at a bottom of the upper part of the trench. A second conductive material fills the upper part of the trench. The second conductive material forms a gate electrode of the transistor that is insulated from the semiconductor substrate by the second insulating layer and further insulated from the first conductive material by the third insulating layer.Type: GrantFiled: July 12, 2021Date of Patent: December 19, 2023Assignee: STMicroelectronics Pte LtdInventors: Ditto Adnan, Maurizio Gabriele Castorina, Voon Cheng Ngwan, Fadhillawati Tahir
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Patent number: 11828877Abstract: The present disclosure is directed to an optical sensor package with a first assembly and a second assembly with an encapsulant extending between and coupling the first assembly and the second assembly. The first assembly includes a first substrate, a first die on the first substrate, a transparent material on the first die, and an infrared filter on the transparent material. The second assembly includes a second substrate, a second die on the second substrate, a transparent material on the second die, and an infrared filter on the transparent material. Apertures are formed through the encapsulant aligned with the first die and the second die. The first die is configured to transmit light through one aperture, wherein the light reflects off an object to be detected and is received at the second die through another one of the apertures.Type: GrantFiled: September 9, 2020Date of Patent: November 28, 2023Assignee: STMicroelectronics PTE LTDInventor: Jing-En Luan
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Patent number: 11828875Abstract: A semiconductor package that is a proximity sensor includes a light transmitting die, a light receiving die, an ambient light sensor, a cap, and a substrate. The light receiving die and the light transmitting die are coupled to the substrate. The cap is coupled to the substrate forming a first chamber around the light transmitting die and a second chamber around the light receiving die. The cap further includes a recess with contact pads. The ambient light sensor is mounted within the recess of the cap and coupled to the contact pads. The cap includes electrical traces that are coupled to the contact pads within the recess coupling the ambient light sensor to the substrate. By utilizing a cap with a recess containing contact pads, a proximity sensor can be formed in a single semiconductor package all while maintaining a compact size and reducing the manufacturing costs of proximity sensors.Type: GrantFiled: December 14, 2021Date of Patent: November 28, 2023Assignee: STMICROELECTRONICS PTE LTDInventor: David Gani
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Patent number: 11821884Abstract: The present disclosure is directed to a gas sensor device that detects gases with large molecules (e.g., a gas with a molecular weight between 150 g/mol and 450 g/mol), such as siloxanes. The gas sensor device includes a thin film gas sensor and a bulk film gas sensor. The thin film gas sensor and the bulk film gas sensor each include a semiconductor metal oxide (SMO) film, a heater, and a temperature sensor. The SMO film of the thin film gas sensor is an thin film (e.g., between 90 nanometers and 110 nanometers thick), and the SMO film of the bulk film gas sensor is an thick film (e.g., between 5 micrometers and 20 micrometers thick). The gas sensor device detects gases with large molecules based on a variation between resistances of the SMO thin film and the SMO thick film.Type: GrantFiled: February 3, 2021Date of Patent: November 21, 2023Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS PTE LTDInventors: Malek Brahem, Hatem Majeri, Olivier Le Neel, Ravi Shankar, Enrico Rosario Alessi, Pasquale Biancolillo
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Patent number: 11808723Abstract: The present disclosure is directed to a gas sensor device that includes a plurality of gas sensors. Each of the gas sensors includes a semiconductor metal oxide (SMO) film, a heater, and a temperature sensor. Each of the SMO films is designed to be sensitive to a different gas concentration range. As a result, the gas sensor device is able to obtain accurate readings for a wide range of gas concentration levels. In addition, the gas sensors are selectively activated and deactivated based on a current gas concentration detected by the gas sensor device. Thus, the gas sensor device is able to conserve power as gas sensors are on when appropriate instead of being continuously on.Type: GrantFiled: April 21, 2021Date of Patent: November 7, 2023Assignee: STMICROELECTRONICS PTE LTDInventors: Malek Brahem, Hatem Majeri, Olivier Le Neel, Ravi Shankar
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Patent number: 11774422Abstract: The present disclosure is directed to a selective multi-gas sensor device that detects when a high concentration level of a particular gas, such as methane, carbon monoxide, and/or ethanol, is present. The selective multi-gas sensor device detects and identifies a particular gas based on a ratio between a sensitivity of a gas sensitive material at a first temperature and a sensitivity of the gas sensitive material at a second temperature.Type: GrantFiled: July 1, 2019Date of Patent: October 3, 2023Assignee: STMicroelectronics PTE LTDInventors: Fangxing Yuan, Ravi Shankar, Olivier Le Neel
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Publication number: 20230307302Abstract: A semiconductor package includes a silicon substrate with an active surface and an inactive surface. A semiconductor device, such as an image, light, or optical sensor, is formed in the active surface and disposed on the substrate. A glass plate is coupled to the substrate with adhesive. The glass plate includes a sensor area that corresponds to the area of the semiconductor device and holes through the glass plate that are generally positioned around the sensor area of the glass plate. During formation of the package, the holes through the glass plate allow gas released by the adhesive to escape the package and prevent formation of a gas bubble.Type: ApplicationFiled: March 15, 2023Publication date: September 28, 2023Applicants: STMICROELECTRONICS LTD, STMICROELECTRONICS PTE LTDInventors: David GANI, Hui-Tzu Wang
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Patent number: 11742437Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP), with a die coupled to a central portion of a transparent substrate. The transparent substrate includes a central portion having and a peripheral portion surrounding the central portion. The package includes a conductive layer coupled to a contact of the die within the package that extends from the transparent substrate to an active surface of the package. The active surface is utilized to mount the package within an electronic device or to a printed circuit board (PCB) accordingly. The package includes a first insulating layer separating the die from the conductive layer, and a second insulating layer on the conductive layer.Type: GrantFiled: February 26, 2021Date of Patent: August 29, 2023Assignees: STMICROELECTRONICS LTD, STMICROELECTRONICS PTE LTDInventors: David Gani, Yiying Kuo