Abstract: One or more embodiments are directed to methods of removing a sacrificial layer from semiconductor wafers during wafer processing. In at least one embodiment, the sacrificial layer is removed from a wafer during an O2 plasma etch step. In one embodiment, the sacrificial layer is poly(p-phenylene-2, 6-benzobisoxazole) (PBO) or polyimide. The O2 plasma etch step causes a residue to form on the wafer. The residue is removed by immersing the wafer a solution that is a mixture of the tetramethylammonium hydroxide (TMAH) and water.

Abstract: A semiconductor substrate has a trench extending from a front surface and including a lower part and an upper part. A first insulation layer lines the lower part of the trench, and a first conductive material in the lower part is insulated from the semiconductor substrate by the first insulating layer to form a field plate electrode of a transistor. A second insulating layer lines sidewalls of the upper part of said trench. A third insulating layer lines a top surface of the first conductive material at a bottom of the upper part of the trench. A second conductive material fills the upper part of the trench. The second conductive material forms a gate electrode of the transistor that is insulated from the semiconductor substrate by the second insulating layer and further insulated from the first conductive material by the third insulating layer.

Abstract: A method of forming a solder connection includes forming a solder mask on a thermal pad of a printed circuit board. The solder mask leaves unmasked portions of the thermal pad and forming the solder mask includes forming a plurality of mask stripes extending from edges of each unmasked portion towards a center of the unmasked portion. The method includes depositing solder paste on the unmasked portions of the thermal pad and placing an exposed thermal pad of an integrated circuit package on the solder paste deposited on the thermal pad of the printed circuit board. The method includes forming a solder connection by heating the solder paste between the unmasked portions of the thermal pad on the printed circuit board and the exposed thermal pad of the integrated circuit package.

Abstract: A battery charging system includes a first electrical connector disposed facing a first shelf, a second electrical connector disposed facing a second shelf, a first charge device coupled to the first electrical connector, and a second charge device coupled to the second electrical connector. A mobile device includes a first electrical connector, a first shelf portion and a second shelf portion, which are facing the first electrical connector, and a third shelf portion and a fourth shelf portion, which are facing the second electrical connector. Each of the electrical connectors of the battery charging system and the mobile device includes a first conductor, a second conductor, and a third conductor, with the first conductor electrically coupled to the third conductor, and the second conductor electrically isolated from and disposed between the first and third conductors, which enable the battery charging system and mobile device to easily swap batteries.

Abstract: A compact microelectronic gas sensor module includes electrical contacts formed in such a way that they do not consume real estate on an integrated circuit chip. Using such a design, the package can be miniaturized further. The gas sensor is packaged together with a custom-designed Application Specific Integrated Circuit (ASIC) that provides circuitry for processing sensor signals to identify gas species within a sample under test. In one example, the output signal strength of the sensor is enhanced by providing an additional metal surface area in the form of pillars exposed to an electrolytic gas sensing compound, while reducing the overall package size. In some examples, bottom side contacts are formed on the underside of the substrate on which the gas sensor is formed. Sensor electrodes may be electrically coupled to the ASIC directly, or indirectly by vias.

Abstract: A semiconductor package that is a proximity sensor includes a light transmitting die, a light receiving die, an ambient light sensor, a cap, and a substrate. The light receiving die and the light transmitting die are coupled to the substrate. The cap is coupled to the substrate forming a first chamber around the light transmitting die and a second chamber around the light receiving die. The cap further includes a recess with contact pads. The ambient light sensor is mounted within the recess of the cap and coupled to the contact pads. The cap includes electrical traces that are coupled to the contact pads within the recess coupling the ambient light sensor to the substrate. By utilizing a cap with a recess containing contact pads, a proximity sensor can be formed in a single semiconductor package all while maintaining a compact size and reducing the manufacturing costs of proximity sensors.

Abstract: A first dielectric layer made of a first dielectric material is deposited over a semiconductor substrate. A buffer layer is then deposited on an upper surface of the first dielectric layer. A trench is opened to extend through the buffer layer and the first dielectric layer. A second dielectric layer made of a second dielectric material is the deposited in a conformal manner on the buffer layer and filling the trench. Chemical mechanical polishing of the second dielectric layer is performed to remove overlying portions of the second dielectric layer with the buffer layer being used as a polish stop. After removing the buffer layer, the first dielectric layer and the second dielectric material filling the trench form a pre-metallization dielectric layer having a substantially planar upper surface.

Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.

Abstract: The present disclosure is directed to a package (e.g., a chip scale package, a wafer level chip scale package (WLCSP), or a package containing a sensor die) with a sensor die on a substrate (e.g., an application-specific integrated circuit die (ASIC), an integrated circuit, or some other type of die having active circuitry) and encased in a molding compound. The sensor die includes a sensing component that is aligned with a centrally located opening that extends through the substrate. The centrally located opening extends through the substrate at an inactive portion of the substrate. The centrally located opening exposes the sensing component of the sensor die to an external environment outside the package.

Abstract: A digital image sensor package includes an image sensor substrate and a glass covering. The image sensor substrate carries photodiodes. The glass covering has a bottom surface, a top surface opposite the bottom surface, and a sidewall delimiting a perimeter edge of the glass covering. The glass covering overlies the photodiodes. A surface area of the top surface of the glass covering is greater than a surface area of the bottom surface of the glass covering such that the sidewall is anti-perpendicular to the top and bottom surfaces of the glass.

Abstract: A method for forming a molded proximity sensor with an optical resin lens and the structure formed thereby. A light sensor chip is placed on a substrate, such as a printed circuit board, and a diode, such as a laser diode, is positioned on top of the light sensor chip and electrically connected to a bonding pad on the light sensor chip. Transparent, optical resin in liquid form is applied as a drop over the light sensor array on the light sensor chip as well as over the light-emitting diode. After the optical resin is cured, a molding compound is applied to an entire assembly, after which the assembly is polished to expose the lenses and have a top surface flush with the top surface of the molding compound.

Abstract: One or more embodiments are directed to ambient light sensor packages, and methods of making ambient light sensor packages. One embodiment is directed to an ambient light sensor package that includes an ambient light sensor die having opposing first and second surfaces, a light sensor on the first surface of the ambient light sensor die, one or more conductive bumps on the second surface of the ambient light sensor die, and a light shielding layer on at least the first surface and the second surface of the ambient light sensor die. The light shielding layer defines an opening over the light sensor. The ambient light sensor package may further include a transparent cover between the first surface of the ambient light sensor die and the light shielding layer, and an adhesive that secures the transparent cover to the ambient light sensor die.

Abstract: An integrated circuit includes a polysilicon region that is doped with a dopant. A portion of the polysilicon region is converted to a polyoxide region which includes un-oxidized dopant ions. A stack of layers overlies over the polyoxide region. The stack of layers includes: a first ozone-assisted sub-atmospheric pressure thermal chemical vapor deposition (O3 SACVD) TEOS layer; and a second O3 SACVD TEOS layer; wherein the first and second O3 SACVD TEOS layers are separated from each other by a dielectric region. A thermally annealing is performed at a temperature which induces outgassing of passivation atoms from the first and second O3 SACVD TEOS layers to migrate to passivate interface charges due to the presence of un-oxidized dopant ions in the polyoxide region.

Abstract: An integrated circuit includes a MOSFET device and a monolithic diode device, wherein the monolithic diode device is electrically connected in parallel with a body diode of the MOSFET device. The monolithic diode device is configured so that a forward voltage drop VfD2 of the monolithic diode device is less than a forward voltage drop VfD1 of the body diode of the MOSFET device. The forward voltage drop VfD2 is process tunable by controlling a gate oxide thickness, a channel length and body doping concentration level. The tunability of the forward voltage drop VfD2 advantageously permits design of the integrated circuit to suit a wide range of applications according to requirements of switching speed and efficiency.

Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.

Abstract: A method for forming a molded proximity sensor with an optical resin lens and the structure formed thereby. A light sensor chip is placed on a substrate, such as a printed circuit board, and a diode, such as a laser diode, is positioned on top of the light sensor chip and electrically connected to a bonding pad on the light sensor chip. Transparent, optical resin in liquid form is applied as a drop over the light sensor array on the light sensor chip as well as over the light-emitting diode. After the optical resin is cured, a molding compound is applied to an entire assembly, after which the assembly is polished to expose the lenses and have a top surface flush with the top surface of the molding compound.

Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP), with a die coupled to a central portion of a transparent substrate. The transparent substrate includes a central portion having and a peripheral portion surrounding the central portion. The package includes a conductive layer coupled to a contact of the die within the package that extends from the transparent substrate to an active surface of the package. The active surface is utilized to mount the package within an electronic device or to a printed circuit board (PCB) accordingly. The package includes a first insulating layer separating the die from the conductive layer, and a second insulating layer on the conductive layer.

Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.

Abstract: A blind opening is formed in a bottom surface of a semiconductor substrate to define a thin membrane suspended from a substrate frame. The thin membrane has a topside surface and a bottomside surface. A stress structure is mounted to one of the topside surface or bottomside surface of the thin membrane. The stress structure induces a bending of the thin membrane which defines a normal state for the thin membrane. Piezoresistors are supported by the thin membrane. In response to an applied pressure, the thin membrane is bent away from the normal state and a change in resistance of the piezoresistors is indicative of the applied pressure.

Abstract: A first dielectric layer made of a first dielectric material is deposited over a semiconductor substrate. A buffer layer is then deposited on an upper surface of the first dielectric layer. A trench is opened to extend through the buffer layer and the first dielectric layer. A second dielectric layer made of a second dielectric material is the deposited in a conformal manner on the buffer layer and filling the trench. Chemical mechanical polishing of the second dielectric layer is performed to remove overlying portions of the second dielectric layer with the buffer layer being used as a polish stop. After removing the buffer layer, the first dielectric layer and the second dielectric material filling the trench form a pre-metallization dielectric layer having a substantially planar upper surface.