Patents Assigned to STMicroelectronics S.r.l.
  • Publication number: 20250151322
    Abstract: A MOSFET device comprising: a structural region, made of a semiconductor material having a first type of conductivity, which extends between a first side and a second side opposite to the first side along an axis; a body region, having a second type of conductivity opposite to the first type, which extends in the structural region starting from the first side; a source region, having the first type of conductivity, which extends in the body region starting from the first side; a gate region, which extends in the structural region starting from the first side, traversing entirely the body region; and a shielding region, having the second type of conductivity, which extends in the structural region between the gate region and the second side. The shielding region is an implanted region self-aligned, in top view, to the gate region.
    Type: Application
    Filed: October 15, 2024
    Publication date: May 8, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mario Giuseppe SAGGIO, Edoardo ZANETTI
  • Patent number: 12294341
    Abstract: A receiver or transmitter circuit includes a signal propagation path between a radio-frequency (RF) signal node and a baseband processing circuit. Variable gain circuitry is configured to vary a gain applied to a signal propagating between the RF signal node and the baseband processing circuit. The variable gain circuitry varies the gain via first, coarse steps as well as via second, fine steps. This facilitates fine matching of the gains experienced by signals propagating over the in-phase and the quadrature branches in the transmitter and/or receiver circuit.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: May 6, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gaetano Cosentino, Carmelo Burgio
  • Patent number: 12294035
    Abstract: An optoelectronic device with a semiconductor body that includes: a bottom cathode structure, formed by a bottom semiconductor material, and having a first type of conductivity; and a buffer region, arranged on the bottom cathode structure and formed by a buffer semiconductor material different from the bottom semiconductor material. The optoelectronic device further includes: a receiver comprising a receiver anode region, which is formed by the bottom semiconductor material, has a second type of conductivity, and extends in the bottom cathode structure; and an emitter, which is arranged on the buffer region and includes a semiconductor junction formed at least in part by a top semiconductor material, different from the bottom semiconductor material.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: May 6, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Massimo Cataldo Mazzillo, Valeria Cinnera Martino, Antonella Sciuto
  • Patent number: 12292567
    Abstract: A microelectromechanical mirror device includes a supporting frame of semiconductor material and a plate of semiconductor material. The plate is connected to the supporting frame so as to be orientable around at least one rotation axis. A reflective layer is arranged on a first region of the plate. A piezoelectric actuation structure extends on a second region of the plate adjacent to the reflective layer. The piezoelectric actuation structure is configured to apply forces such as to modify a curvature of the plate.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: May 6, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nicolo′ Boni, Roberto Carminati, Massimiliano Merli
  • Patent number: 12293729
    Abstract: An optoelectronic device includes a backlight panel illuminating a display panel. The backlight panel includes an array of light emitting pixels, each light emitting pixel having at least one subpixel with one or more light emitting diodes positioned on a substrate. The pixel further includes at least one photodetector positioned on the substrate and arranged to detect an amount of reflected light emitted by said subpixel and reflected by the display panel.
    Type: Grant
    Filed: December 4, 2023
    Date of Patent: May 6, 2025
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l.
    Inventors: Jonathan Steckel, Giovanni Conti, Gaetano L'Episcopo, Mario Antonio Aleo, Carmelo Occhipinti
  • Patent number: 12285534
    Abstract: A system to sanitize a surface includes an emitter. The emitter of the system to sanitize the surface includes: a light source configured to generate light at a sanitizing wavelength; a receiver configured to receive a wireless signal; and a processing circuit for the emitter configured to turn the light source on, turn the light source off, and adjust an intensity of light generated by the light source depending on the wireless signal. The system to sanitize the surface further includes a sensor. The sensor of the system to sanitize the surface includes: a photoelectric transducer configured to convert light at the sanitizing wavelength to a current; and a processing circuit for the sensor powered by the current and in communication with a transmitter to transmit the wireless signal, the processing circuit for the sensor being configured to control emission of the wireless signal depending on a power level supplied by the current.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 29, 2025
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (Grenoble 2) SAS
    Inventors: Roberto La Rosa, Jean Camiolo, Laurent Yvan Louis Jamet
  • Publication number: 20250123478
    Abstract: A system includes a module formed by a first supporting portion, a second supporting portion, a first die carrying a first reflector and housed in the first supporting portion, and a second die carrying a second reflector and housed in the second supporting portion. The first and second supporting portions are spaced apart to define a gap therebetween. The second supporting portion includes an input hole defined therein to receive an incoming beam and direct it toward the first reflector. The first supporting portion includes an output hole defined therein to allow passage of an outgoing beam reflected by the second reflector. The first and second reflectors are configured to sequentially reflect the incoming beam to generate the outgoing beam.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 17, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco DEL SARTO, Alex GRITTI, Amedeo MAIERNA, Luca MAGGI
  • Publication number: 20250126877
    Abstract: A substrate made of doped single-crystal silicon has an upper surface. A doped single-crystal silicon layer is formed by epitaxy on top of and in contact with the upper surface of the substrate. Either before or after forming the doped single-crystal silicon layer, and before any other thermal treatment step at a temperature in the range from 600° C. to 900° C., a denuding thermal treatment is applied to the substrate for several hours. This denuding thermal treatment is at a temperature higher than or equal to 1,000° C.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 17, 2025
    Applicants: STMicroelectronics S.r.l., STMicroelectronics (Crolles 2) SAS
    Inventors: Pierpaolo MONGE ROFFARELLO, Isabella MICA, Didier DUTARTRE, Alexandra ABBADIE
  • Patent number: 12278460
    Abstract: An embodiment pulse generator circuit is configured to apply a current pulse to two output terminals. The pulse generator circuit comprises an LC resonant circuit comprising an inductance and a capacitance connected in series between a first node and a negative input terminal. The pulse generator circuit comprises a charge circuit configured to charge the capacitance via a supply voltage, a first electronic switch configured to selectively short-circuit the two output terminals, a second electronic switch configured to selectively connect the two output terminals in parallel with the LC resonant circuit, and a control circuit configured to drive the first and the second electronic switch.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: April 15, 2025
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics S.r.l.
    Inventors: Romeo Letor, Antoine Pavlin, Alfio Russo, Nadia Lecci
  • Patent number: 12279350
    Abstract: A LED driver chip includes driver circuits, each being coupled to a different pin and including a fault-detection circuit. Each fault-detection circuit includes a force circuit forcing current to a force node, and a sense circuit including a current sensor coupled to the force node, and a comparator comparing a voltage at the force node to a reference voltage to generate a comparison output. Control circuitry, in a pin-to-pin short detection mode, activates the force circuit of a first of the driver circuits and activates thep sense circuit of a second of the driver circuits, in a pin-to-ground short detection mode, activates the force and the sense circuit of the same driver circuits. The comparison output of the comparator of the activated sense circuit, if is higher or if lower of the reference voltage, indicates if short between pin or to ground, respectively, is present.
    Type: Grant
    Filed: May 23, 2024
    Date of Patent: April 15, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maria Francesca Seminara, Salvatore Rosario Musumeci
  • Publication number: 20250120319
    Abstract: A piezoelectric microelectromechanical structure is provided with a piezoelectric stack having a main extension in a horizontal plane and a variable section in a plane transverse to the horizontal plane. The stack is formed by a bottom-electrode region, a piezoelectric material region arranged on the bottom-electrode region, and a top-electrode region arranged on the piezoelectric material region. The piezoelectric material region has, as a result of the variable section, a first thickness along a vertical axis transverse to the horizontal plane at a first area, and a second thickness along the same vertical axis at a second area. The second thickness is smaller than the first thickness. The structure at the first and second areas can form piezoelectric detector and a piezoelectric actuator, respectively.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Domenico GIUSTI, Irene MARTINI, Davide ASSANELLI, Paolo FERRARINI, Carlo Luigi PRELINI, Fabio QUAGLIA
  • Publication number: 20250119061
    Abstract: A DC-DC converter circuit includes a switching stage with first and second switches, and a control circuit coupled to the switching stage. The control circuit detects a threshold for changing between a synchronous operation mode and an asynchronous operation mode, synchronizes the detected threshold with a beginning of a new switching cycle, applies feed-forward compensation at the beginning of an ON-time period to vary a duty cycle, and generates drive signals to control the switching stage.
    Type: Application
    Filed: December 20, 2024
    Publication date: April 10, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro BERTOLINI, Alberto CATTANI, Stefano RAMORINI, Alessandro GASPARINI
  • Patent number: 12273030
    Abstract: A power switch current sensing circuit includes matching first and second transistors having sources connected to first and second terminals, respectively, of the power switch. A current mirror has a first node coupled to a drain of the first transistor and a second node coupled to a drain of the second transistor. The current mirror sinks a current from the first node equal to a current flowing through the second transistor. A biasing circuit provides a same biasing voltage to the control terminals of the first and second transistors. An output resistance is coupled between the first node and a reference voltage node. A difference between a current flowing through the first transistor and the current sunk by the current mirror circuit from the first node flows through the output resistance. An output voltage produced at the first node is indicative of the current flowing through the power switch.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: April 8, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventor: Stefano Ramorini
  • Patent number: 12270990
    Abstract: A microelectromechanical mirror device includes a fixed structure defining a cavity, a tiltable structure elastically suspended above the cavity and carrying a reflecting surface, and having a main extension in a horizontal plane. A first pair of driving arms carry respective piezoelectric material regions that are biased to cause a rotation of the tiltable structure around a first rotation axis parallel to a first horizontal axis of the horizontal plane, and elastically coupled to the tiltable structure. Elastic suspension elements that couple the tiltable structure to the fixed structure at the first rotation axis are stiff with respect to movements out of the horizontal plane and yielding with respect to torsion around the first rotation axis, and further extend between the tiltable structure and the fixed structure. The elastic suspension elements have an asymmetrical arrangement on opposite sides of the tiltable structure along the first rotation axis.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: April 8, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nicolo' Boni, Roberto Carminati, Massimiliano Merli
  • Patent number: 12267084
    Abstract: A converter system includes a reference buffer buffering a reference input to produce a DAC reference, operating from a reference feedback voltage generated by a reference divider. A tail buffer generates a tail voltage from an input voltage generated from the DAC reference by a tail divider. An R-2R type DAC utilizes an R-2R ladder to generate a DAC output from a code. This ladder has a tail resistor coupled to the tail voltage. A feedback buffer buffers the DAC output to produce a converter reference. A DC-DC converter generates a DC output from a DC input, based upon a converter feedback voltage. A feedback divider coupled between the DC output and the converter reference generates the converter feedback voltage. Control circuitry selectively taps the reference divider to produce the reference feedback voltage (performing gain trimming) and selectively taps the tail divider to produce the input voltage (performing offset trimming).
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: April 1, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Attanasio, Stefano Ramorini
  • Patent number: 12267011
    Abstract: A half bridge converter is controlled by a circuit including a differential circuit receiving a reference signal and a feedback signal which is a function of an output signal from the converter. The half bridge includes hand and low side switches. A comparator generates a PWM signal for controlling the converter as a function of the duty cycle of the PWM signal in response to a signal at an intermediate node between the hand and low side switches and an output of the differential circuit. A gain circuit block coupled between the intermediate node and the input of the comparator applies a ramp signal to the input of the comparator which is a function of the signal at the intermediate node. A variable gain is applied by the gain circuit block in order to keep a constant value for the duty cycle of said PWM signal irrespective of converter operation.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: April 1, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Cattani, Stefano Ramorini, Alessandro Gasparini
  • Patent number: 12266922
    Abstract: A circuit for reverse battery protection includes an isolation circuit and a control circuit. The isolation is circuit coupled between a gate output of an electronic fuse (E-fuse) and at least one external metal-oxide-semiconductor field-effect transistor (MOSFET). The E-fuse is coupled between a battery voltage pin and an external ground pin and further coupled to a microcontroller. The isolation circuit is configured to disconnect the gate output from the at least one external MOSFET when the battery is installed with reverse polarity. The control circuit is coupled between the external ground pin and the at least one external MOSFET. The control circuit is configured to turn on the at least one external MOSFET when the battery is installed with the reverse polarity.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: April 1, 2025
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (China) Investment Co., Ltd.
    Inventors: Ping Chen, Hui Yan, Vincenzo Randazzo, Alberto Marzo, Andrea Camillo Re
  • Patent number: 12266402
    Abstract: A phase change memory element has a memory region, a first electrode and a second electrode. The memory region is arranged between the first and the second electrodes and has a bulk zone and an active zone. The memory region is made of a germanium, antimony and tellurium based alloy, wherein germanium is in a higher percentage than antimony and tellurium in the bulk zone of the memory region. The active zone is configured to switch between a first stable state associated with a first memory logic level and a second stable state associated with a second memory logic level. The active zone has, in the first stable state, a uniform, amorphous structure and, in the second stable state, a differential polycrystalline structure including a first portion, having a first stoichiometry, and a second portion, having a second stoichiometry different from the first stoichiometry.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: April 1, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Elisa Petroni, Andrea Redaelli
  • Patent number: 12267047
    Abstract: An amplifier circuit includes a first input stage with a differential input transistor pair and a second gain stage having an output node coupled to a load. A node in the first gain stage is coupled to the output node in the second gain stage. A feedback line couples the output node to the control node of a first transistor of the differential input transistor pair. Current mirror circuitry is coupled to a current flow path through a further transistor in the second gain stage and includes a sensing node configured to produce a sensing signal indicative of the current supplied to the load. The sensing signal at the sensing node is directly fed back to the control node of the first transistor of the differential input transistor pair to provide a zero in the loop transfer function that is matched to and tracks and cancels out a load-dependent pole.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: April 1, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Bertolini, Germano Nicollini
  • Publication number: 20250105024
    Abstract: A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Fulvio Vittorio FONTANA, Michele DERAI