Abstract: A process for manufacturing surface-mount semiconductor devices, in particular of the Quad-Flat No-Leads Multi-Row type, comprising providing a metal leadframe, in particular a copper leadframe, which includes a plurality of pads, each of which is designed to receive the body of the device, the pads being separated from adjacent pads by one or more rows of wire-bonding contacting areas, outermost rows from among the one or more rows of wire-bonding contacting areas identifying, together with outermost rows corresponding to the adjacent pads, separation regions.

Abstract: An energy harvesting interface receives an electrical signal from an inductive transducer and outputs a supply signal. An input branch includes a first switch and a second switch connected in series between a first input terminal and an output terminal, and further a third switch and a fourth switch connected in series between a second input terminal and the output terminal. A first electrical-signal-detecting device coupled across the second switch detects a first threshold value of an electric storage current in the inductor of the transducer. A second electrical-signal-detecting device coupled across the fourth switch detects whether the electric supply current that flows through the fourth switch reaches a second threshold value lower than the first threshold value.

Abstract: Described herein is a microelectromechanical detection structure, provided with: a substrate having a top surface extending in a plane; a detection-electrode arrangement; an inertial mass, suspended above the substrate and the detection-electrode arrangement; and elastic elements, coupling the inertial mass to a central anchorage element fixed with respect to the substrate, in such a way that it is free to rotate about an axis of rotation as a function of a quantity to be detected along a vertical axis, the central anchorage element being arranged at the axis of rotation. A suspension structure is coupled to the detection-electrode arrangement for supporting it, suspended above the substrate and underneath the inertial mass, and is anchored to the substrate via at least one first anchorage region; the fixed-electrode arrangement is anchored to the suspension structure via at least one second anchorage region.

Abstract: A process for manufacturing an integrated semiconductor device, envisages: forming a MEMS structure; forming an ASIC electronic circuit; and electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.

Abstract: A method and controller for controlling a converter are provided. The converter is operated in a first phase in which controller logic asserts a first gate drive signal to cause a first transistor of the converter to be conductive and deasserts a second gate drive signal to cause a second transistor of the converter to be non-conductive. In a first deadtime phase and a second phase, the controller logic deasserts both the first and second gate drive signals to cause leakage energy from a leakage inductance of a primary winding of the converter to be transferred to a clamp capacitance of the converter. After the leakage energy is transferred, the converter is operated in a third phase in which the logic asserts the second gate drive signal and deasserts the first gate drive signal.

Abstract: A circuit includes: a plurality of memory locations configured to store pulse width modulation (PWM) signal generation data, the memory locations being arranged in N sets of memory locations, each including i channel memory locations, each channel memory location being configured to store a respective duty-cycle value for a respective one of N PWM modulation patterns; a selection circuit configured to selectively access a selected set of the sets of memory locations; a buffer circuit configured to store the PWM signal generation data from the channel memory locations of the selected set; and a finite state machine configured to receive PWM signal generation input data indicative of a plurality of PWM modulation patterns with a respective plurality of duty-cycle values, the finite state machine configured to activate the selection circuit to load the PWM signal generation data from the channel memory locations of the selected set to the buffer circuit.

Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.

Abstract: A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state.

Abstract: A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.

Abstract: A method of manufacturing an electronic device for providing galvanic isolation includes forming a dielectric layer on a semiconductor body and integrating, in the dielectric layer, a galvanic isolation module, the integrating including forming a first metal region at a first height of the dielectric layer. A second metal region is formed at a second height greater than the first height of the dielectric layer, the first and second metal regions being at least one of capacitively and magnetically coupleable together. Forming the second metal region includes etching selective portions of the dielectric layer to form at least one trench having a side wall coupled to a bottom wall through rounded surface portions, and filling each trench with metal material to form the second metal region having rounded edges.

Abstract: A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to the fixed part. The second wafer is bonded to the first wafer through projections extending from the first wafer. The projections may, for example, be formed by selectively removing part of a semiconductor layer. A composite wafer formed by the first and second wafers is cut to form many MEMS devices.

Abstract: A microfluidic valve includes: a first structural layer and a second structural layer; a microfluidic circuit having a first microfluidic conduit and a second microfluidic conduit, which are defined in a superficial portion of the first structural layer, are adjacent, and are separated by a wall; a membrane set between the first structural layer and the second structural layer and delimiting the microfluidic circuit on one side; and a recess containing a gaseous fluid in the second structural layer. The membrane is movable in response to an actuation stimulus between a closed position, in which the first and second microfluidic conduits are fluidly decoupled, and an open position, in which the membrane is at least in part retracted into the recess and the first and second microfluidic conduits are fluidly coupled by means of a fluidic passage defined between the wall and the membrane.

Abstract: A method is to detect a message compatible with the OTA (Over The Air) standard and affected by a wrong ciphering. The method may include receiving the ciphered OTA message; deciphering the OTA message; and reading a counter field of padding bytes in the deciphered OTA message and reading corresponding padding bytes in the OTA message deciphered. The method may also include detecting at least one bit in at least one of the padding bytes of the OTA message deciphered, with the at least one bit being indicative of the wrong ciphering.

Abstract: A MEMS device includes a fixed supporting body forming a cavity, a mobile element suspended over the cavity, and an elastic element arranged between the fixed supporting body and the mobile element. First, second, third, and fourth piezoelectric elements are mechanically coupled to the elastic element, which has a shape symmetrical with respect to a direction. The first and second piezoelectric elements are arranged symmetrically with respect to the third and fourth piezoelectric elements, respectively. The first and fourth piezoelectric elements are configured to receive a first control signal, whereas the second and third piezoelectric elements are configured to receive a second control signal, which is in phase opposition with respect to the first control signal so that the first, second, third, and fourth piezoelectric elements deform the elastic element, with consequent rotation of the mobile element about the direction.

Abstract: Fault detection circuitry and a corresponding method are disclosed. A count value that is indicative of the switching period of a PWM signal is determined and it is determined whether this count value is between a first threshold and a second threshold. An error signal is generated when the switching period is not between the first and the second threshold. A count value that is indicative of the switch-on duration of the PWM signal is determined and compared with a switch-on threshold in order to determine whether the switch-on duration is greater than a maximum switch-on duration. A count value that is indicative of the switch-off duration of the PWM signal is determined and compared with a switch-off threshold in order to determine whether the switch-off duration is greater than a maximum switch-off duration. Error signals can be generated when the durations are greater than the maximum durations.

Abstract: A comparator circuit is implemented using a simple comparator core having two gain stages integrated in a single circuit block. The circuit operates with improved speed and resolution in comparison to a conventional continuous-time comparator. Offset trimming allows for the crossing time of the comparator to be adjusted close to an ideal crossing time.

Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.

Abstract: A transducer module, comprising: a supporting substrate, having a first side and a second side; a cap, which extends over the first side of the supporting substrate and defines therewith a first chamber and a second chamber internally isolated from one another; a first transducer in the first chamber; a second transducer in the second chamber; and a control chip, which extends at least partially in the first chamber and/or in the second chamber and is functionally coupled to the first and second transducers for receiving, in use, the signals transduced by the first and second transducers.

Abstract: An apparatus for nucleic acid sequencing includes: a base-detection device in a detection site, the base-detection device being configured to detect bases of a portion of a nucleic acid strand at the detection site; and a conveying device, configured to extend the nucleic acid strand and to cause the extended nucleic acid strand to slide through the detection site along a path. The base-detection device includes a plurality of field-effect nanowire detectors, arranged along the path and each including a respective nanowire and nucleic acid probes, which are defined by respective base sequences and are fixed to the respective nanowire.

Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.