Abstract: A probe card for integrated circuit testing includes a printed circuit support and a probe head having a first surface mounted to a surface of the printed circuit support. A flexible substrate is positioned adjacent to a second surface of the probe head and includes at least one flexible extension which extends beyond an edge of the probe head and includes a bend to make contact with the surface of the printed circuit support. The flexible substrate further includes a test antenna configured to support a wireless communications channel with an integrated circuit under test. The integrated circuit under test includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations to form an integrated antenna that is coupled for communication and/or power transfer to the test antenna.

Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.

Abstract: A method of manufacturing a vertical conduction semiconductor device comprising the steps of: forming a recess in a monocrystalline silicon substrate; forming a silicon oxide seed layer in the recess; carrying out an epitaxial growth of silicon on the substrate, simultaneously growing a polycrystalline silicon region in the seed layer and a monocrystalline silicon region in surface regions of the substrate, which surround the seed layer; and implanting dopant species in the polycrystalline silicon region to form a conductive path in order to render the second conduction terminal electrically accessible from a front side of the vertical conduction semiconductor device.

Abstract: A semiconductor device includes a layered package having a semiconductor die embedded therein, the semiconductor die coupled with a thermally-conductive element. The layered package includes, e.g., PCB boards with an intermediate layer having the semiconductor die arranged therein, and a pair of outer layers, with the thermally-conductive element including a thermally-conductive inlay in one of the outer layers.

Abstract: Image processing circuitry processes image frames in a sequence of image frames, for example, to identify objects of interest. The processing includes filtering motion vectors associated with a current image frame, grouping the filtered motion vectors associated with the current image frame into a set of clusters associated with the current image frame, and selectively merging clusters in the set of clusters associated with the current image frame. At least one of the filtering, the grouping and the merging may be based on one or more clusters associated with one or more previous image frames in the sequence of image frames. Motion vectors included in merged clusters associated with a previous frame may be added to filtered motion vectors before grouping the motion vectors in the current frame.

Abstract: A current mirror includes an input transistor and an output transistor, wherein the sources of the input and output transistor are connected to a supply voltage node. The gates of the input and output transistors are connected through a switch. A first current source is coupled to the input transistor to provide an input current. A copy transistor has a source connected to the supply node and a gate connected to the gate of the input transistor at a mirror node. A second current source is coupled to the copy transistor to provide a copy current. A source-follower transistor has its source connected to the mirror node and its gate connected to the drain of the copy transistor. Charge sharing at the mirror node occurs in response to actuation of the switch and the source-follower transistor is turned on in response thereto to discharge the mirror node.

Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.

Abstract: A circuit includes an input transistor pair with first and second input transistors, the first input transistor having a control terminal configured to receive an input signal and a cascode transistor pair including a first and second cascode transistors having a common control node. A bias circuit has a bias input configured to receive the input signal and a first bias output coupled to the common node of the first and second cascode transistors. The bias circuit includes a signal tracking circuit operating to generate the first bias output to track the input signal. A pair of load transistors are coupled to the input transistor pair and biased by a second bias output of the bias circuit.

Abstract: A piezoelectric transducer includes: an anchorage; a beam of semiconductor material, extending in cantilever fashion from the anchorage in a main direction parallel to a first axis and having a face parallel to a first plane defined by the first axis and by a second axis perpendicular to the first axis; and a piezoelectric layer on the face of the beam. A cross-section of the beam perpendicular to the first axis is asymmetrical and is shaped so that the beam presents deformations out of the first plane in response to forces applied to the anchorage and oriented according to the first axis.

Abstract: A communication method includes receiving a first message of a Short Message Service containing a first command that requests execution of a proactive command. The first message is decrypted according to protocol SCP80 to extract the first command. The execution of the proactive command is requested in order to obtain a response to the proactive command. A second message of the Short Message Service is transmitted to the remote server and indicates that the response to the proactive command has been obtained. A third message of the Short Message Service is received and contains a second command from the remote server. The third message is decrypted according to the protocol SCP80. A response message is generated as a function of the response and encrypted according to the protocol SCP80 to generate a fourth message of the Short Message Service transmitted to the remote server.

Abstract: A common-mode feedback circuit includes a transconductor input stage with differential input terminals, and a frequency-compensated gain stage coupled to the transconductor input stage with differential output terminals. The common-mode feedback circuit also includes a feedback loop having a comparator configured to produce a feedback error signal for the transconductor input stage by comparing with a reference a common-mode sensing signal indicative of a common-mode voltage level sensed at the differential output terminals. In addition, the common-mode feedback loop includes a converter for converting the common-mode voltage level sensed at said differential output terminals into a current signal coupled to the comparator.

Abstract: A detection device is formed in a body of semiconductor material having a first face, a second face, and a cavity. A detection area formed in the cavity, and a gas pump is integrated in the body and configured to force movement of gas towards the detection area. A detection system of an optical type or a detector of alpha particles is arranged at least in part in the detection area.

Abstract: A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.

Abstract: A Global Navigation Satellite System (GNSS) receiver includes a Temperature Compensated Crystal Oscillator (TCCO) circuit. A micro jump of the TCCO circuit is detected by monitoring wide band phase values and carrier to noise ratio estimate values for each tracking channel of the tracking modules for the GNSS receiver. In response to a detected micro-jump, a frequency correction is calculated and applied to numerically controlled oscillators of phase/frequency lock loop circuits within tracking modules.

Abstract: Radiofrequency energy that is captured by a radiofrequency power harvester is stored in a storage capacitance. One or more user circuits are supplied with energy stored in the storage capacitance. The harvester operates in alternated charge and burst phases with captured radiofrequency energy stored in the storage capacitance in the charge phases and supplied to the user circuits in the burst phases to perform user circuit tasks. In response to detection of completion of the user circuit tasks in a burst phase, the harvester causes operation to shift to the next charge phase.

Abstract: The present disclosure is directed to a primary-controlled high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs, and may be compatible with phase-cut dimmers. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter.

Abstract: LED strings cascaded to one another are driven by an electronic circuit that includes regulation modules and a brightness-compensation module. The regulation modules carry out in sequence a current-regulation phase, in which they regulate the current that flows in the corresponding LED strings. The regulation module includes: a compensation regulator coupled to a compensation LED string and to a capacitor and a generator that generates an electrical quantity indicating the luminous flux emitted by the LED strings and by the compensation LED string. The compensation regulator regulates a current that flows in the compensation LED string as a function of the electrical quantity, discharging the capacitor through the compensation LED string.

Abstract: A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.

Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.

Abstract: A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.