Abstract: An electronic device includes a circuit integrated on a die having front and back surfaces with die terminals on the front surface. The die is embedded in a package including substrate of thermally conductive material with front and back surfaces and a through-hole. The die is sunk in the through-hole. A first insulating material layer covers the die front surface and the package front surface with first windows for accessing die terminals. Package terminals and package track are arranged on the first insulating layer. A second insulating material layer covers the first insulating layer and the package tracks with second windows for accessing the package terminals.

Abstract: An integrated circuit (IC) may include a semiconductor substrate, and a semiconductor resistor. The semiconductor resistor may include a well in the semiconductor substrate and having a first conductivity type, a first resistive region in the well having an L-shape and a second conductivity type, and a tuning element associated with the first resistive region. The IC may also include a resistance compensation circuit on the semiconductor substrate. The resistance compensation circuit may be configured to measure an initial resistance of the first resistive region, and generate a voltage at the tuning element to tune an operating resistance of the first resistive region based upon the measured initial resistance.

Abstract: LED strings cascaded to one another are driven by an electronic circuit that includes regulation modules and a brightness-compensation module. The regulation modules carry out in sequence a current-regulation phase, in which they regulate the current that flows in the corresponding LED strings. The regulation module includes: a compensation regulator coupled to a compensation LED string and to a capacitor and a generator that generates an electrical quantity indicating the luminous flux emitted by the LED strings and by the compensation LED string. The compensation regulator regulates a current that flows in the compensation LED string as a function of the electrical quantity, discharging the capacitor through the compensation LED string.

Abstract: A test apparatus includes test probes for exchanging electrical signals with terminals of an electronic device under test. The test probes form a capacitive electromagnetic coupling connection with the terminals.

Abstract: An electronic circuit drives a plurality of LED strings connected in series. The electronic circuit includes a regulation module corresponding to each LED string, with the regulation module connected to the cathode terminal of the corresponding LED string. Each regulation module is further coupled to receive a reference voltage in phase with a rectified a.c. voltage. The regulation modules execute in turn and in sequence a current-regulation phase as a function of a trend of the reference voltage. Each regulation module, when executing the current-regulation phase, functions to regulate the current that flows in the corresponding LED string and in any previous LED strings in the series connection so that the regulated current is proportional to the reference voltage.

Abstract: A phase change non-volatile memory device has a memory array with a plurality of memory cells arranged in rows and columns, a column decoder and a row decoder designed to select columns, and, respectively, rows of the memory array during operations of programming of corresponding memory cells. A control logic, coupled to the column decoder and the row decoder, is designed to execute a sequential programming command, to control the column decoder and row decoder to select one column of the memory array and execute sequential programming operations on a desired block of memory cells belonging to contiguous selected rows of the selected column.

Abstract: A method may include providing an electrically conductive laminar base member having a die attachment portion and a lead frame portion, producing a distribution of holes opening at a front surface of the base member, attaching an integrated circuit onto the front surface of the base member at the attachment portion, and producing a wire bonding pattern between the integrated circuit and wire bonding locations on the front surface of the base member at the lead frame portion. An electrically insulating package molding compound may be molded onto the front surface of the base member so that the integrated circuit and the wire bonding pattern are embedded in the package molding compound which penetrates into the holes opening at the front surface of the base member. The base member may be selectively etched from its back surface to produce residual portions of the base member at the wire bonding locations.

Abstract: A biasing and driving circuit for an electric load, having an input adapted to receive an a.c. input voltage and an output adapted to supply a d.c. output voltage, comprising: a voltage-regulator device, having a feedback input terminal configured to receive a sensing voltage that is a function of a supply current that flows through the electric load and regulating, on the basis of the sensing voltage received, the supply current; a resistive sensing element, operatively coupled to the feedback input, configured to receive the supply current and generate the sensing voltage as a function of the supply current; a resistor coupled to the feedback input; and an auxiliary biasing circuit adapted to receive the a.c. input voltage and inject through the resistor an a.c. auxiliary biasing current that varies in a way inversely proportional to the input voltage.

Abstract: A device includes a first and second inverters each having a signal input, signal output, high voltage supply terminal, and low voltage supply terminal. The signal input of the first inverter is coupled to the signal output of the second inverter, and the signal input of the second inverter is coupled to the signal output of the first inverter. A first transistor has a first conduction terminal coupled to a power supply node, a second conduction terminal coupled to the high voltage supply terminal of the first inverter, and a control terminal coupled to a first node. A second transistor has a first conduction terminal coupled to the power supply node, a second conduction terminal coupled to the high voltage supply terminal of the second inverter, and a control terminal coupled to a second node. First and second bit lines are capacitively coupled to the first and second nodes.

Abstract: An effective method enhances energy saving at low load in a resonant converter with a hysteretic control scheme for implementing burst-mode at light load. The method causes a current controlled oscillator of the converter to stop oscillating when a feedback control current of the output voltage of the converter reaches a first threshold value, and introduces a nonlinearity in the functional relation between the frequency of oscillation and said feedback control current or in a derivative of the functional relation, while the control current is between a lower, second threshold value and the first threshold value, such that the frequency of oscillation remains equal or smaller than the frequency of oscillation when the control current is equal to the second threshold value. Several circuital implementations are illustrated, all of simple realization without requiring any costly microcontroller.

Abstract: A system, such as a System-on-Chip includes an interface component or PLUG which generates transactions over an IP block, such as an interconnect serving one or more clients via virtual channels. The client or clients are mapped onto the virtual channels via client/virtual channel mappings. The virtual channels are provided as a first set of virtual channels in the interface component which cooperate with a second set of virtual channels in the IP block. First and second client/virtual channel mappings for the first set of virtual channels and the second set of virtual channels are provided. The first and second client/virtual channel mappings are separately programmable and mutually decoupled from one another.

Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.

Abstract: Embodiments of the present disclosure include a method of operating an arc fault detection system, an arc fault detection system, and a system. An embodiment is a method of operating an arc fault detection system coupled to a power line, the method including determining one or more arc fault detection windows in power line signals on the power line, the power line signals comprising a communication signal and an alternating current (AC) power signal. The method further includes receiving the power line signals from the power line during the one or more arc fault detection windows, and performing arc fault detection processing on the received power line signals.

Abstract: MEMS device having a support region elastically carrying a suspended mass through first elastic elements. A tuned dynamic absorber is elastically coupled to the suspended mass and configured to dampen quadrature forces acting on the suspended mass at the natural oscillation frequency of the dynamic absorber. The tuned dynamic absorber is formed by a damping mass coupled to the suspended mass through second elastic elements. In an embodiment, the suspended mass and the damping mass are formed in a same structural layer, for example of semiconductor material, and the damping mass is surrounded by the suspended mass.

Abstract: A method for the serial personalization of smart cards in a production chain includes a phase of detecting a smart card already personalized and physically defective, and a phase of retrieving a serial number of the physically defective smart card, to be assigned to a smart card not yet personalized in the production chain. The physically defective smart card and the smart card not yet personalized are loaded together in the production chain wherein the physically defective smart card is rendered unusable, and the not yet personalized smart card receives the serial number retrieved from the physically defective smart card.

Abstract: An optoelectronic device for detecting electromagnetic radiation includes a body of semiconductor material. A first region and a second region that form a junction are provided within the body. A recess extends into the body and is delimited by side arranged transverse to a main surface of the body. The junction is exposed by the sidewall to coupled electromagnetic radiation received in the recess into a photodiode formed by the junction.

Abstract: A MEMS piezoelectric device includes a monolithic semiconductor body having first and second main surfaces extending parallel to a horizontal plane formed by first and second horizontal axes. A housing cavity is arranged within the monolithic semiconductor body. A membrane is suspended above the housing cavity at the first main surface. A piezoelectric material layer is arranged above a first surface of the membrane with a proof mass coupled to a second surface, opposite to the first surface, along the vertical axis. An electrode arrangement is provided in contact with the piezoelectric material layer. The proof mass causes deformation of the piezoelectric material layer in response to environmental mechanical vibrations. The proof mass is coupled to the membrane by a connection element arranged, in a central position, between the membrane and the proof mass in the direction of the vertical axis.

Abstract: A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.

Abstract: A communication system for interfacing a transmitting circuit with a receiving circuit includes a transmission interface for receiving data from the transmitting circuit and transmitting the data received over at least one data line in response to a transmission clock signal. The communication system also includes a reception interface configured for receiving the data in response to a reception clock signal and transmitting the data received to the receiving circuit. In particular, the system is configured for generating a plurality of clock signals that have the same frequency but are phase-shifted with respect to one another. In addition, during a calibration phase, the system is configured for selecting one of the clock signals for the transmission clock signal or reception clock signal via selecting at least one of the clock signals for transmission of test signals via the transmission interface and verifying whether the test signals received via the reception interface are correct.

Abstract: A device for generating a reference voltage includes a first non-volatile memory cell provided with a control-gate transistor and a reading transistor. The control-gate transistor includes a gate terminal, a body, a first conduction terminal and a second conduction terminal. The first conduction terminal and the second conduction terminal are connected together to form a control-gate terminal. The reading transistor includes a gate terminal that is connected to the gate terminal of the control-gate transistor to form a floating-gate terminal, a body, a third conduction terminal and a fourth conduction terminal. The device also includes a second, equivalent, memory cell. The source terminal of the first non-volatile memory cell and the source terminal of the second equivalent memory cell are connected together.