Abstract: An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The stator subregions are electrostatically coupled to respective regions of actuation on the mobile element. The stator subregions exhibit an element of structural asymmetry such that the electrostatic coupling surface between the first stator subregion and the first actuation region differs from the electrostatic coupling surface between the second stator subregion and the second actuation region.

Abstract: A method for manufacturing a surface-mount electronic device includes making a first partial cut from a bottom of an assembly that includes a first semiconductor body that is disposed on a first die pad, a second semiconductor body that is disposed on a second die pad, and a plurality of terminal regions that is disposed between the first and second die pads. The first partial cut forms a recess by removing a portion of each of the terminal regions. The recess is defined by a transverse wall, a first sidewall, and a second sidewall. The first and second sidewalls and the transverse wall are coated with an anti-oxidation layer. A second partial cut is made from the top, where the second partial cut removes the transverse wall, separates the first and second semiconductor bodies, and has a width that is greater than a width of the first partial cut.

Abstract: An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.

Abstract: A non-volatile memory of a complementary type includes sectors of memory cells, with each cell formed by a direct memory cell and a complementary memory cell. Each sector of the non-volatile memory is in a non-written condition when the corresponding memory cells are in equal states and is in a written condition wherein each location thereof stores a first logic value or a second logic value when the memory cells of the location are in a first combination of different states or in a second combination of different states, respectively. A sector is selected and a determination is made as to a number of memory cells in the programmed state and a number of memory cells in the erased state. From this information, the condition of the selected sector is identified from a comparison between the number of memory cells in the programmed state and the number of memory cells in the erased state.

Abstract: A surface-mount electronic device includes a body of semiconductor material, and a lead frame that includes a plurality of contact terminals. The plurality of contact terminals is electrically connected to the semiconductor body. The contact terminals are formed of sintered material.

Abstract: An embodiment for manufacturing electronic devices is proposed. The embodiment includes the following phases: a) forming a plurality of chips in a semiconductor material wafer including a main surface; each chip includes respective integrated electronic components and respective contact pads facing the main surface; said contact pads are electrically coupled to the integrated electronic components; b) attaching at least one conductive ribbon to at least one contact pad of each chip; c) covering the main surface of the semiconductor material wafer and the at least one conductive ribbon with a layer of plastic material; d) lapping an exposed surface of the layer of plastic material to remove a portion of the plastic material layer at least to uncover portions of the at least one conductive ribbon, and e) sectioning the semiconductor material wafer to separate the chips.

Abstract: An electronic device for implementing digital functions comprising a first and a second electrode regions, separated by an interposing region comprising a dielectric region, is described. The first and the second electrode regions comprise at least one first electrode and at least one second electrode, respectively, configured to generate in the interposing region an electric field depending on an electric potential difference applied thereto. In the interposing region, a molecular layer is comprised, which is composed of a plurality of molecules, each being capable of assuming one or more states, in a controllable manner, depending on a sensed electric field. The dielectric region has a spatially variable dielectric profile, to determine a respective spatially variable field profile of the sensed electric field at the molecular layer.

Abstract: An embodiment of a test apparatus for executing a test of a set of electronic devices having a plurality of electrically conductive terminals, the test apparatus including a plurality of electrically conductive test probes for exchanging electrical signals with the terminals, and coupling means for mechanically coupling the test probes with the electronic devices. In an embodiment, the coupling means includes insulating means for keeping each one of at least part of the test probes electrically insulated from at least one corresponding terminal during the execution of the test. Each test probe and the corresponding terminal form a capacitor for electro-magnetically coupling the test probe with the terminal.

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

Abstract: An embodiment of a micro-electro-mechanical system of the MEMS type comprising at least one micro-electro-mechanical device of the MEMS type and one junction with a duct suitable to being associated with an external apparatus. Said junction being a printed circuit board PCB comprising at least two layers with juxtaposed faces, a channel being present in at least one face of at least one of said at least two layers suitable for realizing the duct with the juxtaposition of the other face of at least another one of at least two layers.

Abstract: A transimpedance amplifier includes a first and a second power supply terminal for receiving a positive constant supply voltage, wherein the second power supply terminal represents a ground, and an input terminal adapted to be connected to a current source. The transimpedance amplifier further comprises a transistor comprising a control terminal and two further terminals, wherein the input terminal is connected to the control terminal of the first transistor. An inductor is connected between the first of the two further terminals of the transistor and the first power supply terminal, and a bias network is connected between the second of the two further terminals of the transistor and ground. Specifically, the transimpedance amplifier is configured such that the resistance between said first of said two further terminals of said first transistor and said first power supply terminal is small enough, such that said transimpedance amplifier operates as a differentiator.

Abstract: A push-pull amplifier includes a pair of active devices driving the primary side of a double distributed active transformer (DDAT). The primary side of the DDAT includes a cascaded arrangement of primary windings of a first set of transformers with the active devices coupled ends of cascaded arrangement of primary windings. The secondary side of the DDAT includes a cascaded arrangement of secondary windings of a second set of transformers coupled to a load. Secondary windings of the first set of transformers drive inputs of respective active stages. Outputs of the active stages drive respective primary windings of the second set of transformers.

Abstract: A for positioning a miniaturized piece includes a positioning structure that forms a first cavity designed to receive with play the miniaturized piece and a second cavity communicating with the first cavity. At least one electrical-contact terminal is provided facing the second cavity and is electrically coupleable to an electronic testing device designed to carry out an electrical test on the miniaturized piece. An actuator device causes a vibration of the positioning structure such that the vibration translates the miniaturized piece towards the second cavity until it penetrates at least in part into the second cavity.

Abstract: Current tasks being executed in a set of modules of a signal processing system managed via an interface block are aborted so as to permit the execution of new tasks by pipelining eliminating transactions of said current tasks and executing transactions of the new tasks. Upon arrival of a signal to abort the current tasks, data and/or memory accesses present in said interface block are discarded.

Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.

Abstract: A voltage doubler circuit supports operation in a positive voltage boosting mode to positively boost voltage from a first node to a second node and operation in a negative voltage boosting mode to negatively boost voltage from the second node to the first node. The voltage doubler circuits receive two clock signals having different high voltage levels. A series of voltage doubler circuit are connected in a charge pump with controllable operation in the first and second modes. A connecting circuit interconnects the first and second nodes of the voltage doubler circuits to provide a first connection path, with a first input voltage, to support the positive voltage boosting mode operation and a second connection path, with a proper input voltage, to support the negative voltage boosting mode. A discharge circuit is provided to discharge the voltage doubler circuits when operation of the charge pump circuit is terminated.

Abstract: A signal processing chain, such as an audio chain, produces an analog output signal from a digital input signal. The signal processing chain is operated by generating a first flag signal for the analog output signal and one or more second flag signals for the digital input signal. Each flag signal assumes a first level or a second level and is set to the first level when a signal from which the flag is generated has a value within an amplitude window. An amount the first flag signal for the analog output signal and the second flag signal for the digital input signal match each other may be calculated for issuing an alert flag which indicates an impaired operation of the signal processing chain.

Abstract: A circuit includes combinational circuit and sequential circuit elements coupled thereto. The circuit includes a multiplexor coupled to the combinational and sequential circuit elements, and a system register is coupled to the multiplexor. At least one portion of the combinational and sequential circuit elements is configured to selectively switch to operate as a random access memory.

Abstract: A rectifier bridge circuit includes a first SCR/IGBT switch and a second SCR/IGBT switch coupled to a circuit input to receive an ac input voltage. The first and second SCR/IGBT switches are alternatively switchable to generate a rectified voltage at a circuit output. Control currents coupled to control terminals of the first and second SCR/IGBT switches are power supply sourced from an auxiliary dc source generated by rectifying the ac input voltage. The control currents are generated by current sources coupled between the auxiliary dc source and the control terminals of the first and second SCR/IGBT switches. The current sources are selectively activatable to produce gating currents for switching on and off the first and second SCR/IGBT switches. A controller unit is provided to control the current sources via level shifter circuits. The control implements progressive conduction time of the first and second SCR/IGBT switches so as to provide inrush current limitation.

Abstract: The present disclosure is directed to multichannel transducer devices and methods of operation thereof. One example device includes at least two acquisition modules that have different sensitives and a signal processing stage that generates a blended signal representative of a lower gain signal mapped onto a higher gain signal. One example method of operation includes receiving a first signal from a first sensor having a first sensitivity, receiving a second signal from a second sensor having a second sensitivity that is different from the first sensitivity, generating a blended signal by mapping the second signal to the first signal, outputting the first signal while the first signal is below a first threshold and above a second threshold, and outputting the blended signal when the first signal is above the first threshold and when the first signal is below the second threshold.