Abstract: A metal layer is deposited on a wafer that has silicon carbide, wherein the metal layer forms a contact face. A laser annealing is performed at the contact face using a laser beam application that causes the metal layer to react with the wafer and form a silicide layer. The laser beam has a footprint having a size. To laser anneal the contact face, a first portion of the contact face is irradiated, the footprint of the laser beam is moved by a step smaller than the size of the footprint, and a second portion of the contact face is irradiated, thereby causing the first portion and the second portion of the contact face to overlap.
Type:
Application
Filed:
June 23, 2022
Publication date:
December 29, 2022
Applicant:
STMicroelectronics S.r.l.
Inventors:
Paolo BADALA', Anna BASSI, Massimo BOSCAGLIA, Valentina SCUDERI, Giovanni FRANCO
Abstract: A driving circuit for controlling a MEMS oscillator includes a digital conversion stage to acquire a differential sensing signal indicative of a displacement of a movable mass of the MEMS oscillator, and to convert the differential sensing signal of analog type into a digital differential signal of digital type. Processing circuitry is configured to generate a digital control signal of digital type as a function of the comparison between the digital differential signal and a differential reference signal indicative of a target amplitude of oscillation of the movable mass which causes the resonance of the MEMS oscillator. An analog conversion stage includes a ?? DAC and is configured to convert the digital control signal into a PDM control signal of analog type. A filtering stage of low-pass type, by filtering the PDM control signal, generates a control signal for controlling the amplitude of oscillation of the movable mass.
Type:
Application
Filed:
June 22, 2022
Publication date:
December 29, 2022
Applicant:
STMicroelectronics S.r.l.
Inventors:
Andrea DONADEL, Emanuele LAVELLI, Stefano POLESEL
Abstract: A transmitter circuit receives a PWM input signal and a clock signal. A logic circuit generates a control signal as a function of the clock signal. The control signal is normally set to high, and is periodically set to low for a transmission time interval when an edge is detected in the clock signal. The transmission time interval is shorter than a half clock period of the clock signal. A tri-state transmitter receives the PWM input signal and the control signal, and produces first and a second output signals at first and second transmitter output nodes, respectively. The output signals have a voltage swing between a positive voltage and a reference voltage. An output control circuit is sensitive to the control signal and is coupled to the first and second transmitter output nodes.
Type:
Application
Filed:
June 21, 2022
Publication date:
December 29, 2022
Applicant:
STMicroelectronics S.r.l.
Inventors:
Valerio BENDOTTI, Nicola DE CAMPO, Carlo CURINA
Abstract: A microfluidic device has a chamber; a fluidic access channel in fluidic connection with the chamber; a plurality of nozzle apertures in fluidic connection with the chamber; and an actuator, operatively coupled to the fluid containment chamber and configured to cause ejection of drops of fluid through the nozzle apertures in an operating condition of the microfluidic device. The chamber has an elongated shape, with a length and a maximum width, wherein an aspect ratio between the length and the maximum width of the chamber is at least 3:1. The nozzle apertures are configured to generate, in use, a plurality of drops having a total drop volume, wherein a ratio total drop volume to a chamber volume is at least 15%.
Type:
Application
Filed:
June 21, 2022
Publication date:
December 29, 2022
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Domenico GIUSTI, Gianluca GULLI', Francesco FERRARIO, Davide MAERNA, Lorenzo TENTORI
Abstract: A current sensor architecture is implemented using a trans-resistance amplifier circuit having a low pass filter characteristic. The current sensing resistor and the input resistors for the amplifier circuit are matched thermally so that they have substantially identical temperature coefficients. The feedback resistors, which are coupled in parallel with corresponding capacitors, are implemented using switched capacitor circuits that emulate resistors. With this configuration, the current sensor is temperature insensitive.
Abstract: A neural network classifies an input signal. For example, an accelerometer signal may be classified to detect human activity. In a first convolutional layer, two-valued weights are applied to the input signal. In a first two-valued function layer coupled at input to an output of the first convolutional layer, a two-valued function is applied. In a second convolutional layer coupled at input to an output of the first two-valued functional layer, weights of the second convolutional layer are applied. In a fully-connected layer coupled at input to an output of the second convolutional layer, two-valued weights of the fully connected layer are applied. In a second two-valued function layer coupled at input to an output of the fully connected layer, a two-valued function of the second two-valued function layer is applied. A classifier classifies the input signal based on an output signal of second two-valued function layer.
Type:
Grant
Filed:
November 13, 2018
Date of Patent:
December 27, 2022
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Danilo Pietro Pau, Emanuele Plebani, Fabio Giuseppe De Ambroggi, Floriana Guido, Angelo Bosco
Abstract: A charge-balance power device includes a semiconductor body having a first conductivity type. A trench gate extends in the semiconductor body from a first surface toward a second surface. A body region has a second conductivity type that is opposite the first conductivity type, and the body region faces the first surface of the semiconductor body and extends on a first side and a second side of the trench gate. Source regions having the first conductivity type extend in the body region and face the first surface of the semiconductor body. A drain terminal extends on the second surface of the semiconductor body. The device further comprises a first and a second columnar region having the second conductivity, which extend in the semiconductor body adjacent to the first and second sides of the trench gate, and the first and second columnar regions are spaced apart from the body region and from the drain terminal.
Type:
Grant
Filed:
July 31, 2020
Date of Patent:
December 27, 2022
Assignee:
STMICROELECTRONICS S.r.l.
Inventors:
Antonello Santangelo, Giuseppe Longo, Lucio Renna
Abstract: A manufacturing method of an HEMT includes: forming a heterostructure; forming a first gate layer of intrinsic semiconductor material on the heterostructure; forming a second gate layer, containing dopant impurities of a P type, on the first gate layer; removing first portions of the second gate layer so that second portions, not removed, of the second gate layer form a doped gate region; and carrying out a thermal annealing of the doped gate region so as to cause a diffusion of said dopant impurities of the P type in the first gate layer and in the heterostructure, with a concentration, in the heterostructure, that decreases as the lateral distance from the doped gate region increases.
Abstract: A method includes sensing a level of ultraviolet radiation in an environment in which an electronic device is present, detecting an environmental condition of the electronic device based upon the sensed level of ultraviolet radiation, and controlling the operation of the electronic device based upon the detected environmental condition. The detected environmental condition may include an indoor condition, outdoor condition, near-window condition, near-door condition, and in-vehicle condition of the electronic device. Controlling the operation of the electronic device based upon the detected environmental condition may include selectively activating and deactivating components of the device based on the detected environmental condition to reduce power consumption of the device.
Type:
Grant
Filed:
December 23, 2019
Date of Patent:
December 27, 2022
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Enrico Rosario Alessi, Giuseppe Spinella
Abstract: Disclosed herein is a method of operating a display panel having a matrix of display elements. The method includes ordered steps of: (1) causing flow of current from a source of power, into an anode of a given display element, out of a cathode of the given display element to ground, wherein the flow of current into the anode and out the cathode to ground results in charging of a parasitic capacitance associated with the anode, (2) transferring charge from a storage capacitor to a parasitic capacitance associated with the cathode, and (3) stopping the flow of current, and then transferring charge from the parasitic capacitance associated with the anode to the storage capacitor.
Abstract: A pressure sensor including: a structure which delimits a main cavity of a closed type, the structure being at least partially deformable as a function of a pressure external to the structure; and a MEMS device, which is arranged in the main cavity and generates an output signal, which is of an electrical type and is indicative of the pressure inside the main cavity.
Abstract: A voltage reference circuit includes a first circuit block configured to generate a proportional to absolute temperature current, the first circuit block comprising a current mirror amplifier, a second circuit block coupled to the first circuit block and configured to generated a complimentary to absolute temperature current, and a third circuit block coupled to both the first circuit block and the second circuit block. The second circuit block includes a multi-stage common-source amplifier. The third circuit block is configured to combine the proportional to absolute temperature current and the complimentary to absolute temperature current to generate a reference voltage at an output of the voltage reference circuit.
Type:
Grant
Filed:
July 1, 2019
Date of Patent:
December 27, 2022
Assignee:
STMicroelectronics S.r.l.
Inventors:
Marco Orazio Cavallaro, Germano Nicollini, Giuseppe Palmisano
Abstract: Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate.
Abstract: A frequency modulation MEMS triaxial gyroscope, having two mobile masses; a first and a second driving body coupled to the mobile masses through elastic elements rigid in a first direction and compliant in a second direction transverse to the first direction; and a third and a fourth driving body coupled to the mobile masses through elastic elements rigid in the second direction and compliant in the first direction. A first and a second driving element are coupled to the first and second driving bodies for causing the mobile masses to translate in the first direction in phase opposition. A third and a fourth driving element are coupled to the third and fourth driving bodies for causing the mobile masses to translate in the second direction and in phase opposition. An out-of-plane driving element is coupled to the first and second mobile masses for causing a translation in a third direction, in phase opposition.
Type:
Application
Filed:
August 23, 2022
Publication date:
December 22, 2022
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Alessandro TOCCHIO, Luca Giuseppe FALORNI, Claudia COMI, Valentina ZEGA
Abstract: A method includes applying heat to a metal oxide sensing element of a gas sensor, varying the heat applied to the metal oxide sensing element for at least a time interval, and measuring an electrical resistance of the metal oxide sensing element versus variation of the heat for a time interval. The measurement of electrical resistance of the metal oxide sensing element versus variation of the heat applied to the metal oxide sensing element is compared to a set of corresponding reference measurements associated with a plurality of different target gases. A further sensor parameter versus the variation of electrical resistance and variation of the heat applied is measured to obtain a three-dimensional trajectory corresponding to variation of the sensor resistance, the variation of said heat and the variation of the further sensor parameter. This comparing includes comparing the trajectory in three dimensions to a set of reference three-dimensional objects.
Abstract: In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.
Type:
Grant
Filed:
October 29, 2021
Date of Patent:
December 20, 2022
Assignee:
STMicroelectronics S.r.l.
Inventors:
Matteo Brivio, Matteo Venturelli, Nicola De Campo
Abstract: Approximation circuitry utilizes bitwise operations on operands to provide approximate results of operations on the operands. A significant digit detector utilizes bitwise operations on the received operands to identify or detect approximate most significant bits in the operands, and then utilizes these identified most significant bits to generate approximate values for each of the operands. Intermediate registers receive and store the approximate values from the significant digit detector. A combinatorial network, such as a lookup table (LUT), thereafter utilizes the approximate values stored in the intermediate registers to generate an approximate result. The approximate result has a value that is an approximate value of a given operation, such as multiplication or division, on the operands provided to the significant digit detector.
Abstract: The present disclosure relates to an electronic device comprising a first capacitor and a quartz crystal coupled in series between a first node and a second node; an inverter coupled between the first and second nodes; a first variable capacitor coupled between the first node and a third node; and a second variable capacitor coupled between the second node and the third node.
Abstract: Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.
Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.