Abstract: A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

Abstract: A battery management system includes: a controller; a master battery management integrated circuit (BMIC) device coupled to the controller and configured to communicate with the controller through a standard Serial Peripheral Interface (SPI) protocol; and a first slave BMIC device and a second slave BMIC device that are connected in a daisy chain configuration and communicating through Isolated SPI interfaces, where the first slave BMIC device is coupled to the master BMIC through an Isolated SPI interface, where the Isolated SPI interface uses a differential signal comprising a positive signal and a complementary negative signal, where a bit frame of the positive signal includes a bit period followed by an idle period having a same duration as the bit period, where the first slave BMIC device and the second slave BMIC device are configured to be coupled to a first battery pack and a second battery pack, respectively.

Abstract: A circuit, including first and second electronic switches cascaded in a current flow line between an input node and ground, a transformer having a primary winding coupled across the second electronic switch, and a capacitor coupled across the secondary winding, is operated by making the first and second electronic switches conductive and non-conductive in a sequence of phases including an energy storage phase, with current flow in the primary winding and no current flow in the secondary winding, and subsequently a concurrent conduction phase, with current flow in both the primary and secondary windings of the transformer. The circuit is operable in a first mode, wherein the concurrent conduction phase is maintained over a first off time of the first switch, and in a second mode, wherein the concurrent conduction phase is maintained over a second off time of the first switch shorter than the first off time.

Abstract: SiC-based MOSFET electronic device comprising: a solid body; a gate terminal, extending into the solid body; a conductive path, extending at a first side of the solid body, configured to be electrically couplable to a generator of a biasing voltage; a protection element of a solid-state material, coupled to the gate terminal and to the conductive path, the protection element forming an electronic connection between the gate terminal and the conductive path, and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current through the protection element greater than a critical threshold; a buried cavity in the solid body accommodating, at least in part, the protection element.

Abstract: A method includes preserving custom objects and system objects of an application during an operative system update operation in a secure element. The custom objects and system objects are saved. The application is uninstalled and a new instance of the application is created. The saved custom objects and the saved system objects are recovered, and the new instance of the application is updated with the recovered custom objects and system objects. Saving a system object includes acquiring information content of fields of the system object, encoding and storing the information content into a data serialization format in a reserved area of a non-volatile memory of the secure element. Recovering the saved system object includes reading and decoding the encoded information content from the reserved area of the non-volatile memory of the secure element. The system object is recovered using the obtained information content of the fields.

Abstract: A row decoder circuit includes an input node receiving a row selection signal and an output node coupled to a memory device word line. A pull-down circuit couples the word line to ground in response to the row selection signal being asserted. A pull-up circuit couples the word line to a supply node in response to a deselection signal being de-asserted. An inverter circuit receives as input a control signal from a control node and produces the deselection signal. A current generator sources a biasing current to the control node. A further pull-down circuit couples the control node to ground in response to the row selection signal being asserted, and comprises a first cascode n-channel transistor, a cascode p-channel transistor, a second cascode n-channel transistor, and at least one selection transistor controlled by the row selection signal, all having their conductive channels arranged in series.

Abstract: A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

Abstract: Power module packaged in a housing accommodating a carrying substrate forming a plurality of connection regions of conductive material. An electronic component is arranged inside the housing, attached to a connection region of the plurality of connection regions. An electrical connector, coupled to the electronic component, extends towards the main surface of the housing and is accessible from the outside of the housing. The electrical connector has a tubular portion forming a pillar fixed to a pin which protrudes from the greater surface of the housing. The housing includes a packaging mass of electrically insulating material that embeds the pillar and blocks it therein.

Abstract: A warped semiconductor die is attached onto a substrate such as a leadframe by dispensing a first mass of die attach material onto an area of the substrate followed by dispensing a second mass of die attach material so that the second mass of die attach material provides a raised formation of die attach material. For instance, the second mass may be deposited centrally of the first mass. The semiconductor die is placed onto the first and second mass of die attach material with its concave/convex shape matching the distribution of the die attach material thus effectively countering undesired entrapment of air.

Abstract: An integrated circuit includes a memory and processing circuitry. The memory stores an Elementary File Test (EFT) file including a record storing information to update a target elementary file (TGF) in a file system of the EFT. The stored information includes a file path identifier identifying a position of the TGF in the file system of the EFT file, which is a concatenation of a parent file identifier followed by an identifier of the TGF, a first length indicator of a first type of data, the data of the first type, a second length indicator to indicate a length of a second type of data, and the data of the second type. The processing circuitry, in operation, identifies the TGF based on the file path identifier and updates the content of the TGF to include the first data and one or more instances of the second data.

Abstract: A differential piezoelectric actuator-system includes an inductor and driver-circuit having switches for transferring energy between first and second actuators and the inductor, and between a voltage-supply node and the inductor. Control circuitry determines whether a next phase in which to operate the driver-circuit is a first charging-phase or a first recovery-phase. The first charging-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the voltage supply node to the inductor; and a third sub-phase to transfer energy from the inductor to the second actuator. The first recovery-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the inductor to the voltage supply node; and a third sub-phase to transfer energy from the inductor to the second actuator.

Abstract: A BGA package includes an array of electrically conductive balls providing electrical contact for a semiconductor die. A power channel is provided to convey power supply current towards the semiconductor die. The power channel is formed by a stack of electrically conductive planes. The electrically conductive planes are stacked in a stepped arrangement wherein a number of stacked planes in each step of the stack increases in a direction from a distal end to a proximal end of the power channel. Adjacent electrically conductive planes in the stack of the power channel are electrically coupled with electrically conductive vias extending therebetween. Current conduction paths towards the die area thus have resistance values that decrease from the distal end to the proximal end of the power channel.

Abstract: A system for detecting and evaluating environmental quantities and events is formed by a detection and evaluation device and a mobile phone, connected through a wireless connection. The device is enclosed in a containment casing housing a support carrying a plurality of inertial sensors and environmental sensors. A processing unit is coupled to the inertial sensors and to the environmental sensors. A wireless connection unit, is coupled to the processing unit and a wired connection port, is coupled to the processing unit. A programming connector is coupled to the processing unit and is configured to couple to an external programming unit to receive programming instructions of the processing unit. A storage structure is coupled to the processing unit and a power-supply unit supplied power in the detection and evaluation device. The mobile phone stores an application, which enables a basic use mode, an expert use mode, and an advanced use mode.

Abstract: MEMS structure, comprising: a semiconductor body; a cavity buried in the semiconductor body; a membrane suspended on the cavity; and at least one antistiction bump completely contained in the cavity with the function of preventing the side of the membrane internal to the cavity from sticking to the opposite side, which delimits the cavity downwardly.

Abstract: An enhancement mode high electron-mobility transistor (HEMT) device includes a semiconductor body having a top surface and including a heterostructure configured to generate a two-dimensional electron gas, 2DEG. The HEMT device includes a gate structure which extends on the top surface of the semiconductor body, is biasable to electrically control the 2DEG and includes a functional layer and a gate contact in direct physical and electrical contact with each other. The gate contact is of conductive material and the functional layer is of two-dimensional semiconductor material and includes a first doped portion with P-type electrical conductivity, which extends on the top surface of the semiconductor body and is interposed between the semiconductor body and the gate contact along a first axis.

Abstract: MEMS gyroscope, having a first movable mass configured to move with respect to a fixed structure along a first drive direction and along a first sense direction, transverse to the first drive direction; a first drive assembly, coupled to the first movable mass and configured to generate a first alternate drive movement; a first drive elastic structure, coupled to the first movable mass and to the first drive assembly, rigid in the first drive direction and compliant in the first sense direction; a second movable mass, configured to move with respect to the fixed structure in a second drive direction parallel to the first drive direction and in a second sense direction parallel to the first sense direction; a second drive assembly, coupled to the second movable mass and configured to generate a second alternate drive movement in the second drive direction; and a second drive elastic structure, coupled to the second movable mass and to the second drive assembly, rigid in the second drive direction and compliant

Abstract: A driving circuit is implemented for a driving resonator stage of a MEMS gyroscope including at least a first and a second electrode and a movable mass The driving circuit includes a synchronization stage which receives an electrical position signal indicative of the position of the movable mass and generates a reference signal phase- and frequency-locked with the electrical position signal; a driving stage which generates, on the basis of the reference signal, a first and a second driving signal, which are applied to the first and, respectively, the second electrodes, so that the movable mass is subject to a first and a second electrostatic force which cause the movable mass to oscillate.

Abstract: A monitoring circuit performing logical and temporal task monitoring of a plurality of tasks comprises a task recording circuit and a task management circuit receiving as input a plurality of task signals, each task signal being indicative of an execution state of a respective task. The task management circuit comprises a managing circuit configured to operate in at least three modes depending on a respective event corresponding to either detection of a rising edge of a given task signal, occurrence of a trigger signal, or detection of a falling edge of a given task signal being monitored. In each mode the managing circuit is configured to check whether a variable representing the operation state of the task contains an expected value corresponding to the occurrence of the event enabling the respective mode, and output a result of the check operation in an error signal for the given task being monitored.

Abstract: According to an embodiment, a flyback converter includes a transformer, a power switch coupled to the primary winding of the transformer, and a controller. The controller comprises a voltage-dependent current source, a reference capacitor, comparators, and logic circuitry. The controller estimates the primary inductance of the transformer based on the voltage across the reference capacitor, detects a saturation condition based on the estimated inductance and primary current, and implements a protection mechanism in response. The controller can distinguish between genuine overload conditions and potential magnetic tampering attempts. The protection mechanism may involve increasing the switching frequency. The controller may include an adjustable transconductance to set the saturation detection threshold and implement a delay before activating protection. This allows for more targeted protection against core saturation and magnetic interference while maintaining normal operation under high-load conditions.

Abstract: Provided is a DC-DC converter with galvanic isolation comprising a resonant oscillator coupled to a primary winding of a galvanic isolation transformer. A rectifier is coupled to a secondary winding of the transformer to provide an output voltage. The DC-DC converter comprises a regulation loop configured to regulate an output voltage with respect to a reference voltage by controlling a current flowing in the resonant oscillator as a function of a result of a signal indicative of the comparison between the output voltage and the reference voltage. The resonant oscillator is configured to operate at a frequency, in particular tuned at sub-resonant point, in particular sub-harmonic frequency, below a resonance frequency of the resonant oscillator which maximizes a quality factor of the resonant oscillator, in particular below a resonance frequency of a LC tank circuit comprised in the resonant oscillator which maximizes a quality factor of the LC tank circuit.