Patents Assigned to STMicroelectronics S.r.l.
  • Patent number: 12742643
    Abstract: A driving circuit is implemented for a driving resonator stage of a MEMS gyroscope including at least a first and a second electrode and a movable mass The driving circuit includes a synchronization stage which receives an electrical position signal indicative of the position of the movable mass and generates a reference signal phase- and frequency-locked with the electrical position signal; a driving stage which generates, on the basis of the reference signal, a first and a second driving signal, which are applied to the first and, respectively, the second electrodes, so that the movable mass is subject to a first and a second electrostatic force which cause the movable mass to oscillate.
    Type: Grant
    Filed: January 3, 2024
    Date of Patent: September 22, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Gabriele Gattere, Marco Garbarino
  • Patent number: 12737246
    Abstract: A monitoring circuit performing logical and temporal task monitoring of a plurality of tasks comprises a task recording circuit and a task management circuit receiving as input a plurality of task signals, each task signal being indicative of an execution state of a respective task. The task management circuit comprises a managing circuit configured to operate in at least three modes depending on a respective event corresponding to either detection of a rising edge of a given task signal, occurrence of a trigger signal, or detection of a falling edge of a given task signal being monitored. In each mode the managing circuit is configured to check whether a variable representing the operation state of the task contains an expected value corresponding to the occurrence of the event enabling the respective mode, and output a result of the check operation in an error signal for the given task being monitored.
    Type: Grant
    Filed: November 11, 2024
    Date of Patent: September 15, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giuseppe D'Angelo
  • Patent number: 12738852
    Abstract: According to an embodiment, a flyback converter includes a transformer, a power switch coupled to the primary winding of the transformer, and a controller. The controller comprises a voltage-dependent current source, a reference capacitor, comparators, and logic circuitry. The controller estimates the primary inductance of the transformer based on the voltage across the reference capacitor, detects a saturation condition based on the estimated inductance and primary current, and implements a protection mechanism in response. The controller can distinguish between genuine overload conditions and potential magnetic tampering attempts. The protection mechanism may involve increasing the switching frequency. The controller may include an adjustable transconductance to set the saturation detection threshold and implement a delay before activating protection. This allows for more targeted protection against core saturation and magnetic interference while maintaining normal operation under high-load conditions.
    Type: Grant
    Filed: October 16, 2024
    Date of Patent: September 15, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventor: Fabio Cacciotto
  • Patent number: 12738853
    Abstract: Provided is a DC-DC converter with galvanic isolation comprising a resonant oscillator coupled to a primary winding of a galvanic isolation transformer. A rectifier is coupled to a secondary winding of the transformer to provide an output voltage. The DC-DC converter comprises a regulation loop configured to regulate an output voltage with respect to a reference voltage by controlling a current flowing in the resonant oscillator as a function of a result of a signal indicative of the comparison between the output voltage and the reference voltage. The resonant oscillator is configured to operate at a frequency, in particular tuned at sub-resonant point, in particular sub-harmonic frequency, below a resonance frequency of the resonant oscillator which maximizes a quality factor of the resonant oscillator, in particular below a resonance frequency of a LC tank circuit comprised in the resonant oscillator which maximizes a quality factor of the LC tank circuit.
    Type: Grant
    Filed: February 9, 2024
    Date of Patent: September 15, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Stefano Perrotta, Salvatore Giuseppe Privitera, Francesco Pulvirenti
  • Publication number: 20260271350
    Abstract: A MOSFET transistor device includes a functional layer of silicon carbide, having a first conductivity type. Gate structures are formed on a top surface of the functional layer and each includes a dielectric region and an electrode region. Body wells having a second conductivity type are formed within the functional layer, and the body wells are separated from one another by surface-separation regions. Source regions having the first conductivity type are formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.
    Type: Application
    Filed: April 24, 2026
    Publication date: September 10, 2026
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Patrick FIORENZA, Fabrizio ROCCAFORTE, Edoardo ZANETTI, Mario Giuseppe SAGGIO
  • Patent number: 12733515
    Abstract: A semiconductor chip or die is arranged on a first surface of a thermally conductive die pad of a substrate such as a leadframe. An encapsulation of insulating material in molded onto the die pad having the semiconductor die arranged on the first surface. At the second surface of the die pad, opposite the first surface, the encapsulation borders on the die pad at a borderline around the die pad. A recessed portion of the encapsulation is provided, for example, via laser ablation, at the borderline around the die pad. Thermally conductive material such as metal material is filled in the recessed portion of the encapsulation around the die pad. The surface area of the thermally conductive die pad is augmented by the filling of thermally conductive material in the recessed portion of the encapsulation thus improving thermal performance of the device.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: September 8, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventor: Riccardo Villa
  • Patent number: 12729110
    Abstract: Electronic device including: a MEMS sensor device including a functional structure which transduces a chemical or physical quantity into a corresponding electrical quantity; a cap including a semiconductive substrate; and a bonding dielectric region, which mechanically couples the cap to the MEMS sensor device. The cap further includes a conductive region, which extends between the semiconductive substrate and the MEMS sensor device and includes: a first portion, which is arranged laterally with respect to the semiconductive substrate and is exposed, so as to be electrically coupleable to a terminal at a reference potential by a corresponding wire bonding; and a second portion, which contacts the semiconductive substrate.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: September 8, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Giorgio Allegato, Silvia Nicoli, Anna Alessandri, Matteo Garavaglia
  • Patent number: 12730464
    Abstract: The present disclosure is directed to a voltage regulation circuit receiving as input an input voltage, in particular a DC voltage supply, and outputting a regulated voltage. The voltage regulation circuit includes a voltage reference circuit configured to supply a reference voltage which is independent, in particular with respect to temperature variations. The voltage regulation circuit includes a first circuit branch and a second circuit branch in parallel coupled between the input voltage and ground. The first branch includes a current generator including a first depletion MOSFET transistor, which gate source voltage is a PTAT (Proportional To Absolute Temperature) voltage, coupled between the input voltage and the voltage reference circuit.
    Type: Grant
    Filed: March 20, 2024
    Date of Patent: September 8, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Cesare Bimbi, Salvatore Giuseppe Privitera, Francesco Pulvirenti
  • Patent number: 12733191
    Abstract: A process for manufacturing a HEMT device includes forming a conductive region on a work body having a semiconductive heterostructure. To obtain the conductive region, a first reaction region having carbon is formed on the heterostructure and a metal stack is formed having a second reaction region in contact with the first reaction region. The work body is annealed, so that the first reaction region reacts with the second reaction region, thus forming an interface portion of the conductive region. The interface portion is of a compound having carbon and is in ohmic contact with the semiconductive hetero structure.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: September 8, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ferdinando Iucolano, Giuseppe Greco, Paolo Badala', Fabrizio Roccaforte, Monia Spera
  • Patent number: 12727185
    Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.
    Type: Grant
    Filed: December 5, 2023
    Date of Patent: September 1, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ferdinando Iucolano, Alfonso Patti, Alessandro Chini
  • Patent number: 12722969
    Abstract: Process for manufacturing a MEMS device, including: forming a dielectric region which coats part of a semiconductive substrate of a first semiconductive wafer; forming a region which is permeable to gases and coats the dielectric region; coupling the first semiconductive wafer to a second semiconductive wafer so as to form a first chamber, which houses a first movable mass and has a pressure equal to a first value, and a second chamber, which houses a second movable mass and has a pressure equal to the first value, the permeable region facing the second chamber; selectively removing a portion of the semiconductor substrate and an underlying portion of the dielectric region, so as to expose a part of the permeable region, so as to allow gas exchanges through the permeable region; placing the first and the second semiconductive wafers in an environment with a pressure equal to a second value, so that the pressure in the second chamber becomes equal to the second value; and subsequently forming, on the exposed p
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: September 1, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Paolo Ferrari, Flavio Francesco Villa
  • Patent number: 12726186
    Abstract: The disclosure pertains to adaptive wake-up threshold generation in variable power supplies, particularly applicable to USB-PD chargers and wireless charging devices with digital controllers. It addresses the problem of power consumption during zero-load conditions in burst mode operation. The invention comprises a circuit with a processor, a GPIO pin, and a wake-up threshold generator. The processor drives a signal generator in burst mode, alternating between wake-up phases and waiting intervals. The GPIO pin is set to different states based on the wake-up threshold's relation to predefined bounds. The wake-up threshold generator adjusts the threshold in response to the GPIO pin's state. This adaptive approach enables efficient power management by allowing deep sleep during waiting times while maintaining responsiveness to varying output voltages, thus improving overall system efficiency in variable power supply applications.
    Type: Grant
    Filed: October 21, 2024
    Date of Patent: September 1, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Ciappa, Alberto Bianco, Riccardo Peloso
  • Patent number: 12726129
    Abstract: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.
    Type: Grant
    Filed: September 25, 2024
    Date of Patent: September 1, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Claudio Adragna, Massimiliano Gobbi, Giuseppe Bosisio
  • Patent number: 12718845
    Abstract: In accordance with an embodiment, a hard disk drive includes voice coil motors (VCMs) coupled to respective control units configured to drive retract an operation of the VCMs in the hard disk drive. The retract operation of the VCMs includes a sequence of retract steps. The control units are allotted respective time slots for communication over a communication line with the respective time slots synchronized via the common clock line, and are configured to drive sequences of retract steps of the VCMs in the hard disk drive in a timed relationship.
    Type: Grant
    Filed: July 7, 2025
    Date of Patent: August 25, 2026
    Assignees: STMicroelectronics S.r.l., STMicroelectronics KK
    Inventors: Marco Ferrari, Davide Betta, Diego Tognoli, Roberto Trabattoni
  • Patent number: 12717865
    Abstract: A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and iteration control circuitry. The convolutional accelerator, in operation, convolves a kernel with a streaming feature data tensor. The convolving includes decomposing the kernel into a plurality of sub-kernels and iteratively convolving the sub-kernels with respective sub-tensors of the streamed feature data tensor. The iteration control circuitry, in operation, defines respective windows of the streamed feature data tensors, the windows corresponding to the sub-tensors.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: August 25, 2026
    Assignees: STMICROELECTRONICS S.r.l., STMicroelectronics International N.V.
    Inventors: Antonio De Vita, Thomas Boesch, Giuseppe Desoli
  • Patent number: 12710445
    Abstract: The present disclosure is directed to pick-up state detection for an electronic device, such as a laptop. In a pick-up state, the device is picked or lifted up from a surface, such as a table. A power state of the device is adjusted in response to detecting the pick-up state. For example, the device is in a hibernate state while set on the table, and is switched to a working state in response to detecting the pick-up state.
    Type: Grant
    Filed: July 13, 2023
    Date of Patent: August 18, 2026
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Stefano Paolo Rivolta
  • Patent number: 12713675
    Abstract: Method of manufacturing an electronic device, comprising forming an ohmic contact at an implanted region of a semiconductor body. Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: August 18, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Mario Giuseppe Saggio, Cateno Marco Camalleri, Gabriele Bellocchi, Simone Rascuna′
  • Patent number: 12710827
    Abstract: A method for gesture tracking and motion tracking. The method includes providing a barometric signal via a barometric sensor, processing the barometric signal with a state machine having a plurality of states, the plurality of states comprising stationary states and moving states, transitioning from a first state of the plurality of states of the state machine to a second state of the plurality of states of the state machine as a function of the barometric signal reaching a signal threshold and as a function of a time reaching a time threshold, and determining a movement of the barometric sensor based on the transition from the first state to the second state.
    Type: Grant
    Filed: December 13, 2024
    Date of Patent: August 18, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fabio Passaniti, Enrico Rosario Alessi, Salvatore Ferrara
  • Patent number: 12713648
    Abstract: The present disclosure is directed to an electronic device including a semiconductor body having a first electrical conductivity and provided with a front side; an active area of the semiconductor body, accommodating the source and gate regions of the electronic device and configured to accommodate, in use, a conductive channel of the electronic device; and an edge region of the electronic device, surrounding the active area. The edge region accommodates at least in part: i) an edge termination region, having a second electrical conductivity opposite to the first electrical conductivity, extending into the semiconductor body at the front side; and ii) a gate connection terminal of conductive material, electrically coupled to the gate region, extending on the front side partially superimposed on the edge termination region and capacitively coupled with a portion of the semiconductor body adjacent and external to the edge termination region.
    Type: Grant
    Filed: September 15, 2023
    Date of Patent: August 18, 2026
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Salvatore Cascino, Alfio Guarnera, Mario Giuseppe Saggio
  • Patent number: 12707994
    Abstract: A semiconductor device includes an electrically conductive clip arranged in a bridge-like position between a semiconductor integrated circuit chip and an electrically conductive pad of a leadframe. The electrically conductive clip is soldered to the semiconductor integrated circuit chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor integrated circuit chip and the electrically conductive pad. Prior to soldering, the clip is immobilized in the desired bridge-like position via one of welding (such as laser welding) or gluing at dedicated immobilization areas.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: August 11, 2026
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mauro Mazzola, Fabio Marchisi