Patents Assigned to STMICROELECTRONICS (TOURS)
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Patent number: 12361255Abstract: In an embodiment an electronic device includes a first electronic circuit having a capacitive element with a variable capacitance, wherein the first electronic circuit is configured to couple the capacitive element to an antenna, to measure, by successive iterations, a first analog signal representative of a variation of an instantaneous electric power received by the antenna or representative of the instantaneous electric power received by the antenna and to modify the capacitance of the capacitive element until an amplitude of the instantaneous electric power received by the antenna is a maximum, wherein the antenna is configured to capture an amplitude-modulated electromagnetic field.Type: GrantFiled: May 12, 2023Date of Patent: July 15, 2025Assignees: STMICROELECTRONICS France, STMICROELECTRONICS (GRENOBLE 2) SASInventors: Franck Montaudon, Julien Goulier
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Patent number: 12362836Abstract: The present disclosure is directed to a light-signal communication receiver device including a photo-receiving diode configured to generate a current signal on a first node from a received light signal, a preamplifier configured to convert the current signal on the first node into a voltage signal on a second node, and a differential amplifier including a first input connected to the first node and a second input connected to a third node coupled to the second node via an adjustment circuit. The adjustment circuit is configured to offset the level of the voltage signal of the second node, on the third node, in a controlled manner by a control signal.Type: GrantFiled: January 4, 2023Date of Patent: July 15, 2025Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SASInventors: Nicolas Moeneclaey, Vratislav Michal, Jean-Luc Patry
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Publication number: 20250227895Abstract: The device has a first support element forming a first thermal dissipation surface and carrying a first power component; a second support element forming a second thermal dissipation surface and carrying a second power component, a first contacting element superimposed to the first power component; a second contacting element superimposed to the second power component; a plurality of leads electrically coupled with the power components through the first and/or the second support elements; and a thermally conductive body arranged between the first and the second contacting elements. The first and the second support elements and the first and the second contacting elements are formed by electrically insulating and thermally conductive multilayers.Type: ApplicationFiled: March 31, 2025Publication date: July 10, 2025Applicant: STMICROELECTRONICS S.r.l.Inventors: Cristiano Gianluca STELLA, Francesco SALAMONE
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Patent number: 12356330Abstract: Systems, apparatuses, methods, and computer products for fast wakeup recovery for narrow-band internet of things (NBIOT) systems are provided. The fast wakeup recovery may wakeup a NBIOT device from a sleep mode to an active mode. The fast wakeup recovery may identify a servicing cell for the NBIOT device to synchronize with. The fast wakeup recovery may be based on a coarse timing detection operation using a NPSS and a fine timing detection operation using a NSSS.Type: GrantFiled: December 20, 2022Date of Patent: July 8, 2025Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Abdelmohsen Ali, Mohammed Ashraf, Elsayed Ahmed
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Patent number: 12354932Abstract: One or more embodiments are directed to quad flat no-lead (QFN) semiconductor packages, devices, and methods in which one or more electrical components are positioned between a die pad of a QFN leadframe and a semiconductor die. In one embodiment, a device includes a die pad, a lead that is spaced apart from the die pad, and at least one electrical component that has a first contact on the die pad and a second contact on the lead. A semiconductor die is positioned on the at least one electrical component and is spaced apart from the die pad by the at least one electrical component. The device further includes at least one conductive wire, or wire bond, that electrically couples the at least one lead to the semiconductor die.Type: GrantFiled: November 13, 2023Date of Patent: July 8, 2025Assignee: STMICROELECTRONICS S.r.l.Inventors: Cristina Somma, Fulvio Vittorio Fontana
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Patent number: 12349302Abstract: The electronic module has a three-dimensional frame, a printed circuit board and a plurality of electronic devices. The printed circuit board is fixed to the three-dimensional frame and has a plurality of support portions which extend transversely to each other in space. The electronic devices are fixed to the printed circuit board and are operatively coupled to each other. The electronic devices are arranged on at least one support portion of the printed circuit board.Type: GrantFiled: November 16, 2022Date of Patent: July 1, 2025Assignee: STMICROELECTRONICS S.r.l.Inventors: Luca Maggi, Marco Del Sarto, Alex Gritti, Amedeo Maierna
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Patent number: 12346757Abstract: The present disclosure relates to an electronic device comprising: at least one universal integrated circuit card or at least one secure element and at least one power supply circuit for said card or secure element, said power supply circuit being connected to at least a first power supply voltage source of the electronic device and comprising a voltage detector adapted to determine whether said first voltage source provides a first power supply voltage different from a reference voltage; and at least one near field communication module adapted to enter an active mode whenever said voltage detector determines that said first supply voltage is different from the reference voltage.Type: GrantFiled: August 9, 2022Date of Patent: July 1, 2025Assignees: STMICROELECTRONICS (ROUSSET) SAS, STMICROELECTRONICS (ALPS) SASInventors: Alexandre Tramoni, Patrick Arnould
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Patent number: 12348224Abstract: An integrated circuit includes a programmable logic block. The programmable logic block includes a programmable logic array (PLA) and a field programmable gate array (FPGA). The PLA includes logic cells having a first architecture. The FPGA includes logic cells having a second architecture more complex than the first architecture. The programmable logic block includes an interface coupled to the PLA and the FPGA. An integrated circuit may also include circuitry for selecting one of plurality of clock signals for logic cells of a PLA.Type: GrantFiled: February 7, 2024Date of Patent: July 1, 2025Assignee: STMICROELECTRONICS (ROUSSET) SASInventors: Mark Wallis, Jean-Francois Link, Joran Pantel
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Patent number: 12341815Abstract: The present description discloses a secure element and a communication method comprising a router managing first messages using a first communication protocol between applications of the secure element and the outside of the secure element, and a software layer performing a processing at the level of the router. The software layer is adapted to verify the compatibility of a second communication protocol, different from the first one, with which second messages are received, in the absence of a compatibility, convert the second messages into the first communication protocol, and transmit the second messages to the router.Type: GrantFiled: September 24, 2021Date of Patent: June 24, 2025Assignees: STMICROELECTRONICS (ROUSSET) SAS, STMICROELECTRONICS BELGIUMInventors: Olivier Van Nieuwenhuyze, Alexandre Charles
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Patent number: 12342602Abstract: The present disclosure relates to a structure comprising, in a trench of a substrate, a first conductive region separated from the substrate by a first distance shorter than approximately 10 nm; and a second conductive region extending deeper than the first region.Type: GrantFiled: December 30, 2021Date of Patent: June 24, 2025Assignee: STMICROELECTRONICS (TOURS) SASInventor: Frederic Lanois
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Patent number: 12342734Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.Type: GrantFiled: April 25, 2024Date of Patent: June 24, 2025Assignees: STMicroelectronics (Crolles 2) SAS, STMICROELECTRONICS (ROUSSET) SASInventors: Philippe Boivin, Roberto Simola, Yohann Moustapha-Rabault
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Patent number: 12342641Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.Type: GrantFiled: June 14, 2024Date of Patent: June 24, 2025Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SASInventors: Raul Andres Bianchi, Marios Barlas, Alexandre Lopez, Bastien Mamdy, Bruce Rae, Isobel Nicholson
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Patent number: 12336432Abstract: A MEMS device is provided that includes a semiconductor substrate including a main surface extending perpendicular to a first direction and a side surface extending on a plane parallel to the first direction and to a second direction that is perpendicular to the first direction. At least one cantilevered member protrudes from the side surface of the semiconductor substrate along a third direction that is perpendicular to the first and second directions. The at least one cantilevered member includes a body portion that includes a piezoelectric material. The body portion has a length along the third direction, a height along the first direction and a width along the second direction, and the height is greater than the width. The at least one cantilevered member is configured to vibrate by lateral bending along a direction perpendicular to the first direction.Type: GrantFiled: December 11, 2023Date of Patent: June 17, 2025Assignee: STMICROELECTRONICS S.r.l.Inventors: Gianluca Longoni, Luca Seghizzi
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Patent number: 12334811Abstract: An integrated circuit device includes: one or more switches of a Buck converter; and a control circuit for the Buck converter, including: a comparator configured to compare a feedback voltage of the Buck converter with a compensation ramp voltage; a pulse generator configured to generate, in response to a rising edge in a comparator output signal, a pulse signal for controlling the Buck converter; a transconductance amplifier (TA) configured to generate, at an output terminal of the TA, a current proportional to a difference between a reference voltage and the feedback voltage; a capacitor coupled between an output terminal of the TA and a reference voltage node; and a ramp signal generator configured to generate the compensation ramp voltage by adding a voltage at the output terminal of the TA and a ramp voltage having a gradient proportional to a switching frequency of the Buck converter.Type: GrantFiled: June 14, 2023Date of Patent: June 17, 2025Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Niccolo′ Brambilla, Sandro Rossi, Valeria Bottarel, Stefano Corona, Fulvio Ottavio Lissoni
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Patent number: 12335373Abstract: Encryption of data using a cryptographic device is protected. The protecting includes generating a first output of a first branch by encrypting a constant using a key, and generating a first output of a second branch by encrypting a constant using a key. The first output of the first branch, the first output of the second branch, and a first portion of plaintext data are XORed, generating a first portion of cypher text. A second output of the first branch is generated by encrypting the first output of the first branch using a key, and a second output of the second branch is generated by encrypting the first output of the second branch using a key. The second output of the first branch, the second output of the second branch, and a second portion of plaintext data are XORed, generating a second portion of cypher text.Type: GrantFiled: June 13, 2022Date of Patent: June 17, 2025Assignee: STMICROELECTRONICS S.r.l.Inventor: Ruggero Susella
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Publication number: 20250191935Abstract: The present description concerns a method of manufacturing a device comprising at least one radio frequency component on a semiconductor substrate comprising: a) a laser anneal of a first thickness of the substrate on the upper surface side of the substrate; b) the forming of an insulating layer on the upper surface of the substrate; and c) the forming of said at least one radio frequency component on the insulating layer.Type: ApplicationFiled: February 14, 2025Publication date: June 12, 2025Applicant: STMICROELECTRONICS (TOURS) SASInventor: Patrick HAUTTECOEUR
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Publication number: 20250190207Abstract: A near field communication (NFC) system utilizes an NFC reader in reader mode to update firmware of a controller associated with the NFC reader. An NFC device receives firmware update data. The NFC reader, operating in reader mode, reads the firmware update data from the NFC device.Type: ApplicationFiled: March 16, 2022Publication date: June 12, 2025Applicant: STMICROELECTRONICS (CHINA) INVESTMENT CO., LTD.Inventors: Tianhao XIONG, Gang WU
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Patent number: 12326984Abstract: The present disclosure is directed to pick-up state detection for an electronic device, such as a laptop. In a pick-up state, the device is picked or lifted up from a surface, such as a table. A power state of the device is adjusted in response to detecting the pick-up state. For example, the device is in a hibernate state while set on the table, and is switched to a working state in response to detecting the pick-up state.Type: GrantFiled: August 5, 2022Date of Patent: June 10, 2025Assignee: STMICROELECTRONICS S.R.L.Inventors: Stefano Paolo Rivolta, Roberto Mura
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Publication number: 20250181120Abstract: The present disclosure is directed to a device and method for lid angle detection that is accurate even if the device is activated in an upright position. While the device is in a sleep state, first and second sensor units measure acceleration and angular velocity, and calculate orientations of respective lid components based on the acceleration and angular velocity measurements. Upon the device exiting the sleep state, a processor estimates the lid angle using the calculated orientations, sets the estimated lid angle as an initial lid angle, and updates the initial lid angle using, for example, two accelerometers; two accelerometers and two gyroscopes; two accelerometers and two magnetometers; or two accelerometers, two gyroscopes, and two magnetometers.Type: ApplicationFiled: February 11, 2025Publication date: June 5, 2025Applicant: STMICROELECTRONICS S.r.l.Inventors: Federico RIZZARDINI, Lorenzo BRACCO
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Publication number: 20250183135Abstract: Generally described, one or more embodiments are directed to semiconductor packages comprising a plurality of leads and methods of forming same. The plurality of leads include active leads that are electrically coupled to bond pads of a semiconductor die and thereby coupled to active components of the semiconductor die, and inactive leads that are not electrically coupled to bond pads of the semiconductor die. The active leads have surfaces that are exposed at a lower surface of the semiconductor package and forms lands, while the inactive leads are not exposed at the lower surface of the package.Type: ApplicationFiled: December 23, 2024Publication date: June 5, 2025Applicant: STMICROELECTRONICS, INC.Inventors: Ela Mia CADAG, Frederick Ray GOMEZ, Aaron CADAG