Abstract: A circuit for restoring bits transmitted by an asynchronous signal includes a first comparator for comparing the level of the asynchronous signal with a first threshold adjusted as a function of the output of the first comparator during synchronization bursts of the asynchronous signal, and at least a second comparator for comparing the level of the asynchronous signal with a second threshold correlated to the first threshold.

Abstract: An incandescent lamp has an attachment for connection to a two-wire electrical power line and a bulb containing a radiating element. At least two filaments are housed in the bulb and constitute the radiating element, and circuitry has an input connected to the electrical power line and an output connected to filaments. When a selection signal indicating the desired brightness is passed to circuitry, preferably along the electrical power line, and acts in such a way that circuitry selectively provides a feed to filaments on the basis of the selection signal, a change in brightness is obtained without deterioration of the color characteristics because the filaments operate under their rated operating conditions. The change in brightness will not be continuous, but discrete, but is more than acceptable for domestic requirements even with a small number of filaments.

Abstract: The invention relates to a dimensional control device for semiconductor wafer transport cassettes. Each cassette has a base from which extend vertical walls including horizontal grooves designed to receive wafers by lateral insertion. The device includes a seat provided with positioning guides of a cassette base; switches placed on the seat so that the actuation of all the switches by the positioned base indicate a suitable planarity of the base; a drawer mounted slidably on the seat so as to be engageable in the cassette in the insertion direction of the wafers, and having at least one template corresponding to a high position groove of the cassette; and a stop placed on the seat, at the side opposite to the drawer with respect to the cassette, to cause a tilting of the cassette when the drawer is moved towards the cassette and the template does not correspond to the cassette.

Abstract: An integrated circuit includes a plurality of MOSFETs on a substrate. The plurality of MOSFETs preferably includes at least one MOSFET having a first conductivity type and at least one MOSFET having a second conductivity type. Each MOSFET has an initial threshold voltage. The integrated circuit also preferably includes first and second biasing circuits which selectively bias only a selected well a corresponding conductivity type of the plurality of MOSFETs to produce an absolute value of an effective threshold voltage of only the selected MOSFET which is lower than an absolute value of the initial threshold voltage thereof and thereby inhibit a high standby current for the integrated circuit. Method aspects of the invention are also disclosed.

Abstract: Generation of symmetrical temperature compensated reference voltages in mixed type integrated circuits (digital and analog) having a superior PSRR is provided. Such a circuit includes a voltage-to-current conversion stage of a temperature independent bandgap voltage for producing a differential pair of currents that are applied as inputs to a pair of resistor feedback operational amplifiers. The feedback resistors are integrated in an interlaced form with a resistor employed in the conversion stage so that they have the same thermal gradient. Output of the operational amplifiers provides two temperature compensated low noise symmetrical reference voltages.

Abstract: A method is provided for depositing aluminum thin film layers to form contacts in a semiconductor integrated circuit device. All or some of the deposition process occurs at relatively low deposition rates at a temperature which allows improved surface migration of the deposited aluminum atoms. Aluminum deposited under these conditions tends to fill contact vias without the formation of voids. The low temperature deposition step can be initiated by depositing aluminum while a wafer containing the integrated circuit device is being heated from cooler temperatures within the deposition chamber.

Abstract: A method is provided for forming an improved device dielectric of a semiconductor integrated circuit, and an integrated circuit formed according to the same. For scaling geometries for use in the submicron regime, a composite dielectric layer used as a device dielectric is formed over a plurality of active areas adjacent to a field oxide region. The composite dielectric layer is formed before the field oxide region is formed and comprises a non-porous silicon nitride layer. The non-porous silicon nitride layer preferably comprises a thin deposited silicon nitride layer overlying a thin nitridized region of the substrate. The silicon nitride layer is partially oxidized during the subsequent formation of a field oxide region between the plurality of active areas. An oxide layer may be formed over the silicon nitride layer before the formation of the field oxide region which will then be densified during the field oxide formation.

Abstract: The present invention provides a method for minimizing voids in a plug. The process begins by forming a conformal barrier layer within the hole and then forming a metal plug within the hole. Thereafter, a cap layer is formed over the metal plug in which the cap layer has a lower thermal expansion coefficient than the metal plug. The hole is heated such that the metal in the hole flows to eliminate the void as a result of the compressive stress generated by the cap layer on the metal plug.

Abstract: A DMOS device in a complex integrated circuit having a well region defined by a buried isolation region and an overlapping deep drain region within an epitaxial layer formed over a substrate, a body region having two source regions within the well region, insulated gates over the two source regions, and a Schottky contact over a central portion of the well region and spaced from the body region. The Schottky contact defines a Schottky diode within the epitaxial layer for diverting current from the substrate in the event of a below ground effect or an oversupply effect. The invention reduces or eliminates altogether the effects of parasitic transistors in the complex integrated circuit.

Abstract: A set of circuits for controlling the slew rate of a driving transistor in a rotating three-phase DC motor having a "Y" configuration of coils. The slew rate is reduced when the rotational speed of the motor is low. The slew rate is controlled by controlling the voltage applied to a control terminal of the driving transistor. The voltage applied to the control terminal of the driving transistor is selected in response to a control signal that is indicative of the speed of the motor.

Abstract: A voltage regulator for producing an output voltage that selectively tracks a logic voltage or a reference voltage and method of operating the voltage regulator. The voltage regulator has a diode OR with a logic and reference transistors. The logic voltage is scaled to be close in value to the reference voltage, if the two are not close in value. When the scaled logic voltage is larger than the reference voltage the logic transistor is on, turning off the reference transistor and passing the logic voltage to the output of the diode OR. When the scaled logic voltage is smaller than the reference voltage the logic transistor is off and the reference transistor is on, passing the reference voltage to the output of the diode OR. The voltage at the output of the diode OR is then compared in a comparator with the voltage at the output of the voltage regulator, which is scaled by the same factor as the logic voltage.

Abstract: A power supply voltage monitoring device includes a constant voltage generator, a comparator to compare the power supply voltage with a reference voltage output by the constant voltage generator and to control the state of an output terminal. The device also comprises a delay circuit to put the output terminal into a predetermined state (low) for a predetermined duration exceeding the duration of the transient conditions, while the voltage generator is being put into operation. The power supply voltage monitoring device may typically be applied in microprocessor equipment.

Abstract: A circuit for controlling the slew rate at a motor coil during turn-on in a commutation sequence is disclosed. The disclosed circuit includes a switched current mirror that receives the commutation signal, and that provides a mirrored current to the input of an integrating buffer amplifier when its associated coil is to be driven. The integrating buffer amplifier includes an amplifier with a feedback capacitor, and a current source connected at its input, for reducing the voltage slew rate during turn-off of the transistor. The mirrored current applied to the input on the integrating buffer amplifier is greater than that of the current source, but limited so as to reduce the voltage slew at the coil.

Abstract: In a stereo decoder, channel separation takes place with the aid of a demodulator to acquire signals for stereo operation. At low received field strength there is a continuous switchover to mono operation for each channel in the demodulator. For this purpose a switch is located in a signal path between input and output of the demodulator and driven by a PWM signal whose pulse-width repetition rate determines whether solely mono operation, solely stereo operation or a mixture of the two takes place. For generating the PWM signal, the field strength signal is compared with a triangular signal. To permit the switchover points between stereo and mono operation to be aligned by the manufacturer in accordance with the amplitude of the field strength signal, the apparatus contains two limit storage registers in which digital limit signals are set from outside.

Abstract: A negative word line voltage regulation circuit integratable in an electrically erasable semiconductor memory device. The circuit regulates a negative word line voltage to be supplied to word lines of the memory device during an electrical erasure of the memory device. The circuit includes an operational amplifier with a first input coupled to a reference voltage, a second input coupled to the negative word line voltage, and an output controlling a voltage regulation branch connected between an external power supply and the negative word line voltage, to provide a regulation current for regulating the negative word line voltage. The output of the operational amplifier also controls a voltage sensing branch, connected between the external power supply and the negative word line voltage, to provide a sensing signal coupled to the second input of the operational amplifier.

Abstract: A circuit for driving a bridge circuit BR having a signal input I1,I2, and a signal output O1-O2, and at least two conduction control signals C1 and C2 by the PWM procedure. The circuit includes a first virtually-square-wave generator CO1 having an output coupled to one of the two control inputs and a second virtually-square-wave generator CO2 having an output coupled to the other of the two control inputs. In this manner, the bridge is driven by two square waves, the null value of the current at the output )O1-O2 no longer constitutes an intrinsic discontinuity and any value, even around zero, is controllable with relative ease.

Abstract: The analog processor can carry out processings independently of the operating temperature and process parameters, in a reliable manner and at high performance levels using fairly simple circuitry. To achieve this independence, the processor is basically implemented and integrated with MOS transistors, has both voltage inputs and outputs, and includes a biasing section which supplies voltage bias signals, of which at least one is substantially the sum of a voltage proportional to the threshold voltage of the MOS transistors and a reference voltage. This reference voltage can be extracted from a reference potential which is stable to temperature and process parameters, for example that produced by a bandgap type of generator. A major feature of the processor according to the invention is the linearity of its input-output characteristic relative to that reference voltage.

Abstract: According to the present invention, clock control logic circuitry of a clocked memory device using precharged data path techniques generates a self-timed pulse. The self-timed pulse is representative of a pulsed path active strobe or a reset strobe of the clocked memory device. The clock control logic circuitry of the present invention is characterized as having at least a first delay timing chain, a second delay timing chain, and means for selectively changing the width of a self-timed pulse generated by the clock control logic circuitry. Selectively changing the width of the self-timed pulse is accomplished by selectively adding the delay of the first delay timing chain to the delay of the second delay timing chain during a special mode of operation of the clocked memory device.

Abstract: A sense amplifier circuit for reading and verifying the contents of non-volatile memory cells in a semiconductor integrated device including a memory matrix of electrically programmable and erasable cells. The circuit includes a sense amplifier which has a first input connected to a reference load column incorporating a reference cell, and a second input connected to a second matrix load column incorporating a cell of the memory matrix. The circuit also includes a small matrix of reference cells connected, in parallel with one another, in the reference load column. Also provided is a double current mirror having a first mirror column which is connected to a node in the reference load column connected to the first input, and a second mirror column coupled to the second matrix load column to locally replicate, on the second mirror column, the electric potential at the node during a load equalizing step.

Abstract: An integrated circuit and method are provided for sensing activity such as temperature variations in a surrounding environment. The integrated released beam sensor preferably includes a switch detecting circuit region and a sensor switching region connected to the switch detecting circuit region. The sensor switching region preferably includes a fixed contact layer, a sacrificial layer on the fixed contact layer, and a floating contact on the sacrificial layer and having portions thereof overlying the fixed contact layer in spaced relation therefrom in an open switch position and extending lengthwise generally transverse to a predetermined direction. The floating contact preferably includes at least two layers of material. Each of the at least two layers have a different thermal expansion coefficient so that the floating contact displaces in the predetermined direction responsive to a predetermined temperature variation so as to contact the fixed contact layer and thereby form a closed switch position.