Abstract: A MEMS device is provided that includes a semiconductor substrate including a main surface extending perpendicular to a first direction and a side surface extending on a plane parallel to the first direction and to a second direction that is perpendicular to the first direction. At least one cantilevered member protrudes from the side surface of the semiconductor substrate along a third direction that is perpendicular to the first and second directions. The at least one cantilevered member includes a body portion that includes a piezoelectric material. The body portion has a length along the third direction, a height along the first direction and a width along the second direction, and the height is greater than the width. The at least one cantilevered member is configured to vibrate by lateral bending along a direction perpendicular to the first direction.

Abstract: Disclosed herein is a fine capacitance tuning circuit for a digitally controlled oscillator. The tuning circuit has low and high frequency tuning banks formed by varactors that have their top plates connected to one another. A controller initially sets states of switches selectively connecting the bottom plates of the varactors of the low frequency bank to a low voltage, a high voltage, or to an RC filter, in response to an integer portion of a control word. A sigma-delta modulator initially sets the states of switches selectively connecting the bottom plates of the varactors of the high frequency bank to either the low voltage or the high voltage, in response to a fractional portion of the control word. The controller modifies the states of the switches of the tuning banks in a complementary fashion, based upon comparisons between the fractional portion of the control word and a series of thresholds.

Abstract: Motion activity data is collected from at least one sensor. An initial motion activity classifier function is applied to the motion activity data to produce an initial motion activity posteriorgram. Pre-processing and segmenting the motion activity data into windows produces segmented motion activity data from which sensor specific features are extracted. An updated motion activity classifier function is generated from the extracted sensor specific features. Subsequent motion activity data is also collected from the at least one sensor, and the updated motion activity classifier function is applied to the subsequent motion activity data to produce an updated motion activity posteriorgram.

Abstract: A multiple-input analog-to-digital converter device includes analog-to-digital converter circuits arranged between input nodes and output nodes. The analog-to-digital converter circuits operate over respective conversion times to provide simultaneous conversion of the analog input signals into respective conversion time signals. A time-to-digital converter circuit includes timer circuitry common to the plurality of analog-to-digital converter circuits. The timer circuitry cooperates with the analog-to-digital converter circuits to convert the conversion time signals into digital output signals at the output nodes.

Abstract: This application discloses systems, devices, and methods for indoor navigation and tracking with a mesh network. In one aspect, a navigation device includes a receiver configured to receive a locational signal from a node network. The locational signal identifies a respective node of the node network, and the node network is distributed throughout a physical space. The navigation device includes a memory storing a program and a processor in communication with the receiver and configured to execute the program to calculate a position of the navigation device from the identity of the respective node, determine a routing instruction from the position of the navigation device to a destination based on the position of the navigation device and a known mapping of the node network in the physical space, and update the position of the navigation device and the routing instruction as the navigation device moves through the physical space.

Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.

Abstract: A continuous time digital signal processing (CT DSP) token includes a first signal indicating a change has occurred and a second signal indicating a direction of the change. An amplitude generation circuit operates to generate an amplitude value x in response to the token. A power estimation circuit processes the amplitude value x to generate a digital power signal in accordance with the formula: x2±2x+1.

Abstract: A vertical photodiode includes an active area. The contacting pads for the diode terminals are laterally shifted away from the active area so as to not be located above or below the active area. The active area is formed in a layer of semiconductor material by a lower portion of a germanium area that is intrinsic and an upper portion of the germanium area that is doped with a first conductivity type. The vertical photodiode is optically coupled to a waveguide formed in the layer of semiconductor material.

Abstract: A control circuit for a driving an electronic switch associated with a switching node of a flyback converter includes a comparison circuit configured to generate a switch-off signal by comparing a current measurement signal with a current measurement threshold signal. A valley detection circuit is configured to generate a trigger in a trigger signal when a valley signal indicates a valley in a voltage at the switching node of the flyback converter, and a blanking circuit is configured to generate a switch-on signal by combining the trigger signal with a timer signal provide by a timer circuit. The timer signal indicates whether a blanking time-interval has elapsed.

Abstract: An analysis method of a device through a MEMS sensor is provided in which the MEMS sensor includes a control unit and a sensing assembly coupled to the device. The analysis method includes acquiring, through the sensing assembly, first data indicative of an operative state of the device. Testing is performed for the presence of a first abnormal operating condition of the device. If the first abnormal operating condition of the device is confirmed, a self-test of the sensing assembly is performed to generate a quantity indicative of an operative state of the sensing assembly. The self-test includes acquiring, through the sensing assembly, second data indicative of the operative state of the sensing assembly, generating a signature according to the second data, and processing the signature through deep learning techniques to generate said quantity.

Abstract: A power MOS stage includes a first power MOS device and a second power MOS devices connected in parallel between a first node and a second node, the first power MOS device having a first voltage rating and the second power MOS device having a second voltage rating that is lower than the first voltage rating. A driver circuit is configured to drive control nodes of the first and second power MOS devices in a sequential manner when actuating the power MOS stage by actuating the first power MOS device before actuating the second power MOS device. The control nodes of the first and second power MOS devices are further driven in a sequential manner when deactuating the power MOS stage by deactuating the second power MOS device before deactuating the first power MOS device.

Abstract: A time measurement includes a multiphase clock generator and a phase sampling circuit. The multiphase clock generator generates a sequence of a given number n of phase shifted clock phases, wherein one of the phase shifted clock phases represents a reference clock signal. The phase sampling circuit is configured to generate a phase value indicative of a number of fractions 1/n of the clock period of the clock phases elapsed between an edge of the reference clock signal and an instant when an asynchronous event signal is set. The phase sampling circuit includes first through fourth sub-circuits, which respectively generate or determine first through fourth control signals.

Abstract: A quantizer generates a thermometer coded signal from an analog voltage signal. Data weighted averaging (DWA) of the thermometer coded signal is accomplished by controlling the operation of a crossbar switch controlled by a switch control signal to generate an output DWA signal. The output DWA signal is latched to generate a latched output DWA signal which is processed along with bits of the thermometer coded input signal in feedback loop to generate the switch control signal. The latching of the output DWA signal is performed in an input register of a digital-to-analog converter which operates to convert the latched output DWA signal to a feedback analog voltage from which the analog voltage signal is generated. The switch control signal specifies a bit location for a beginning logic transition of the output DWA signal cycle based on detection of an ending logic transition of the latched DWA signal.

Abstract: A recursive digital sinusoid generator generates recursive values used in the production of a digital sinusoid output. The recursive values are generated at a first frequency. A sinusoid value generator generates replacement values at a second frequency, wherein the second frequency is less than the first frequency. The generated recursive values are periodically replaced with the generated replacement values without interrupting production of the digital sinusoid output at the first frequency. This periodic replacement effectively corrects for a finite precision error which accumulates in the recursive values over time.

Abstract: An electronic device includes at least one photodetection block, where the at least one photodetection block includes a plurality of macropixels arranged into an array. Each macropixel includes an array of photodiodes, with logic circuitry coupled to outputs of the array of photodiodes and configured to generate a detection signal as a function of logically combining the outputs of the array of photodiodes. Each macropixel has associated therewith selection circuitry configured to selectively pass the detection signal to output combining logic or to output combining logic of at least one neighboring macropixel of the plurality thereof. The output combining logic has inputs coupled to the selection circuitry and to the selection circuitry of the at least one neighboring macropixel, and is configured to generate an output detection signal as a function of logically combining outputs of the selection circuitry and the selection circuitry of the at least one neighboring macropixel.

Abstract: A global shutter pixel includes a first transistor and a first switch series-connected between a first node of application of a potential and an internal node of the pixel. A control terminal of the first transistor is coupled to a floating diffusion node of the pixel. At least two assemblies are coupled to the internal node, where each assembly is formed of a capacitor series-connected with a second switch coupling the capacitor to the internal node. A second transistor has a control terminal connected to the internal node and a first conduction terminal coupled to an output node of the pixel. The pixel operation is controlled to store an initialization voltage from the floating diffusion on one of the capacitors and a pixel integration voltage from the floating diffusion on another of the capacitors.

Abstract: A hardware secure element includes a processing unit and a receiver circuit configured to receive data comprising a command field and a parameter field adapted to contain a plurality of parameters. The hardware secure element also includes at least one hardware parameter check module configured to receive at an input a parameter to be processed selected from the plurality of parameters, and to process the parameter to be processed to verify whether the parameter has given characteristics. The hardware parameter check module has associated one or more look-up tables configured to receive at an input the command field and a parameter index identifying the parameter to be processed by the hardware parameter check module, and to determine for the command field and the parameter index a configuration data element.

Abstract: An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs.

Abstract: A voltage controlled oscillator (VCO) circuit generates an output signal having a frequency which is dependent on a control voltage. A current is generated which is itself dependent on an amplitude of the VCO circuit. The generated current accordingly tracks, to an extent, the temperature behavior of the oscillator within the VCO circuit. The oscillator is driven by the sum of the generated current and a control current dependent on the control voltage. The control voltage may, for example, be generated by a phase lock loop (PLL).

Abstract: An in-memory compute (IMC) device includes a compute array having a first plurality of cells. The compute array is arranged as a plurality of rows of cells intersecting a plurality of columns of cells. Each cell of the first plurality of cells is identifiable by its corresponding row and column. The IMC device also includes a plurality of computation engines and a plurality of bias engines. Each computation engine is respectively formed in a different one of a second plurality of cells, wherein the second plurality of cells is formed from cells of the first plurality. Each computation engine is formed at a respective row and column intersection. Each bias engine of the plurality of bias engines is arranged to computationally combine an output from at least one of the plurality of computation engines with a respective bias value.