Abstract: A converter circuit includes a half-bridge power circuit with a first and a second switch between an input node and a current node and between the current node ground, respectively. An inductor is coupled between the current node and an output node. Logic control circuitry is configured to switch the first and second switches to a current recirculation state and to a current charge state. The logic circuitry is configured to switch the switches from the current recirculation state to the current charge state as a result of a voltage indicator signal from an output voltage comparator being asserted while starting an on-time counter signal having an expiration value, and from the current charge state to the current recirculation state as a result of the on-time counter signal having reached its expiration value in combination with the voltage indicator signal from the voltage comparator being de-asserted.

Abstract: A method for presence detection in an environment to be monitored, includes generating an electric charge signal in a condition of absence of presence in the environment to be monitored. An electric charge signal is generated in an operating condition in which a person may be present in the environment. The two generated signals are processed and the results of the processing are compared. Processing the signals includes representing in a biaxial reference system the value of the charge signal considered and its derivative with respect to time, and identifying a plurality of points in the reference system. By comparing the position of the points acquired during the possible human presence with those of the base shape, a variation indicating the actual human presence may be detected. In this case an alarm signal is generated.

Abstract: An ambient temperature sensor is provided that may be coupled to a PCB. The ambient temperature sensor includes a package including a first cap and an insulating structure. The insulating structure is formed of thermally insulating material, and the first cap and the insulating structure delimit a first cavity. A semiconductor device is included and generates an electrical signal indicative of a temperature. The semiconductor device is fixed on top of the insulating structure and arranged within the first cavity. The package may be coupled to the PCB so that the insulating structure is interposed between the semiconductor device and the PCB. The insulating structure delimits a second cavity, which extends below the semiconductor device and is open laterally.

Abstract: A variable duty cycle switching signal at a switching frequency is applied to a switching current regulation circuit arrangement energizing a current storage circuit assembly. Switching of the variable duty cycle switching signal is controlled by an upper and a lower threshold current level. The upper and lower threshold current levels vary with time following an average current value time variation. Additionally, frequency jitter is introduced in the variable duty cycle switching signal by: defining at least a frequency modulation window around a limit frequency identifying a limit value for an acceptable EMI; and applying an amplitude modulation of the upper and/or lower threshold current levels varying with time, wherein the amplitude modulation is applied in a time interval between times when the switching frequency enters and exit the frequency window.

Abstract: An integrated circuit includes a first domain supplied with power at a first supply voltage. A first transistor comprising in the first domain includes a first gate region and a first gate dielectric region. A second domain is supply with power at a second supply voltage and includes a second transistor having a second gate region and a second gate dielectric region, the second gate region being biased at a voltage that is higher than the first supply voltage. The first and second gate dielectric regions have the same composition, wherein that composition configures the first transistor in a permanently turned off condition in response to a gate bias voltage lower than or equal to the first supply voltage. The second transistor is a floating gate memory cell transistor, with the second gate dielectric region located between the floating and control gates.

Abstract: A power transmitter includes: a first switch coupled between a first node and a reference voltage node; a second switch configured to be coupled between a power supply and the first node; a coil and a capacitor coupled in series between the first node and the reference voltage node; a first sample-and-hold (S&H) circuit having an input coupled to the first node; and a timing control circuit configured to generate a first control signal, a second control signal, and a third control signal that have a same frequency, where the first control signal is configured to turn ON and OFF the first switch alternately, the second control signal is configured to turn ON and OFF the second switch alternately, and where the third control signal determines a sampling time of the first S&H circuit and has a first pre-determined delay from a first edge of the first control signal.

Abstract: A sub-bandgap reference voltage generator includes a reference current generator generating a reference current (proportional to absolute temperature), a voltage generator generating an input voltage (proportional to absolute temperature) from the reference current, and a differential amplifier. The differential amplifier is biased by the reference current and has an input receiving the input voltage and a resistor generating a voltage proportional to absolute temperature summed with the input voltage to produce a temperature insensitive output reference voltage. The reference current generator may generate the reference current as a function of a difference between bias voltages of first and second transistors.

Abstract: An integrated circuit includes: a primary supply stage including a primary supply node, the primary supply stage being configured to deliver a primary supply voltage to the primary supply node; a secondary supply stage including a secondary supply node, the secondary supply stage being configured to deliver a secondary supply voltage to the secondary supply node; a supply-switching circuit; a pre-charging circuit controllably coupled to the secondary supply node via the supply-switching circuit; and a volatile memory circuit controllably coupled to the primary supply node and the secondary supply node via the supply-switching circuit, wherein the switching circuit is configured to connect a supply of the volatile memory circuit either to the primary supply node in a primary supply mode, or to the secondary supply node in a secondary supply mode.

Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.

Abstract: A micromechanical mirror structure includes a mirror element designed to reflect an incident light radiation and a protective structure arranged over the mirror element to provide mechanical protection for the mirror element and to increase the reflectivity of the mirror element with respect to the incident light radiation. The protective structure has a first protective layer and a second protective layer which are stacked on the mirror element. The second protective layer is arranged on the first protective layer and the first protective layer is arranged on the mirror element. The layers include a respective dielectric material and having respective refractive indexes that jointly increase the reflectivity of the mirror element in a range of wavelengths of interest.

Abstract: A drive circuit for airbag systems, for instance includes a differential transconductance amplifier having a first input node, a second input node, an output node coupled to the second input node via a feedback line; a transistor coupled between a drive node and a supply node configured to be coupled to a power supply source; a control node coupled to the control electrode of the transistor and the output node; a Zener diode arrangement having cathode and anode terminals coupled to the supply node and the first input node, respectively; a pull-up component arranged in parallel with the Zener diode arrangement; and an enable switch coupled to the first input node and referred to ground and switchable between a conductive state and a non-conductive state with the differential transconductance amplifier providing controlled current discharging/charging of the control node to make the transistor conductive/non-conductive, respectively.

Abstract: A microelectromechanical transducer includes a semiconductor body having first and second surfaces opposite to one another. A plurality of trenches extend in the semiconductor body from the first surface towards the second surface, including a first pair of trenches having a respective main direction of extension along a first axis, and a second pair of trenches having a respective main direction of extension along a second axis orthogonal to the first axis. A first piezoresistive sensor and a second piezoresistive sensor extend at the first surface of the semiconductor body respectively arranged between the first and second pair of trenches. The first piezoresistive sensor, the second piezoresistive sensor and the plurality of trenches form an active region. A first structural body is mechanically coupled to the first surface of the semiconductor body to form a first sealed cavity which encloses the active region.

Abstract: Requests are received by a routing circuit. A plurality of first round-robin arbitration circuits are coupled to the routing circuit. There are as many first round-robin arbitration circuits as there are possible priority levels for the requests. The routing circuit operates to transmit each received request to a number of first round-robin arbitration circuits determined according to the priority level of the request. A second round-robin arbitration circuit has inputs respectively connected to the outputs of the first round-robin arbitration circuits.

Abstract: A capacitive element includes a trench extending vertically into a well from a first side. The trench is filled with a conductive central section clad with an insulating cladding. The capacitive element further includes a first conductive layer covering a first insulating layer that is located on the first side and a second conductive layer covering a second insulating layer that is located on the first conductive layer. The conductive central section and the first conductive layer are electrically connected to form a first electrode of the capacitive element. The second conductive layer and the well are electrically connected to form a second electrode of the capacitive element. The insulating cladding, the first insulating layer and the second insulating layer form a dielectric region of the capacitive element.

Abstract: A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.

Abstract: An electronic chip includes at least a first array of first elementary cells and a second array of second elementary cells. The first and second elementary cells form two types of phase change memory having a storage element formed by a volume of phase change material having either a crystalline state or an amorphous state depending on the bit stored. Each first elementary cell includes a volume of a first phase change material, and each second elementary cell includes a volume of a second phase change material that is different from the first material. Each elementary cell includes a heating connector configured for the passage of a heating current adapted to cause a phase change of the volume of phase change material of the elementary cell.

Abstract: A microcircuit card includes a first (general purpose) microcontroller, a second (secure processing) microcontroller, at least one module of communication with the outside of the card, and a biometric sensor. Any communication with the outside of the card transits through the first microcontroller. Any communication between the sensor and the second microcontroller transits through the first microcontroller. Furthermore, the second microcontroller is not involved in any communication to the outside of the card.

Abstract: Disclosed herein is a method, including attaching a semiconductor chip to a chip mounting portion on at least one leadframe portion, and attaching a passive component on a passive component mounting portion of the at least one leadframe portion. The method further includes forming a laser direct structuring (LDS) activatable molding material over the semiconductor chip, passive component, and the at least one leadframe portion. Desired patterns of structured areas are formed within the LDS activatable molding material by activating the LDS activatable molding material. The desired patterns of structured areas are metallized to form conductive areas within the LDS activatable molding material to thereby form electrical connection between the semiconductor chip and the passive component. A passivation layer is formed on the LDS activatable molding material.

Abstract: A sense amplifier and a method for accessing a memory device are disclosed. In an embodiment a sense amplifier for a memory device includes a first input node selectively coupled to a first memory cell through a first local bitline and a first main bitline, a second input node selectively coupled through a second local bitline and a second main bitline to a second memory cell or to a reference generator configured to generate a reference current, a first current generator controllable so as to inject a first variable current into the first input node, a second current generator controllable so as to inject a second variable current into the second input node, a first branch coupled to the first input node and comprising a first switch circuit, a first sense transistor and a first forcing transistor and a second branch coupled to the second input node and including a second switch circuit, a second sense transistor and a second forcing transistor.

Abstract: An optical sensor includes a light-emitter device formed in a body of solid-state material with wide band gap having a surface. The light-emitter device includes a cathode region having a first conductivity type and an anode region having a second conductivity type. The anode region extends into the cathode region from the surface of the body. The anode region and the cathode region define a junction, and the cathode region has, near the junction, a peak defectiveness area accommodating vacancies in the crystalline structure due to non-bound ions or atoms of Group IV or VIII of the periodic table, which may include carbon, silicon, helium, argon, or neon. The vacancies are at a higher concentration with respect to mean values of vacancies in the anode region and in the cathode region. For example, the vacancies in the peak defectiveness area have a concentration of at least 1013 atoms/cm?3.