Patents Assigned to STMicroelectronics
  • ELECTRONIC DEVICE INCLUDING AN ELECTRONIC CHIP AND AN ANTENNA
    Publication number: 20200152586
    Abstract: A carrier substrate includes an integrated network of electrical connections extending from a front face to a back face. An electromagnetic antenna is located on the front face of the carrier substrate and is connected to the integrated network. An electronic chip is mounted over the front face of the carrier substrate, and connected to the integrated network, at a location offset from the antenna. An encapsulation layer encapsulates the electronic chip. The encapsulation layer includes, recessed with respect to its front surface, a local void that is located laterally away from the electronic chip and extends over a zone that at least partly covers the location of the electromagnetic antenna.
    Type: Application
    Filed: November 11, 2019
    Publication date: May 14, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Storage in a non-volatile memory
    Patent number: 10649916
    Abstract: A non-volatile memory is organized in pages and has a word writing granularity of one or more bytes and a block erasing granularity of one or more pages. Logical addresses are scrambling into physical addresses used to perform operations in the non-volatile memory. The scrambling includes scrambling logical data addresses based on a page structure of the non-volatile memory and scrambling logical code addresses based on a word structure of the non-volatile memory.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: May 12, 2020
    Assignees: STMicroelectronics (Rousset) SAS, Proton World International N.V.
    Inventors: Michael Peeters, Fabrice Marinet, Jean-Louis Modave
  • Micro-electro-mechanical device with a movable structure, in particular micromirror, and manufacturing process thereof
    Patent number: 10649202
    Abstract: A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to the fixed part. The second wafer is bonded to the first wafer through projections extending from the first wafer. The projections may, for example, be formed by selectively removing part of a semiconductor layer. A composite wafer formed by the first and second wafers is cut to form many MEMS devices.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Sonia Costantini, Marta Carminati, Daniela Angela Luisa Gatti, Laura Maria Castoldi, Roberto Carminati
  • Optical image stabilization actuator driver power distribution control
    Patent number: 10649228
    Abstract: Various embodiments provide an optical image stabilization circuit including a drive circuit having a power waveform generator and a power waveform conversion circuit. The power waveform generator generates a power waveform. The power waveform conversion circuit converts the power waveform to a power drive signal. An actuator is then driven by the power drive signal to move a lens accordingly and compensate for any movements and vibrations of a housing of the lens.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics, Inc.
    Inventors: Mark A. Lysinger, Pavan Nallamothu, Chih-Hung Tai, James L. Worley
  • Integrated circuit with decoupling capacitor in a structure of the triple well type
    Patent number: 10651184
    Abstract: A well of a first conductivity type is insulated from a substrate of the same first conductivity type by a structure of a triple well type. The structure includes a trench having an electrically conductive central part enclosed in an insulating sheath. The trench supports a first electrode of a decoupling capacitor, with a second electrode provided by the well.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Abderrezak Marzaki
  • Electronic package with a local slot forming an air-vent
    Patent number: 10651101
    Abstract: A support plate has a front face with an electronic chip mounted on the front face. A cover for encapsulating the electronic chip includes a front wall extending in front of the electronic chip and a peripheral wall having an end edge fixed on a peripheral area of the support plate. The support plate and the encapsulating cover define a chamber in which the electronic chip is located. A local slot is arranged to extend between the peripheral wall of the encapsulating cover and the support plate. The local slot has an exterior opening and an interior opening leading into said chamber.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Marika Sorrieul
  • Microfluidic system with single drive signal for multiple nozzles
    Patent number: 10646892
    Abstract: The present disclosure is directed to a microfluidic die that includes a plurality of heaters above a substrate, a plurality of chambers and nozzles above the heaters, a plurality of first contacts coupled to the heaters, and a plurality of second contacts coupled to the heaters. The plurality of second contacts are coupled to each other and coupled to ground. The die includes a plurality of contact pads, a first signal line coupled to the plurality of second contacts and to a first one of the plurality of contact pads, and a plurality of second signal lines, each second signal line being coupled to one of the plurality of first contacts, groups of the second signal lines being coupled together to drive a group of the plurality of heaters with a single signal, each group of the second signal lines being coupled to a remaining one of the plurality of contact pads.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: May 12, 2020
    Assignees: STMicroelectronics, Inc., STMICROELECTRONICS S.R.L., STMicroelectronics International N.V.
    Inventors: Simon Dodd, Joe Scheffelin, Dave Hunt, Matt Giere, Dana Gruenbacher, Faiz Sherman
  • Method of operating radio-frequency powered devices, corresponding circuit and device
    Patent number: 10651691
    Abstract: Radiofrequency energy that is captured by a radiofrequency power harvester is stored in a storage capacitance. One or more user circuits are supplied with energy stored in the storage capacitance. The harvester operates in alternated charge and burst phases with captured radiofrequency energy stored in the storage capacitance in the charge phases and supplied to the user circuits in the burst phases to perform user circuit tasks. In response to detection of completion of the user circuit tasks in a burst phase, the harvester causes operation to shift to the next charge phase.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Larosa, Giulio Zoppi
  • Detection of a time condition relative to a two-wire bus when writing into an EEPROM on a I2C bus
    Patent number: 10649926
    Abstract: A value representative of a duration of the low state of a synchronization signal on a bus is measured and then compared with a threshold value. The threshold value is stored in a memory and the measured value represents, in a first comparison, a longest duration of the low states of the synchronization signal.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Francois Tailliet
  • Device for determining the movement of a rotary element, particularly for readings of water and/or gas meters
    Patent number: 10648836
    Abstract: A rotary element is equipped with a pattern representing a reflected binary code on at least three bits. A detection circuit is configured to sense the pattern and deliver an incident signal encoded in reflected binary code on at least three bits. The incident signal is converted by a transcoding circuit into an intermediate signal encoded in reflected binary code on two bits. A decoding stage decodes the intermediate signal and outputs at least one clock signal representing the amount of rotation of the rotary element and a direction signal representing the direction of rotation. A processing circuit determines the movement of the rotary element, and has at least one general purpose timer designed to receive the at least one clock signal and direction signal.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Vincent Onde
  • Optical image stabilization actuator driver power distribution control
    Patent number: 10649229
    Abstract: Various embodiments provide an optical image stabilization circuit including a drive circuit having a power waveform generator and a power waveform conversion circuit. The power waveform generator generates a power waveform. The power waveform conversion circuit converts the power waveform to a power drive signal. An actuator is then driven by the power drive signal to move a lens accordingly and compensate for any movements and vibrations of a housing of the lens.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics, Inc.
    Inventors: Mark A. Lysinger, Chih-Hung Tai, James L. Worley, Pavan Nallamothu
  • Demodulator for in-phase and quadrature modulated signals, MEMS gyroscope including the same and demodulation method
    Patent number: 10648813
    Abstract: A demodulator demodulates an in-phase component of an input signal which is in-phase and quadrature modulated. The demodulator includes a register storing a phase calibration value having an integer part and a fractional part. A noise-shaping modulator generates a succession of quantized values of integer type, the quantized values having a mean equal to the phase calibration value. A generating stage generates a demodulating signal phase locked with the input signal, the demodulating signal having a phase which depends linearly on the quantized values. A demodulating stage demodulates the input signal by means of the demodulating signal.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: May 12, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Mecchia, Matteo Quartiroli, Paolo Pesenti
  • Electronic device with die being sunk in substrate
    Patent number: 10643940
    Abstract: A method for forming an electronic device includes embedding an integrated circuit die in a package including substrate of thermally conductive material with front and back surfaces and a through-hole. The die is sunk in the through-hole. A first insulating material layer covers the die front surface and the package front surface with first windows for accessing die terminals. Package terminals and package track are arranged on the first insulating layer. A second insulating material layer covers the first insulating layer and the package tracks with second windows for accessing the package terminals.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fulvio Vittorio Fontana, Giovanni Graziosi
  • Crosstalk suppression in wireless testing of semiconductor devices
    Patent number: 10641821
    Abstract: An integrated circuit is fabricated on a semiconductor material die and adapted to be at least partly tested wirelessly. Circuitry for setting a selected radio communication frequency to be used for the wireless test of the integrated circuit is integrated on the semiconductor material die.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Indexing of electronic devices with multiple weight markers
    Patent number: 10643950
    Abstract: A die has a positional location in a wafer defined by first and second coordinates, the first and second coordinates identifying a respective horizontal and vertical location where the die was formed. An index formed on the die has a first comb structure of a first contiguous arrangement of first dots, and a second comb structure of a second contiguous arrangement of second dots. A first marker at a selected one of the first dots indicates a first digit of the first coordinate, and a first additional marker at a selected one of the first dots indicates a second digit of the first coordinate. A second marker at a selected one of the second dots indicates a first digit of the second coordinate, and a second additional marker at a selected one of the second dots indicates a second digit of the second coordinate.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Emanuele Brenna, Antonio Di Franco
  • Method for fabricating laterally insulated integrated circuit chips
    Patent number: 10643856
    Abstract: Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit integrated circuit chips to be formed. A depth of the peripheral trenches is greater than or equal to a desired final thickness of the integrated circuit chips. The peripheral trenches are formed by a process which repeats successive steps of a) ion etching using a sulfur hexafluoride plasma, and b) passivating using an octafluorocyclobutane plasma. Upon completion of the step of forming the peripheral trenches, lateral walls of the peripheral trenches are covered by an insulating layer of a polyfluoroethene. A thinning step is performed on the lower surface of the wafer until a bottom of the peripheral trenches is reached. The insulating layer is not removed.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Mathieu Rouviere, Mohamed Boufnichel, Eric Laconde
  • Level shifting circuit with conditional body biasing of transistors
    Patent number: 10644703
    Abstract: A level shifting circuit receives a first input signal and complement of the first input signal as inputs and generates a level shifted first output signal and complement of the first output signal as outputs. The level shifting circuit includes a number of transistors that support body biasing. One set of body bias signals applied to certain ones of those transistors is generated as a function of the logical combination of the first input signal and the first output signal. Another set of body bias signals applied to certain other ones of those transistors is generated as a function of the logical combination of the complement of the first input signal and the complement of the first output signal. The conditional body bias applied to the transistors of the level shifting circuit makes the circuit operational for level shift at very low supply voltage levels.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics International N.V.
    Inventor: Ravinder Kumar
  • Method for forming an electrical connection between an electronic chip and a carrier substrate and electronic device
    Patent number: 10643970
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez
  • SINGLE-ENDED PHASE-CHANGE MEMORY DEVICE AND READING METHOD
    Publication number: 20200135273
    Abstract: A phase-change memory device, comprising: a memory array of PCM cells, a variable current generator, and a sense amplifier. The current generator comprises a reference array of PCM cells programmed in SET resistance state. The phase-change memory device further comprises a decoder for addressing each cell of the reference array so that a respective plurality of SET current signals is generated through the plurality of reference cells; and a controller configured to receive at input said SET current signals, select a number of SET current signals having the lowest current values among the plurality of SET current signals, calculate a mean value of said lowest current values, and adjust the reference current to be lower than said mean value.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 30, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco PASOTTI, Riccardo ZURLA, Alessandro CABRINI, Guido TORELLI, Flavio Giovanni VOLPE
  • SCHMITT TRIGGER CIRCUIT WITH INDEPENDENT CONTROL OVER HIGH AND LOW TRIP POINTS USING A SPLIT ARCHITECTURE
    Publication number: 20200136595
    Abstract: A Schmitt trigger circuit includes separate circuits for monitoring change in input signal voltage level in comparison to a low threshold to generate a change in logic state of a first control signal in response to a decrease in a voltage level of the input signal and in comparison to a high threshold to generate a change in logic state of a second control signal in response to an increase in the voltage level of the input signal. A first transistor has a source-drain path connected between a supply node and an output node, with a control terminal of the first transistor configured to receive the second control signal. A second transistor has a source-drain path connected between the output node and a ground node, with a control terminal of the second transistor configured to receive said first control signal.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 30, 2020
    Applicant: STMicroelectronics International N.V.
    Inventor: Manish GARG