Abstract: A receiver or transmitter circuit includes a signal propagation path between a radio-frequency (RF) signal node and a baseband processing circuit. Variable gain circuitry is configured to vary a gain applied to a signal propagating between the RF signal node and the baseband processing circuit. The variable gain circuitry varies the gain via first, coarse steps as well as via second, fine steps. This facilitates fine matching of the gains experienced by signals propagating over the in-phase and the quadrature branches in the transmitter and/or receiver circuit.

Abstract: A system-on-a-chip includes a first digital domain and a second digital domain. An interface circuit includes a level-shifting circuit for converting a signal between the first digital domain and the second digital domain. The first digital domain includes a control circuit configured to generate a control signal for transmission to the second digital domain. The control signal includes a pulse having a nominal duration adapted to the level-shifting circuit. At the input of the level-shifting circuit, the interface circuit includes, in the first domain, a conditional pulse-stretching circuit that lengthens a duration of the pulse of the control signal to at least the nominal duration when a duration of the pulse of the control signal is shorter than the nominal duration and non-zero.

Abstract: A microelectromechanical gyroscope includes: the support structure; a sensing mass, coupled to the support structure with degrees of freedom along a driving direction and a sensing direction perpendicular to each other; and a calibration structure facing the sensing mass and separated from the sensing mass by a gap having an average width, the calibration structure being movable with respect to the sensing mass so that displacements of the calibration structure cause variations in the average width of the gap. A calibration actuator controls a relative position of the calibration structure with respect to the sensing mass and the average width of the gap.

Abstract: The present disclosure relates to an electronic circuit comprising a semiconductor substrate, radiofrequency switches corresponding to MOS transistors comprising doped semiconductor regions in the substrate, at least two metallization levels covering the substrate, each metallization level comprising a stack of insulating layers, conductive pillars topped by metallic tracks, at least two connection elements each connecting one of the doped semiconductor regions and formed by conductive pillars and conductive tracks of each metallization level. The electronic circuit further comprises, between the two connection elements, a trench crossing completely the stack of insulating layers of one metallization level and further crossing partially the stack of insulating layers of the metallization level the closest to the substrate, and a heat dissipation device adapted for dissipating heat out of the trench.

Abstract: A low power crystal oscillator circuit has a high power part and a low power part. Crystal oscillation is initialized using the high power part. An automatic amplitude control circuit includes a current subtractor that decreases current in the high power part as an amplitude of the crystal oscillation increases. A current limiting circuit may limit current in the low power part in order to further reduce power consumption by the low power crystal oscillator circuit. Additionally, an automatic amplitude detection circuit may turn off the high power part after the amplitude of the crystal oscillation reaches a predetermined level in order to further reduce power consumption of the low power crystal oscillator circuit, and may turn back on the high power part after the amplitude of the crystal oscillation reaches a second predetermined level in order to maintain the crystal oscillation.

Abstract: An optical package includes a substrate made of a first material having an upper surface and a lower surface. The substrate further includes at least one cavity opening onto an upper surface of the substrate. Electrical connection vias extend through the substrate. An electronic integrated circuit chip is mounted on the upper surface of the substrate in a position so as to cover the at least one cavity. The electronic integrated circuit chip includes an integrated optical sensor. Each cavity is filled with a second material having a thermal conductivity greater than the thermal conductivity of the first material. The electrical connection vias are arranged on either side of each cavity and between two cavities.

Abstract: The present description relates to a method of manufacturing an electronic device comprising a phase-change memory cell, the method comprising: the forming of a first layer made of a resistive material; the forming of a stack of layers on the first layer, the stack comprising at least one second layer made of a phase-change material; the etching of the stack, said etching stopping when the first layer is reached around the location of the memory cell; the forming of a spacer on the side walls of the stack; then an etching of the first layer, so that the stack rests on a central portion of the first layer and that the spacer rests on a peripheral portion of the first layer.

Abstract: The present disclosure is directed to cough detection for electronic devices, such as wireless headphones. The cough detection utilizes inertial sensors to perform both head movement detection and vocal activity detection. The dual identification of head movement and vocal activity allows improved detection accuracy, and minimal false detections caused by environmental noise.

Abstract: A method, comprising: coupling a set of sensing circuits to a set of electronic devices; sensing, via the sensing circuits, a set of sensing signals indicative of an operating state of the set of electronic devices; applying logic signal processing to the set of sensing signals via coupling a set of signal processing channels to the set of sensing circuits and providing a set of logically combined sensing signals as a result, wherein the logically combined sensing signals are indicative of whether the operating state of the electronic devices in the set of electronic devices is an expected operating state or an unexpected operating state; coupling the set of logically combined sensing signals to a set of input channels of a fault collection and control unit, FCCU; storing at least one data structure comprising data related to the way in which the set of input channels of the FCCU are coupled to the set of sensing circuits via the set of signal processing channels.

Abstract: A MOSFET transistor with a semiconductor body including a drain region of a first conductivity type, delimited by a front surface, and at least one cell including: a pair of gate structures laterally offset parallel to a first axis and each including a respective gate dielectric region, arranged on the front surface, and a respective gate conductive region, arranged on the corresponding gate dielectric region; a body structure of a second conductivity type, which includes a body region, which extends inside the drain region starting from the front surface and contacts portions of the gate dielectric regions, and a strengthening region, which extends below the body region; and a pair of source regions of the first conductivity type, which extend inside the body region starting from the front surface.

Abstract: A process for forming a high electron mobility transistor (HEMT) includes forming a semiconductor heterostructure including a channel layer of the HEMT, forming a gate layer of GaN on the channel layer, and patterning the gate layer to form a first gate finger, a second gate finger, and a gate arc connecting the first gate finger and the second gate finger. The process includes forming an isolation mask covering an active region of the semiconductor heterostructure and the gate arc and performing an ion bombardment process on an inactive region of the semiconductor heterostructure exposed by the isolation mask.

Abstract: An electronic vehicle includes A DC link capacitor and a traction inverter coupled to the DC link capacitor. The traction inverter includes a first half bridge circuit, a second half bridge circuit, and a third half bridge circuit each coupled between terminals of the DC link capacitor. The traction inverter includes a driver circuit coupled to the traction inverter configured to drive the first, second, and third half bridge circuits to generate an AC voltage in a standard operating mode. The driver circuit is configured to discharge the DC link capacitor responsive to a discharge command by toggling the first half bridge between an open condition and a closed condition while holding the second half bridge circuit and the third half bridge circuit in the open condition.

Abstract: An electronic digital system includes a digital core and a Serializer Deserializer module. A FIFO device of the core reads and writes on a set of buses coupled to said Serializer Deserializer module. The Serializer Deserializer module transmits data read from the FIFO architecture device on a set of buses as a corresponding serial signals transmitted by transmitters. The serial signals and corresponding transmitters are logically grouped. The transmitters include PLL circuits generating PLL clocks, using as reference a cluster transmitter reference clock common, to a respective cluster of transmitters controlling a frequency of serialization operation and low frequency clocks obtained by the PLL clocks according to one or more groups corresponding to group of buses.

Abstract: An electronic device includes a carrier substrate having a front face and an electronic chip mounted on the front face. An encapsulation cover is mounted above the front face and bounds a chamber in which the chip is situated. A front opening is provided in front of an optical component of the chip. An optical element, designed to allow light to pass, is mounted on the cover in a position which covers the front opening of the cover. The optical element includes a central region designed to deviate light and a positioning pattern that is visible through the front opening. An additional mask is mounted on the encapsulation cover in a position which extends in front of the optical element. A local opening of the additional mask is situated in front of the optical component.

Abstract: A recognition system for recognition of a gesture of bringing an electronic device, of a mobile or wearable type, to a user's ear, designed to be integrated in the electronic device and having: a movement sensor, configured to provide a movement signal indicative of the movement of the electronic device; an electrostatic charge variation sensor, configured to provide a charge variation signal associated with the movement; a processing module, operatively coupled to the movement sensor and to the electrostatic charge variation sensor and configured to perform a joint processing of the movement signal and the charge variation signal for the recognition of the gesture.

Abstract: A system to sanitize a surface includes an emitter. The emitter of the system to sanitize the surface includes: a light source configured to generate light at a sanitizing wavelength; a receiver configured to receive a wireless signal; and a processing circuit for the emitter configured to turn the light source on, turn the light source off, and adjust an intensity of light generated by the light source depending on the wireless signal. The system to sanitize the surface further includes a sensor. The sensor of the system to sanitize the surface includes: a photoelectric transducer configured to convert light at the sanitizing wavelength to a current; and a processing circuit for the sensor powered by the current and in communication with a transmitter to transmit the wireless signal, the processing circuit for the sensor being configured to control emission of the wireless signal depending on a power level supplied by the current.

Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.

Abstract: A bipolar transistor includes a common collector region comprising a buried semiconductor layer and an annular well. A well region is surrounded by the annular well and delimited by the buried semiconductor layer. A first base region and a second base region are formed by the well region and separated from each other by a vertical gate structure. A first emitter region is implanted in the first base region, and a second emitter region is implanted in the second base region. A conductor track electrically couples the first emitter region and the second base region to configure the bipolar transistor as a Darlington-type device. Structures of the bipolar transistor may be fabricated in a co-integration with a non-volatile memory cell.

Abstract: In one aspect, the NFC device includes an antenna that includes first and second terminals, a first resistor on a first current path, and a second resistor on a second current path. The NFC device includes a first switch that switches between open and closed states, where the first switch couples the first current path to the first terminal in the closed state. The NFC device includes a second switch that switches between open and closed states, where the second switch couples the second current path to the second terminal in the closed state. The NFC device includes a controller in communication with the first and second switches and configured to set a Q factor of the antenna to a first or second value by operating the first and second switches.

Abstract: A band-gap circuit for generating a bandgap reference signal includes a first bipolar transistor and a second bipolar transistor of a same type among PNP and NPN types. The first and second bipolar transistors are configured to generate a current varying proportionally with the temperature. A capacitor is connected between a base and an emitter of one or both of the first and second bipolar transistors.