Abstract: In an embodiment method for detecting the phase of an analog signal via a hybrid coupler operating in a power-combiner mode, the hybrid coupler comprises a first input intended to receive the analog signal, a second input intended to receive a reference signal having a reference phase and the same frequency as the analog signal, and two outputs, and is configured to generate, at these two outputs, a first output signal and a second output signal, respectively. The embodiment method comprises measuring peak values of the analog signal, of the reference signal, and of at least one of the first and second output signals, calculating the phase shift between the phase of the analog signal and the reference phase depending on the measured peak values, and determining the phase of the analog signal depending on the calculated phase shift and the reference phase.

Abstract: A system includes a write-data register and a read-data register, each clocked by a clock signal, and a first-in-first-out (FIFO) buffer coupled between the write-data register and the read-data register, the FIFO buffer including latches configured to store data. The system further includes glue logic with first, second, and third logic circuits configured to generate an internal write enable signal, an internal read valid signal, and an internal read enable signal based on an operational mode of the system. The system is configured to be selectively switched between a normal operational mode, where the latches are accessed for reading and writing by a read enable signal and write enable signal based on a read address signal and a write address signal, and a transition testing mode, where the latches are tested using the internal write enable signal, the internal read enable signal, and the internal read valid signal.

Abstract: A microelectromechanical mirror device includes a fixed structure defining a cavity, a tiltable structure elastically suspended above the cavity and carrying a reflecting surface, and having a main extension in a horizontal plane. A first pair of driving arms carry respective piezoelectric material regions that are biased to cause a rotation of the tiltable structure around a first rotation axis parallel to a first horizontal axis of the horizontal plane, and elastically coupled to the tiltable structure. Elastic suspension elements that couple the tiltable structure to the fixed structure at the first rotation axis are stiff with respect to movements out of the horizontal plane and yielding with respect to torsion around the first rotation axis, and further extend between the tiltable structure and the fixed structure. The elastic suspension elements have an asymmetrical arrangement on opposite sides of the tiltable structure along the first rotation axis.

Abstract: Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.

Abstract: An optical device includes a metasurface formed by a metasurface substrate having at least a first metasurface layer made of a first material and an array of pillars extending through the first metasurface layer. The pillars are made of a second material different from the first material. The metasurface has a first face and a second face opposite the first face. A first anti-reflection stack is positioned over the first face of the metasurface. The first anti-reflection stack has a third face and a fourth face opposite the third face and positioned over the first face of the metasurface. A metal trace has a portion which is exposed at the third face of the first anti-reflection stack.

Abstract: Provided is a multi-channel actuator for driving a low-side device. The actuator includes a controller that receives a first command for driving a low-side device and outputs data representative of the first command. The actuator includes a driving circuit having a plurality of detection and driving stages. The plurality of detection and driving stages are operative to be coupled to a plurality of channels of the low-side device, respectively. The driving circuit receives the data representative of the first command and causes a detection and driving stage of the plurality of detection and driving stages to drive a respective channel of the low-side device in accordance with the first command.

Abstract: A non-inverting buck boost DC-DC converter operates with a ripple-hysteretic-current-mode-control including: a first state where control signals close a first high side switch and a second low side switch; a second state where control signals close the first high side switch and a second high side switch; a third state where control signals close a first low side switch and the second high side switch; and a fourth state where control signals close the first low side switch and the second low side switch. Control signal peak voltage and valley voltage are detected. Passing between the first, second, third and fourth states is dependent on peak voltage detection, valley voltage detection, expiration of a variable first time interval following entering the second state, and expiration of a fixed second time interval following entering the third state.

Abstract: At least one package includes a die including a first surface, a second surface opposite to the first surface, and one or more sidewalls transverse to the first surface and the second surface. The one or more sidewalls extend from the first surface to the second surface. A plurality of separate and distinct heat sinks is on the first surface of the die. Each respective separate and distinct heat sink of the plurality of separate and distinct heat sinks is separate and distinct from adjacent separate and distinct heat sinks of the plurality of separate and distinct heat sinks. A plurality of channels separates each respective heat sink of the plurality of heat sinks from adjacent heat sinks of the plurality of heat sinks. In some packages, an elastic thermally conductive material is present within and fills the plurality of channels.

Abstract: To manufacture a bipolar transistor, a first stack of layers including a first layer made of the material of the base of the bipolar transistor is formed between second and third insulating layers. A first cavity is then formed crossing the first stack in such a way as to reach the substrate. The forming of the first cavity includes an etching of no layer covering the first layer other than the third layer. A first portion of the collector of the bipolar transistor and a second portion of the base of the bipolar transistor are then formed in the first cavity.

Abstract: Disclosed is an energy autonomous system including an energy transducer, a first capacitor, a second capacitor having greater capacitance than the first capacitor, and a microprocessor. The microprocessor includes a first terminal electrically coupled to the energy transducer and the first capacitor; a second terminal electrically coupled to the second capacitor; a switch that is in a conductive state in which the switch electrically couples the first terminal and second terminals together, or a nonconductive state in which the switch does not electrically couple first terminal and second terminals together; a voltage detector that detects a voltage at the first terminal; and a processor coupled to the voltage detector and the switch. The processor controls charging of the second capacitor by controlling the switch to be in the conductive state or the nonconductive state based on the voltage at the first terminal detected by the voltage detector.

Abstract: A device includes an assembly of pixels with a first pixel generating an event-based data element and a second pixel generating a light intensity data element. Each first and second pixel includes a portion of a layer that forms a photodiode. A first integrated circuit chip includes a first substrate and a first interconnection network, and a second integrated circuit chip includes a second substrate and a second interconnection network. The first and second integrated circuit chips are attached to each other by the first and second interconnection networks. The layer with the photodiodes is located on a first surface of the second substrate opposite to a second surface of the second substrate having the second interconnection network located thereon.

Abstract: An integrated circuit package includes a support substrate with front connection pads on a front surface thereof and rear connection pads on a rear surface thereof. An integrated circuit device is mounted to the support substrate in flip chip orientation with a front face of the integrated circuit device facing the front surface of the support substrate. A thermally conductive heat spreader is mounted adjacent a rear face of the integrated circuit device. External direct thermal paths thermally couple a top surface of the thermally conductive heat spreader to the rear surface of the support substrate. Each external direct thermal path includes a first portion on and in direct contact with thermally conductive heat spreader, a second portion on and in direct contact with an external side surface of the support substrate and a third portion on and in direct contact with the rear surface of the support substrate.

Abstract: A digital multiplicand is received. An initial digital multiplier including logical 0s and 1s is also received. The initial multiplier is processed including at the beginning of each string with at least one logical 1 of the initial multiplier, by applying, or not, in a selective manner, a Booth encoding on said string so as to output a final multiplier. The multiplicand is then multiplied by the final multiplier to produce an output.

Abstract: Unclonable function circuitry includes a plurality of pairs of phase-change memory cells in a virgin state, and sensing circuitry coupled to the plurality of pairs of phase-change memory cells in the virgin state. The sensing circuitry identifies a subset of the plurality of pairs of phase-change memory cells in the virgin state based on a reliability mask. Signs of differences of effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state are sensed by the sensing circuitry. The sensing circuitry generates a string of bits based on the sensed signs of differences in the effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state. Processing circuitry coupled to the unclonable function circuitry, in operation, executes one or more operations using the generated string of bits.

Abstract: A memory system includes a memory array with first dummy read cells that discharge a dummy bit line, each of the first dummy read cells including a transistor coupled between the dummy bit line and a first ground node that is connected to a ground reference. Second dummy read cells discharge the dummy bit line, each of the dummy read cells including a transistor coupled between the dummy bit line and a second ground node. The dummy read cells cooperate to discharge the dummy bit line in a dummy read operation to provide a self-timing signal. Read circuitry retrieves data from a selected row in the memory array during a read operation, in response to the self-timing signal. Ground generation circuitry connects the second ground node to the ground reference or allows the second ground to float, based upon a control signal.

Abstract: The present disclosure is directed to routine recognition for adjusting the power state of a device. Human activity recognition is performed to detect various activity states, and create a current sequence of activity states. In response to detecting a new activity state, routine comparison is performed in order to compare the current sequence to a past sequence that ended with the user starting to interact with the device. The device is preemptively turned on in response to finding a match.

Abstract: A three-phase load is powered by an SPWM driven inverter having a single shunt-topology. During operation, drain-to-source resistances of transistors of each branch of the inverter are determined. Interpolation is performed on assumed drain-to-source resistances of the transistors for different temperatures to produce a non-linear model of drain-to-source resistance to temperature for the transistors, and the drain-to-source resistances determined during operation and the non-linear model are used to estimate temperature values of the transistors. Driving of the inverter can be adjusted so that conductivity of each branch is set so that power delivered by that branch is as high as possible without exceeding an allowed drain current threshold representing a threshold junction temperature. In addition, driving of the inverter can be ceased if the temperature of a transistor exceeds the threshold temperature.

Abstract: A device includes a local oscillator, an all-digital phase-locked loop, a digital signal generator, sampling circuitry, and an interface. The local oscillator generates a local clock signal. The all-digital phase locked loop generates a sampling control signal. The ADPLL includes a phase-error detector, a digital filter and a sigma-delta modulator. The phase detector generates a phase error signal based on a loop clock signal and a received reference signal. The digital filter generates a signal indicative of a frequency ratio between a frequency of the reference clock signal and the local clock frequency based on the phase error signal. The sigma-delta modulator generates a modulated signal based on the signal indicative of the frequency ratio. The sampling control signal is based on the modulated signal. The sampling circuitry samples digital signals generated by the digital signal generator at a sampling frequency, which is a function of the sampling control signal.

Abstract: A near-field communication device operates to transmit data by near-field communications techniques to another device. The near-field communication device includes a memory that stores a message to be transmitted in an ASCII format. The message is retrieved from the memory and transmitted using the near-field communications techniques in an ASCII format.

Abstract: A phase change memory element has a memory region, a first electrode and a second electrode. The memory region is arranged between the first and the second electrodes and has a bulk zone and an active zone. The memory region is made of a germanium, antimony and tellurium based alloy, wherein germanium is in a higher percentage than antimony and tellurium in the bulk zone of the memory region. The active zone is configured to switch between a first stable state associated with a first memory logic level and a second stable state associated with a second memory logic level. The active zone has, in the first stable state, a uniform, amorphous structure and, in the second stable state, a differential polycrystalline structure including a first portion, having a first stoichiometry, and a second portion, having a second stoichiometry different from the first stoichiometry.