Abstract: A capacitive power supply including: a first capacitive element and a first resistive element in series between a first terminal of a power switch and at least one rectifying element having a second terminal connected to a first electrode of at least one second capacitive element for providing a D.C. voltage; and a bidirectional switch in parallel on the resistor.

Abstract: Disclosed is a photonic integrated circuit having a plurality of lenses and a method for making the same. The photonic integrated circuit is comprised of optical circuitry fabricated over an underlying circuitry layer. In some embodiments, the optical circuitry includes a dielectric material having recesses disposed within, layers of a light waveguide material deposited within the recesses, and lenses disposed over each layer of waveguide material. The underlying circuitry layer may include, for example, a semiconductor wafer as well as circuitry fabricated during front end of line (FEOL) semiconductor manufacturing such as, for example, sources, gates, drains, interconnects, contacts, resistors, and other circuitry that may be manufactured during FEOL processes. The underlying circuitry layer may also include circuitry manufactured during back end of line semiconductor manufacturing processes such as, for example, interconnect structures, metallization layers, and contacts.

Abstract: A proximity detector may include an array of single photon avalanche diodes (SPADs) and an illumination source. Illumination from the illumination source may be reflected by a target to the array of single photon avalanche diodes. The SPADs may be operable to detect events. A number of events detected may be dependent on a level of illumination incident on the SPADs. The proximity detector may then determine a quality metric and calculate an output when the quality metric is at a predetermined level. A related method may include regulating the quality of the data on which such a proximity detector apparatus calculates its output.

Abstract: Three alternative methods of controlling transmit power in a basic service set (BSS) including a plurality of stations that have successfully synchronized with an access point include providing each BSS with one transmit power limit that is not more than the lowest one of the transmit power limits of all of its operating channels, providing each BSS with one transmit power limit that is fixed for physical layer convergence procedure (PLCP) protocol data units (PPDU) with each channel bandwidth, or providing each BSS with one transmit power limit that is fixed for each 80 MHz channel.

Abstract: A method and apparatus for touch detection, multi-touch detection and cursor control in which the acceleration of a control surface is sensed to provide sensed signals. The control surface is supported at one or more support positions and moves in response to a force applied by a user at a touch position. The sensed signals are received in a processing unit where they are used to estimate a change in the position of force application. A touch control signal is generated from the estimated change in touch position. The touch control signal may be output to a graphical user interface, where it may be used, for example, to control various elements such as mouse clicks, scroll controls, control of single or multiple cursors, or manipulation of views of an object on a visual display unit, or remote control manipulation of objects themselves.

Abstract: A camera module includes a single lens system, a sensor and an image enhancer. The image enhancer is operable to enhance a single image captured by the sensor via the single lens system. The image enhancer performs opto-algorithmic processing to extend the depth of field of the single lens system, a mapping to derive a depth map from the captured single image; and image processing to calculate suitable offsets from the depth map as is required to produce a 3-dimensional image. The calculated offsets are applied to appropriate image channels so as to obtain the 3-dimensional image from the single image capture.

Abstract: According to one implementation, the slave identifier bits are tested recursively in groups of p bits. For these p bits, each slave will recognize, in its p corresponding identifier bits, one combination out of the 2p possible combinations. The slaves respond simultaneously (20) over the bus, for example an I2C bus, to a request from the master. The response is given by outputting a series of “1” bits in which each slave inserts a “0”, which is, for example, the priority logic value on the bus, the position of the “0” in the series of “1” bits being dependent on the binary value of the combination recognized by the slave in the group of p bits of its identifier. The master progressively determines on the fly, based on the bits of the frame received, the values of bits of these digital information items.

Abstract: A circuit is for generating a signal that indicates whether or not an input current exceeds a pre-established threshold current and, in the affirmative case, that is representative of the difference between the input current and the threshold current. The circuit includes a diode-connected transistor biased with a first constant current in a saturation functioning condition, a sense transistor mirrored to the diode-connected transistor and biased in a linear (triode) functioning condition, a load transistor connected in series to the sense transistor, biased with a second constant current and the control terminal of which is connected in common with the respective terminals of the diode-connected transistor and of the sense transistor. The input current to be compared is injected to a common current node of the load transistor and of the sense transistor, and the output voltage is available on the other current node of the load transistor.

Abstract: A zoom lens system includes a variator lens group, a compensator lens group and a third lens group. The compensator lens group is arranged to only partially compensate for movement of the variator group. In order to provide further compensation for the zoom lens, an image enhancer implement wavefront coding and artifact reduction techniques. The compensator group may be fixed or alternatively, its movement relative to the variator may be effected by a simple cam mechanism.

Abstract: An LED array includes a plurality of LED segments connected in a common cathode configuration at a common cathode node. A high side driver is operable responsive to segment control signals to selectively supply current to certain LED segments. A low side driver is provided to sink current from the common cathode node. A plurality of selectively actuated current sink paths are provided in each low side driver. A control logic circuit actuates a current sink path within the low side driver for each LED segment that is selectively supplied current by the high side driver. A substantially constant low side voltage drop through these sink paths is provided regardless of the number of LED segments that are supplied current by the high side driver so as to achieve a substantially constant LED segment brightness. A common anode configuration operating in an analogous way is also disclosed.

Abstract: The invention concerns receive circuitry for extracting horizontal and vertical synchronization signals from a digital synchronization signal associated with a video signal, the digital synchronization signal having a plurality of pulses, the receive circuitry including detection circuitry arranged to determine a first value indicative of the time delay between a timing edge of a first pulse and a timing edge of a second pulse of the digital synchronization signal; and a synchronization extraction block arranged to determine that one of the plurality of pulses is a vertical synchronization pulse based on a comparison between the first value and a reference value.

Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.

Abstract: A spiral structure having at least one planar winding in at least one first conductive level to form at least one inductive element, wherein the winding is surrounded with a conductive plane and at least one track is formed in a second conductive level and has two ends connected by conductive vias to the plane of the first level, at diametrically opposite positions with respect to the center of the winding.

Abstract: Circuitry for decoding data from a pulsed signal received on a single line, the circuitry comprising receiving means for receiving a first edge and a second edge on the single line, the first and second edges being separated by a time period, the time period representing said data; decode circuitry comprising determining means arranged to determine a value of the time period and decoding means arranged to decode said data based on said determined value of the time period; a memory arranged to store a reference value; and calibration means for calibrating said decode circuitry based on a comparison between said determined value of the time period and said reference value, wherein the determining means comprises a plurality of sampling units for sampling said pulsed signal at different times, and selection means for selecting the output of one of said sampling units to decoded.

Abstract: A short circuit detection module for a touch panel includes first and second short circuit detection circuits. The first short circuit detection circuit is coupled to a first conductive line of the touch panel. The first short circuit detection circuit is configured to drive the first conductive line with a first signal having a first logic level. The second short circuit detection circuit is coupled to second, adjacent, conductive line of the touch panel. The second short circuit detection circuit is configured to drive the second conductive line with a second signal having a second logic level that is complementary to the first logic level.

Abstract: A method for determining, by means of a computer, a photolithography mask for the manufacturing a microstructure by grey level etching of a resist layer, this mask including a plurality of elementary cells, each including an opaque area arranged, in top view, in a non-peripheral portion of a transparent region or, conversely, in a transparent area arranged, in top view, in a non-peripheral portion of an opaque region, comprising the steps of: a) initializing the mask pattern in a first state; b) determining, by simulation, the profile of the microstructure which would result from the use of the mask according to said pattern; c) adjusting said pattern by modifying, in certain cells, the position of the opaque or transparent area within the cell; and d) forming the mask according to said pattern.

Abstract: A driving circuit of a test access port is disclosed. The driving circuit includes an input terminal for receiving a first test data signal when the driving circuit is operating in an external test mode. The driving circuit is configured to receive a second test data signal (BS) carrying a test command to be executed on the test access port when the driving circuit is operating in an internal test mode. The driving circuit comprises a control logic circuit configured for processing the test command and generating therefrom an internal test data signal carrying the processed test command when the driving circuit is operating in the internal test mode. The driving circuit includes a selector configured for generating a selected test data signal, the selected test data signal being selected from the first test data signal when the driving circuit is operating in the external test mode.

Abstract: A camera module includes a sensor die, a glass plate, peripheral spacer, an optical element, an outer surface having a shoulder extending in a direction substantially parallel to the sensor die, and a metal layer at least partially covering the outer surface. A method of manufacturing a camera module includes providing an assembly including a sensor dice wafer, a spacer wafer in front of the sensor dice wafer, and an optical element wafer in front of the spacer wafer. The method includes sawing a top cut, using a first saw blade of a first thickness, proceeding in a direction from the optical element wafer toward the sensor dice wafer, stopping before the sensor dice wafer is reached, and sawing a bottom cut, using a second saw blade of a second thickness, proceeding in a direction from the sensor dice wafer toward the optical element wafer.

Abstract: A method for characterizing image sensor pixels arranged in an array, including the steps of: (a) illuminating a first portion of the array formed of pixels associated with a color filter of a first color; (b) measuring the detection performed by a central pixel of the first portion; (c) illuminating a second portion of the array formed of a central pixel associated with a color filter of a second color and of peripheral pixels associated with a color filter of the first color; (d) measuring the detection performed by the central pixel and the peripheral pixels of the second portion; (e) comparing the measurements of steps (b) and (d).

Abstract: A vertical four-quadrant triac wherein the gate region, arranged on the side of a front surface, includes a U-shaped region of a first conductivity type, the base of the U lying against one side of the structure, the main front surface region of the second conductivity type extending in front of the gate region and being surrounded with portions of the main front surface region of the first conductivity type.