Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A silicon nitride capping layer is applied over the polysilicon protection layer. A polsilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.

Abstract: A filtering module filters out high frequency signals, primarily noise, from an input data stream. The filtering module includes an input module, a phase detecting module, and a threshold module. The input module performs either a charging or a discharging across a capacitor on a basis of an RC time constant. The phase detecting module is coupled to the input module to keep identical phase at a first node and an output node. The threshold module is coupled to the phase detecting module for providing an output signal based on a threshold voltage and the charging or the discharging across the capacitor.

Abstract: A circuit for glitchless switching between asynchronous clocks includes a select circuit and enable circuits. The select circuit receives a selection signal for selecting one of the clock input signals and to generate enabling signals for activating the corresponding enable circuits on the basis of the current output signal. The feedback logic in the circuit ensures that at any given instance only one of the clock input signals is outputted so as to avoid the formation of glitches. The circuit can be applied to switches between any number of asynchronous clocks.

Abstract: A method for realizes electric connections in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components.

Abstract: Described herein is an optically controlled electrical-switch device which includes a first current-conduction terminal and a second current-conduction terminal, and a carbon nanotube connected between the first and the second current-conduction terminals, the carbon nanotube being designed to be impinged upon by electromagnetic radiation and having an electrical conductivity that can be varied by varying the polarization of the electromagnetic radiation incident thereon. In particular, the carbon nanotube may for example, in given conditions of electrical biasing, present a high electrical conductivity when it is impinged upon by electromagnetic radiation having a given wavelength and a polarization substantially parallel to the axis of the carbon nanotube itself, and a reduced electrical conductivity when it is impinged upon by electromagnetic radiation having a given wavelength and a polarization substantially orthogonal to the axis of the carbon nanotube itself.

Abstract: Presented is a method for decoding-decompressing a compressed-encoded digital data sequence relating to at least one initial digital image. The method includes receiving the digital data sequence having compressed-encoded data groups separated from one another by at least one restart marker and each one including a respective set of encoded data structures. The method calculates a representative value of the number of encoded data structures being between a first restart marker and a subsequent second restart marker signaling, respectively, the start of a first data group to be decoded and the start of a second data group. The method then extracts from the first data group the encoded data structures, and detects the presence of at least one error, if the number of the encoded data structures extracted is different from the calculated value.

Abstract: A circuit for converting the state of a sensor into a signal interpretable by an electronic circuit, including: a comparator of the voltage level of an input terminal with respect to a reference level, the sensor being intended to be connected between a terminal of application of a first power supply voltage and the input terminal; a current-limiting element between said input terminal and the ground; and a switching element in series with the current source and intended to be controlled by a pulse train.

Abstract: The component comprises a first memory (MM) comprising a first portion (P1) having a content modified with a first modification entity (K1) and a second portion (P2) having a content modified with a second entity (K2), a storage means (MS) configured to store the first entity (K1) secretly, a non-volatile memory (NVM) storing an item of entity information representative of the second entity (K2) in a location (END) designated by a first indication (INDK2) contained in the said first portion of the first memory.

Abstract: A method for forming an integrated lithium-ion type battery, including the successive steps of: forming, on a substrate, a stack of a cathode layer made of a material capable of receiving lithium ions, an electrolyte layer, and an anode layer of the battery; forming a short-circuit between the anode and cathode layers; performing a thermal evaporation of lithium; and opening the short-circuit between the anode and cathode layers.

Abstract: A single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism.

Abstract: A slave device has an input/output adapted for connection to a serial data line of an I2C bus configuration, a clock input adapted for connection to a serial clock line of the I2C bus configuration, and an interrupt input adapted for connection to the serial clock line of the I2C bus configuration. The slave device senses transitions on the serial clock line through the interrupt input to trigger capturing of a command code on serial data line through the input output. In response to receipt of the command code, the slave device controls the serial data line through the input/output to send an acknowledgement of receipt of the command code. However, if the captured command code is not recognized the slave device inhibits sending of the acknowledgement of the command code. The pull up connection on the serial data line of the I2C bus configuration will, when the slave device is inhibited from acknowledging, produce a high logic state indicative of a no acknowledgement.

Abstract: A method is for decoding a block of N information items encoded with an error correction code and mutually correlated. The method includes carrying out a first decorrelation of the N information items of a block is carried out, and storing the block decorrelated. The method also includes a performing a processing for decoding a group of P information items of the block, and decorrelating at least part of the P decoded information items. The processing for decoding the group of P information items and the decorrelation are repeated with different successive groups of P information items of the block until the N information items of the block have been processed, until a decoding criterion is satisfied.

Abstract: A method for manufacturing a device including a field of micrometric tips, including forming a polycrystalline layer on a support; performing an anisotropic plasma etching of all or part of the polycrystalline layer by using a gas mixture including chlorine and helium, whereby tips are formed at the surface of the polycrystalline layer.

Abstract: A detector of biological or chemical material, including a MOS transistor having its channel region inserted between upper and lower insulated gates, the upper insulated gate including a detection layer capable of generating a charge at the interface of the upper insulated gate and of its gate insulator, the thickness of the upper gate insulator being smaller than the thickness of the lower gate insulator.

Abstract: An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node.

Abstract: An electronic device includes a semiconductor component having a support substrate in the form of a wafer. On one side of this substrate integrated circuits including an RF circuit and an antenna connected to this RF circuit are formed. A metal layer is situated on the other side of the substrate, facing the antenna. At least on metal via is provided in a through-hole in the substrate, this via being connected at one end to the metal layer and at the other end to the RF circuit, at the same reference potential node as the antenna.

Abstract: A reading circuit for a semiconductor memory, comprising: a circuital branch adapted to be electrically coupled to a bit line which is connected to a memory cell to be read; an evaluation circuit adapted to sense a cell electric current flowing through the bit line during a sensing phase of a reading operation of the data stored into the memory cell, the evaluation circuit comprising a negative feedback control loop adapted to control the potential of the bit line during the sensing phase, the control loop comprising a differential amplifier having an inverting input terminal operatively connected to the bit line, a non-inverting input terminal fed by a first reference potential, and a feedback circuital path connected between an output of the differential amplifier and the inverting input, wherein the feedback circuital path is adapted to conduct a measure current corresponding to the cell electric current, and comprises current/voltage conversion means for converting the measure current into a corresponding

Abstract: A method for manufacturing a back-side illuminated image sensor, including the steps of: forming, inside and on top of an SOI-type silicon layer, components for trapping and transferring photogenerated carriers and isolation regions; forming a stack of interconnection levels on the silicon layer and attaching, on the interconnect stack, a semiconductor handle; removing the semiconductor support; forming, in the insulating layer and the silicon layer, trenches reaching the isolation regions; depositing a doped amorphous silicon layer, more heavily doped than the silicon layer, at least on the walls and the bottom of the trenches and having the amorphous silicon layer crystallize; and filling the trenches with a reflective material.

Abstract: An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.

Abstract: A non-volatile memory including at least first and second memory cells each including a storage MOS transistor with dual gates and an insulation layer provided between the two gates. The insulation layer of the storage transistor of the second memory cell includes at least one portion that is less insulating than the insulation layer of the storage transistor of the first memory cell.