Abstract: An image frequency rejection mixer has a first differential transconductor that receives a differential mixer input signal, a second differential transconductor that receives the differential mixer input signal and cross-coupled to the first differential transconductor, a first mixing circuit that generates a first differential mixing circuit output signal by mixing a first differential information signal with a first local oscillation signal, a second mixing circuit that generates a second differential mixing circuit output signal by mixing a second differential information signal with a second local oscillation signal, with the first local oscillation signal and the second local oscillation signal being in quadrature, and an image rejection circuit that generates a differential mixer output signal from the first and second differential mixing circuit output signals.

Abstract: A reconfigurable hierarchical computer architecture having N levels, where N is an integer value greater than one, wherein said N levels include a first level including a first computation block including a first data input, a first data output and a plurality of computing nodes interconnected by a first connecting mechanism, each computing node including an input port, a functional unit and an output port, the first connecting mechanism capable of connecting each output port to the input port of each other computing node; and a second level including a second computation block including a second data input, a second data output and a plurality of the first computation blocks interconnected by a second connecting means for selectively connecting the first data output of each of the first computation blocks and the second data input to each of the first data inputs and for selectively connecting each of the first data outputs to the second data output.

Abstract: The memory device includes a memory cell unit of the electrically erasable and programmable non-volatile type including two memory cells respectively connected to two bit lines via two bit line select transistors. The common terminal between the bit line select transistor and the floating-gate transistor of each memory cell of the memory cell unit is connected to the control gate of the floating-gate transistor of the other memory cell of the memory cell unit.

Abstract: A method of motion compensation in a camera may include deriving a motion signal representative of a motion of the camera, processing video frames of a video signal from an image sensor of the camera during a viewfinder mode to derive motion vectors between pairs of frames, and processing the motion signal with a number of combinations of gain and offset factors during the viewfinder mode. The method may also include determining combinations for producing threshold motion vectors, and applying the combination producing the threshold motion vectors for processing the motion signal during a still capture mode to produce a control signal for a motion compensating element for optics of the camera.

Abstract: An apparatus and a method switch a load through a power transistor. The apparatus includes: a first current generator for generating a current to charge a capacitance of a control terminal of the power transistor during power on of the power transistor; a second current generator for generating a current to discharge the capacitance during power off of the power transistor. The apparatus is equipped with control circuitry having a storage element for storing a voltage value representative of the potential difference between the control terminal and a conduction terminal of the power transistor when the power transistor operates in the saturation region and a discharge circuit for generating an additional current to discharge the capacitance during the power-off process. The additional current is a function of the potential difference of the control terminal and the stored voltage value from the conduction terminal.

Abstract: A method realizes a contact of a first well of a first type of dopant integrated in a semiconductor substrate next to a second well of a second type of dopant and forming with it a parasitic diode. The method comprises: formation of the first well; formation of the second well next to the first well; definition of an oxide layer above the first and second wells; and formation of an electric contact layer above the oxide layer in correspondence with the first well for realizing an electric contact with it. The definition step of the oxide layer further comprises a deposition step of this oxide layer above the whole first well and a removal step of at least one portion of the oxide layer in correspondence with a contact area of the first well so that the contact area has a shorter length than a length of the first well.

Abstract: A method and a circuit for protecting a digital quantity stored in a microcontroller including a JTAG interface, including the step of making the digital quantity dependent from a value stored in non-volatile fashion in the microcontroller and made inaccessible if signals are present at the input of the JTAG interface.

Abstract: A secure method and device of identification by biometric data in which digital biometric data obtained by a sensor are combined with an identifier of an integrated circuit chip contained in a device common to the sensor.

Abstract: A correlator may correlate a satellite signal modulated with a pseudo-random binary sequence with a local binary sequence including a given number of samples. The correlation may be performed on a given input sequence of length 2N?1 with respect to versions of the local binary sequence of length N having different phases and defining a search space for the correlation results of the table, organized in a table, wherein the lines of the table may represent the versions of the local binary sequence with different phases. The correlator may be structured to perform the correlation operating on a number N of samples equal to a sub-multiple of the number of samples included in the local binary sequence, by exploring the table according to rhomboidal subsets by operating on subsequent lines with sliding windows having widths equal to N and according to a lexicographical order with a periodic return to a new line.

Abstract: Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (PbxLay)(ZrzTi(1?z))O3 [wherein 0.9<x<1.3, 0?y?0.1, and 0?z?0.9 are satisfied] with a composite oxide (B) or a carboxylic acid (B) represented by general formula (2): CnH2n+1COOH [wherein 3?n?7 is satisfied]. The composite oxide (B) contains one or at least two elements selected from the group consisting of P (phosphorus), Si, Ce, and Bi and one or at least two elements selected from the group consisting of Sn, Sm, Nd, and Y (yttrium).

Abstract: The invention concerns a conducting layer having a thickness of between 1 and 5 atoms, an insulated gate being formed over a part of the conducting layer.

Abstract: An interface plate capable of being mounted between first and second surface-mounted electronic chips. The plate includes a plurality of first, second, and third through openings, the first openings being filled with a conductive material and being arranged to be in front of pads of the first and second chips during the assembly, the second openings being filled with a second material, the third openings being filled with a third material, the second and third materials forming two complementary components of a thermoelectric couple.

Abstract: A device for converting thermal power into electric power including a plurality of bimetallic strips disposed between a rigid support and a plate of a resilient plastic material; and on the side of the plate of a resilient plastic material opposite to the strips, a layer of a piezoelectric material connected to output terminals, wherein the rigid support is capable of being in contact with a hot source, and the plate of a resilient plastic material is capable of transmitting to the piezoelectric layer the mechanical stress due to the deformations of the bimetallic strips.

Abstract: An embodiment of a process for forming an interface between a silicon carbide (SiC) layer and a silicon oxide (SiO2) layer of a structure designed to conduct current is disclosed. A first epitaxial layer having a first doping level is homo-epitaxially grown on a substrate. The homo-epitaxial growth is preceded by growing, on the first epitaxial layer, a second epitaxial layer having a second doping level higher than the first doping level. Finally, the second epitaxial layer is oxidized so as to be totally removed. Thereby, a silicon oxide layer of high quality is formed, and the interface between the second epitaxial layer and silicon oxide has a low trap density.

Abstract: A thermoelectric generator including, between first and second walls delimiting a tightly closed space, a layer of a piezoelectric material connected to output terminals; a plurality of openings crossing the piezoelectric layer and emerging into first and second cavities close to the first and second walls; and in the tight space, drops of a liquid, the first wall being capable of being in contact with a hot source having a temperature greater than the evaporation temperature of the liquid and the second wall being capable of being in contact with a cold source having a temperature smaller than the evaporation temperature of the liquid.

Abstract: A system includes analog supply circuitry providing first and second analog potentials. A switch module assumes first or second states to enable and inhibit transfer of an analog electrical signal from a source module to a user module based upon a driving electrical signal. A driving device drives, based upon the driving electrical signal, a control terminal of the switch module, allowing the switch module to assume the first or second state. The driving device allows the switch module to make a first driving transition from the first state to the second state, and a second driving transition from the second state to the first state. The driving device alternately connects the control terminal to a first reference potential, during the first state, and to a second reference potential, during the second state.

Abstract: An image sensor including a first pixel positioned between second and third pixels, each of the first, second and third pixels comprising a photodiode region surrounded by an isolation trench; a first charge transfer gate comprising a first column electrode surrounded by an insulating layer and positioned in an opening of the isolation trench between the first and second pixels, the first column electrode being configured to receive a first transfer voltage signal; and a second charge transfer gate including a second column electrode surrounded by an insulating layer and positioned in an opening of the isolation trench between the first and third pixels, the second column electrode being configured to receive a second transfer voltage signal.

Abstract: The present invention relates to a coprocessor comprising a calculation unit for executing a command, and a securization device for monitoring the execution of the command and supplying an error signal having an active value as soon as the execution of the command begins and an inactive value at the end of the execution of the command, if no abnormal progress in the execution of the command has been detected. The coprocessor further comprises means for preventing access to at least one unit of the coprocessor, while the error signal is on the active value. Application is provided particularly but not exclusively to the protection of integrated circuits for smart cards against attacks by fault injection.

Abstract: In a method for driving electronic devices connected to a vehicle trailer tow connector a trailer electronic device control signal is receiving from a vehicle data communication network. In response to the received control signal, a solid state power control device is switched to connect electrical power to a selected pin of the trailer tow connector. The trailer electronic device control signal may be received from a wiring harness connector connected to a vehicle data communication network. A vehicle trailer tow connector module includes a module housing. A vehicle wiring connector and a trailer wiring connector are coupled to the module housing. A power control circuit is connected to a selected pin in the trailer wiring connector. A controller circuit is coupled to the vehicle wiring connector for receiving communication data from a vehicle data bus, and coupled by control lines to the power control circuit.

Abstract: The secure method for cryptographic computation comprises processing of an input datum (D) by a cryptographic computation tool involving at least one encryption key (K) and at least one generated item of secret information, so as to provide an output datum (DC). The generation of the said at least one item of secret information (ST) comprises processing of the said input datum by at least one operator (OPS) having at least one secret characteristic.