Abstract: An electronic circuit includes configurable cells each having a test input and an output. The configurable cells are connected to one another in a chain in a predefined order via their test input and their output to form a test register based on receiving a chaining command signal. The electronic circuit also includes a detection circuit activated by the chaining command signal to produce a state signal representing a state of initialization of a first set of configurable cells A multiplexing circuit selectively connects the test input of each configurable cell to a second set of the configurable cells either to the output of a preceding configurable cell or to an output of a decoy data generator based on the state signal.

Abstract: A wear leveling solution is proposed for use in a storage device based on a flash memory. The flash memory includes a plurality of physical blocks, which are adapted to be erased individually. A corresponding method starts with the step for erasing one of the physical blocks. One of the physical blocks being allocated for storing data is selected; this operation is performed in response to the reaching of a threshold by an indication of a difference between a number of erasures of the erased physical block and a number of erasures of the selected physical block. At least the data of the selected physical block being valid is copied into the erased physical block. The selected physical block is then erased.

Abstract: A satellite receive unit for receiving a plurality of satellite signals from a plurality of satellites, the satellite receive unit including: a plurality of low noise blocks each for receiving one or more of the satellite signals and providing a received signal, at least one of the low noise blocks receiving a plurality of the satellite signals; and a satellite signal processing unit including a plurality of branches each arranged to receive a corresponding one of the received signals from the plurality of low noise blocks, each branch having a multiplier arranged to weight the received signal by multiplying by a corresponding coefficient; and an adder arranged to add the weighted signals of each branch to generate an output satellite signal.

Abstract: A method is provided. The method comprises calibrating noise prediction parameters by adapting one or more biases, adapting one or more filter coefficients using the adapted one or more biases, and adapting one or more prediction error variances using the adapted one or more biases and the adapted one or more filter coefficients.

Abstract: A thermoelectric generator including a membrane maintained by lateral ends and capable of taking a first shape when its temperature reaches a first threshold and a second shape when its temperature reaches a second threshold greater than the first threshold; and mechanism capable of converting the motions and the deformations of the membrane into electricity.

Abstract: A flip-flop may include a first master stage for latching data, a second slave stage for latching data, and an input multiplexer circuit receiving, as input, data to be latched in the flip-flop. The multiplexer may have single clock phase. The first master stage may be clocked based upon a clock phase, whereas the second stage may be clocked based upon another clock phase.

Abstract: The memory device comprises a physical memory plane (PMP) comprising m first physical lines (RGP1i) extending along a first direction and n second physical lines (RGP2j) extending along a second direction, reception means for receiving a logical address (ADR) designating a first logical line (RG1i) and a second logical line (RG2j) of a matrix logical memory plane (PML), possessing 2p first logical lines extending along the first direction and 2q second logical lines extending along the second direction, in that m and n are each different from a power of two, m being a multiple of 2k, k being less than or equal to p, and the product of m and n being equal to the nearest integer above 2p+q, and in that it comprises means for addressing the physical memory plane (PMP) that are configured to address a first physical line and a part only of a second physical line on the basis of the content of the said logical address received and of the remainder of a Euclidean division of a part of the content of this logical ad

Abstract: A solution for indexing electronic devices includes corresponding electronic device including a die integrating an electronic circuit, the die having at least one index including a reference defining an ordered alignment of a plurality of locations on the die and a marker for defining a value of the index according to an arrangement of the marker with respect to the reference. In one embodiment, the marker includes a plurality of markers each one arranged at a selected one of the locations, the selected location of the marker defining a value of a digit associated with a corresponding power of a base higher than 2 within a number in a positional notation in the base representing the value of the index.

Abstract: A series of hardware pipeline units each processing a stride during prefix search operations on a multi-bit trie includes, within at least one pipeline unit other than the last pipeline unit, a mechanism for retiring search results from the respective pipeline unit rather than passing the search results through the remaining pipeline units. Early retirement may be triggered by either the absence of subsequent strides to be processed or completion (a miss or end node match) of the search, together with an absence of active search operations in subsequent pipeline units. The early retirement mechanism may be included in those pipeline units corresponding to a last stride for a maximum prefix length shorter than the pipeline (e.g., 20 or 32 bits rather than 64 bits), in pipeline units selected on some other basis, or in every pipeline unit. Worst-case and/or average latency for prefix search operations is reduced.

Abstract: A pointing device for a computer system includes: a first movement sensor for detecting movements of the device along a first axis and a second axis; a second movement sensor, for detecting movements of the device along a third axis not coplanar with the first and second axes; and a processing unit associated to the movement sensors for producing a plurality of movement signals indicating the movement of the device along the first, second, and third axes. The processing unit includes a control stage, for controlling the production of the movement signals on the basis of a response of the second movement sensor.

Abstract: A method for initializing a control device of a memory, the control device executing commands for accessing the memory transmitted to the memory by a control signal, the method comprising steps of detecting the switching on of the memory and of at least partially initializing the control device following the switching on of the memory. According to one embodiment of the present invention, the method comprises steps of detecting a specific event in the control signal, and of at least partially initializing the control device following the detection of the specific event.

Abstract: Bistable circuit switching at the edges of a clock signal, including means for pre-charging an intermediate node of the circuit, delay means including a chain of inverters defining a time window around an edge of said clock signal, means for discharging the intermediate node controlled by at least one input data item making it possible to discharge the intermediate node for the duration of said time window, characterized in that the delay means include means for temporally adjusting the duration of the time window to the time for discharging the intermediate node through said discharge means.

Abstract: A calibration method and system for reducing modulation errors in a telecommunication transmitter apparatus includes providing a pair of test signals, which are substantially in quadrature to each other, and to repeat an estimation loop. The estimation loop starts with generating a modulated signal by modulating the test signals (the modulation introducing a modulation error) and continues by obtaining a squared signal corresponding to the square of the modulated signal. A transformed signal corresponding to the squared signal in the frequency domain is then calculated. The estimation loop further includes calculating an error indicator, indicative of the modulation error, according to the modulus of the transformed signal. A compensation, to be applied to the test signals for counterbalancing the modulation error, is calculated according to the error indicator and is then applied to the test signals.

Abstract: A method of transmitting data packets within a local network including a master unit and at least two slave units is adapted to a configuration according to which the master unit comprises two processors. The first processor executes an application and the second processor controls a transmission of data between the master unit and any one of the slave units. According to the method, data packets sent by a first slave unit to a second slave unit pass through the second processor and are forwarded directly in accordance with a readdressing directive obtained from addressing elements which are interassociated and communicated by the first processor to the second processor.

Abstract: A method decrypts the encrypted messages sent by a transmission device to a first electronic device associated with a first trusted authority and to a second electronic device. In one embodiment, first and second tokens are generated and exchanged, respectively, by the first and second electronic devices, which then generate a joint decryption key in order to decrypt the encrypted message.

Abstract: A resonant power converter for ultra-efficient radio frequency transmission and associated methods. In one exemplary embodiment, the invention is digitally actuated and uses a combination of a noise-shaped encoder, a charging switch, and a high-Q resonator coupled to an output load, typically an antenna or transmission line. Energy is built up in the electric and magnetic fields of the resonator, which, in turn, delivers power to the load with very little wasted energy in the process. No active power amplifier is required. The apparatus can be used in literally any RF signal application (wireless or otherwise), including for example cellular handsets, local- or wide-area network transmitters, or even radio base-stations.

Abstract: Full-duplex communication over a communication link between an initiator operating with an initiator clock and a target operating with a target clock involves, in communication from the initiator to the target: storing data from the initiator in a first FIFO memory with the initiator clock, reading data from the initiator stored in the first FIFO memory, wherein reading is with the target clock transmitting the data read from the first FIFO memory over a first mesochronous link, and storing the data transmitted over the first mesochronous link in a buffer whereby the data are made available to the target. Communication from the target to the initiator includes: transmitting data from the target over a second mesochronous link, and storing the data transmitted over the second mesochronous link in a second FIFO memory, wherein storing is with the target clock, whereby the data are made available to the initiator for reading from the second FIFO memory with the initiator clock signal.

Abstract: An image adapter transforms an input image into an output image by successively processing tiles and by changing numbers of columns and of rows of image points. The image adapter includes queue memories connected in series so as to receive values associated with the points of a tile of the input image. A module for calculating a weighted average possesses inputs connected respectively to an output of one of the memories. The module produces values sampled in a direction parallel to the columns and corresponding to the values associated with points of the input image. A sampling rate converter, connected to the output of the module, produces values associated with the points of the output image according to a sampling rate determined for a direction parallel to the rows.

Abstract: An embodiment of a control circuit is proposed for turning on a power switching device, the switching device turning on in response to a control signal exceeding a threshold value. The control circuit includes pre-charging means for providing the control signal at a pre-charging value not reaching the threshold value, and soft turn-on means for gradually increasing the control signal from the pre-charging value to a turn-on value exceeding the threshold value; the pre-charging means includes means for sensing an indication of the threshold value, and means for setting the pre-charging value according to the sensed threshold value.

Abstract: A method for capturing a sequence of video images, using an imager including an estimation of the parameters of a model of global motion between successive images. The method may include measurement of local motions on edges of the images, with the estimation of the parameters of the global motion model performed using the result of the measurement of local motions on the edges of the images.