Patents Assigned to STMicroelectronics
  • Patent number: 8737092
    Abstract: A control device controls a switching circuit of a resonant converter having an output direct current. The switching circuit includes at least a half-bridge of at least a first and a second transistor connected between an input voltage and a reference voltage. The half-bridge is adapted to generate a periodic square-wave voltage for driving the resonant circuit of said resonant circuit and the periodic square-wave voltage oscillates between a high voltage corresponding to the input voltage and a low voltage corresponding to the reference voltage. The control device comprises a generator adapted to generate a periodic square-wave signal for driving the half-bridge. The control device comprises a detector adapted to detect the phase-shift between the periodic square-wave signal generated by the generating means and the current flowing through the resonant circuit, and adapted to control the turning off of the half-bridge when the phase-shift exceeds a first phase-shift value.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventor: Claudio Adragna
  • Patent number: 8736405
    Abstract: An embodiment of a microelectromechanical device having a first structural element, a second structural element, which is mobile with respect to the first structural element, and an elastic supporting structure, which extends between the first and second structural elements to enable a relative movement between the first and second structural elements. The microelectromechanical device moreover possesses an anti-stiction structure, which includes at least one flexible element, which is fixed only with respect to the first structural element and, in a condition of rest, is set at a first distance from the second structural element. The anti-stiction structure is designed to generate a repulsive force between the first and second structural elements in the case of relative movement by an amount greater than the first distance.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gabriele Cazzaniga, Luca Coronato
  • Patent number: 8736262
    Abstract: An integrated magnetic sensor formed in a body including a substrate of semiconductor material, which integrates a Hall cell. A trench is formed in the body, for example, on the back of the substrate, and is delimited by lateral surface portions that extend in a direction transverse to the main face of the body. The trench has a depth in a direction perpendicular to the main face that is much greater than its width in a direction parallel to the main face of the body, between the lateral surface portions. A concentrator made of ferromagnetic material is formed within the trench and is constituted by two ferromagnetic regions, which are set at a distance apart from one another and extend along the lateral surface portions of the trench towards the first Hall cell.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Dario Paci, Caterina Riva, Marco Morelli
  • Patent number: 8738679
    Abstract: An offset free sinc interpolating filter includes differentiators operating at a first sampling frequency, integrators operating at a second sampling frequency and one or more coefficient multipliers. The coefficient multipliers multiply a received value with a constant coefficient value to generate an output value. The differentiators, integrators and coefficient multipliers can be operatively coupled to each other, either directly or through other components such as adders and delay elements, or by a combination of the two. In operation, an input signal is provided to the sinc interpolating filter at the first sampling frequency. The input signal is processed by the differentiators, integrators and coefficient multipliers to generate an output signal at the second sampling frequency. Once the output signal is generated, the integrators are reset before the next input cycle begins.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics International N.V.
    Inventors: Rakhel Kumar Parida, Ankur Bal, Anupam Jain
  • Patent number: 8736046
    Abstract: A semiconductor package is provided, including a laminate substrate with an aperture sized to receive a semiconductor die. Through-holes in the substrate are filled with a thermally conductive adhesive. A first heat spreader is attached to the by the adhesive, and a semiconductor die is positioned in the aperture with a back face in thermal contact with the heat spreader. Wire bonds couple the die to electrical traces on the substrate. A second heat spreader is attached by the adhesive to the substrate over the die, directly opposite the first heat spreader. A portion of the second heat spreader is encapsulated in molding compound. Openings in the second heat spreader admits molding compound to fill the space around the die between the heat spreaders. Heat is transmitted from the die to the first spreader, and thence, via the through-holes and conductive paste, to the second heat spreader.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics Asia Pacific PTE Ltd.
    Inventor: Lee Hua Alvin Seah
  • Patent number: 8733172
    Abstract: An integrated microelectromechanical structure is provided with: a die, having a substrate and a frame, defining inside it a detection region and having a first side extending along a first axis; a driving mass, anchored to the substrate, set in the detection region, and designed to be rotated in a plane with a movement of actuation about a vertical axis; and a first pair and a second pair of first sensing masses, suspended inside the driving mass via elastic supporting elements so as to be fixed with respect thereto in the movement of actuation and so as to perform a detection movement of rotation out of the plane in response to a first angular velocity; wherein the first sensing masses of the first pair and the first sensing masses of the second pair are aligned in respective directions, having non-zero inclinations of opposite sign with respect to the first axis.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Coronato, Gabriele Cazzaniga, Sarah Zerbini
  • Patent number: 8738919
    Abstract: A method for recording at least one information block in a first volatile memory external to a circuit, a first digital signature being calculated based on information and data internal to the circuit and a second digital signature being calculated based on first signatures of a group of information blocks and on a digital quantity internal to the circuit and assigned to said group. A method for checking the content of an information block recorded by this recording method.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.A.
    Inventor: Michel Bardouillet
  • Patent number: 8733170
    Abstract: A micro-electromechanical device includes a semiconductor substrate, in which a first microstructure and a second microstructure of reference are integrated. The first microstructure and the second microstructure are arranged in the substrate so as to undergo equal strains as a result of thermal expansions of the substrate. Furthermore, the first microstructure is provided with movable parts and fixed parts with respect to the substrate, while the second microstructure has a shape that is substantially symmetrical to the first microstructure but is fixed with respect to the substrate. By subtracting the changes in electrical characteristics of the second microstructure from those of the first, variations in electrical characteristics of the first microstructure caused by changes in thermal expansion or contraction can be compensated for.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ernesto Lasalandra, Angelo Merassi, Sarah Zerbini
  • Patent number: 8733871
    Abstract: A process for forming a metal interconnection in an integrated circuit includes forming a first metal layer and a second metal layer on the first metal layer. Photoresist is placed on the second metal layer and patterned to form a mask. The second metal layer is etched. The mask is then removed and the first metal layer is patterned with the second metal layer acting as mask for the first metal layer.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Jin Hao Chia, Yong Peng Yeo, Wei Leong Lim, Shi Min Veronica Goh, Mei Yu Muk
  • Patent number: 8736038
    Abstract: There is provided a lead frame and a packaging method. The lead frame comprises a first plurality of die pads, a second plurality of leads extending from the first plurality of die pads, and a third plurality of tie elements, each of which connects one of the first plurality of die pads to another.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: May 27, 2014
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (Shenzhen) Manufacturing Co., Ltd.
    Inventors: Hui Jun Xiong, Pierangelo Magni
  • Patent number: 8736061
    Abstract: Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a standard cell having a first boundary, a second boundary opposite the first boundary, a third boundary interconnecting the first and second boundaries, and a fourth boundary opposite the third boundary and interconnecting the first and second boundaries. The standard cell further includes parallel active areas extending from the first boundary to the second boundary. Also, the standard cell has parallel gate strips extending from the third boundary to the fourth boundary and over the active areas. A cut mask overlies the gate strips. An interconnect is positioned overlying the cut mask and forms an electrical connection with a selected gate strip.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: May 27, 2014
    Assignees: GLOBALFOUNDRIES, Inc., International Business Machines, STMicroelectronics, Inc.
    Inventors: Frank Johnson, Olivier Menut, Marc Tarabbia, Gregory A. Northrop
  • Patent number: 8736673
    Abstract: Methods and systems are described for enabling the operation of a stereoscopic viewing device such that the viewing device provides a movable viewing window that enables the 3D rendering of 3D image data displayed by a backlit LCD device. In a particular implementation, the systems and methods disclosed herein are operable to control the operation of a pair of LCD shutter glasses.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Greg Neal
  • Patent number: 8736310
    Abstract: A comparator having first and second stages can provide component offset compensation and improved dynamic range. The first stage can receive first and second input signals and produce first and second output signals. The second stage can be coupled to the first stage to receive the first and second output signals at first and second input terminals of the second stage. The second stage can provide a voltage to the first and second terminals that differs from the supply voltage by less than a voltage of a diode drop. The comparator is operable to receive input voltages that reach the supply voltage.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Chee Weng Cheong, Dianbo Guo, Kien Beng Tan
  • Patent number: 8737144
    Abstract: An embodiment of a sense amplifier includes a sense circuit and a monitor circuit. The sense circuit is configured to convert a first signal that corresponds to data stored in a memory cell into a second signal that corresponds to the data, and the monitor circuit is configured to indicate a reliability of the second signal. The monitor circuit allows, for example, adjusting a parameter of a memory in which the memory cell is disposed to increase the read accuracy, and may also allow recognizing and correcting an error due to an invalid second signal.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics International N.V.
    Inventors: Navneet Gupta, Prashant Dubey, ShaileshKumar Pathak, Kaushik Saha, Ashish Kumar, R Sai Krishna
  • Patent number: 8736305
    Abstract: A system having an input and output buffer includes a dynamic driver reference generator to generate dynamic driver reference signals based on a data signal and an IO buffer supply voltage, a level shifter to generate level shifted signals based, in part, on the dynamic driver reference signals, and a driver having at least one stress transistor. The driver dynamically adjusts a voltage across the stress transistor based on at least one of dynamic driver reference signals, the level shifted signals, and a current state of an IO pad.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: May 27, 2014
    Assignee: STMicroelectronics Interntaional N.V.
    Inventor: Sushrant Monga
  • Patent number: 8735208
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: May 27, 2014
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Michel Marty
  • Publication number: 20140140159
    Abstract: A circuit receives a parameter signal at a set or reset input, a clock signal at a clock input and a constant digital value at a data input. A synchronous signal is output from the circuit: wherein when the parameter signal is in a first state, then the output synchronous signal has the digital value; wherein when the parameter signal transitions to a second state, then the output synchronous signal transitions to an inverse of the digital value at substantially the same time; and wherein when the parameter signal transitions back to the first state, then the output synchronous signal transitions to the digital value on a next clock edge.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 22, 2014
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventor: Andrew James FISHLEIGH
  • Publication number: 20140138775
    Abstract: Silicon germanium regions are formed adjacent gates electrodes over both n-type and p-type regions in an integrated circuit. A hard mask patterned by lithography then protects structures over the p-type region while the silicon germanium is selectively removed from over the n-type region, even under remnants of the hard mask on sidewall spacers on the gate electrode. Silicon germanium carbon is epitaxially grown adjacent the gate electrode in place of the removed silicon germanium, and source/drain extension implants are performed prior to removal of the remaining hard mask over the p-type region structures.
    Type: Application
    Filed: November 16, 2012
    Publication date: May 22, 2014
    Applicants: International Business Machines Corporation, STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Balasubramanian Pranatharthiharan
  • Publication number: 20140141588
    Abstract: A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Applicant: STMicroelectronics, Inc.
    Inventor: Barry Dove
  • Publication number: 20140138837
    Abstract: A trench is opened in a dielectric layer. The trench is then lined with a sandwiched diffusion barrier and metal liner structure and a metal seed layer. The sandwiched diffusion barrier and metal liner structure includes a conformal metal liner layer sandwiched between a first diffusion barrier layer and a second diffusion barrier layer. The metal seed layer is at least lightly doped. The lined trench is then filled by electroplating with a metal fill material. A dielectric cap layer is then deposited over the metal filled trench. Dopant from the doped metal seed layer is then migrated to an interface between the metal filled trench and the dielectric cap layer to form a self-aligned metal cap.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 22, 2014
    Applicants: STMicroelectronics, Inc., GlobalFoundries Inc, International Business Machines Corporation
    Inventors: Chengyu Niu, Andrew Simon, Tibor Bolom