Abstract: A transponder comprising a resonant circuit, comprising an antenna and a capacitor, and at least one memory connected to the resonant circuit via an intermediate circuit, characterized in that the intermediate circuit comprises at least one contact zone for receiving a portion of human body, so that the positioning of a portion of human body on a contact zone modifies the intermediate circuit, capable of switching from a first state in which it does not allow the memory to be read and/or written to a second state in which it allows the memory to be read and/or written when the resonant circuit of the transponder is contactlessly powered by a reader.

Abstract: A driving circuit of a test access port is disclosed. The driving circuit includes an input terminal for receiving a first test data signal when the driving circuit is operating in an external test mode. The driving circuit is configured to receive a second test data signal (BS) carrying a test command to be executed on the test access port when the driving circuit is operating in an internal test mode. The driving circuit comprises a control logic circuit configured for processing the test command and generating therefrom an internal test data signal carrying the processed test command when the driving circuit is operating in the internal test mode. The driving circuit includes a selector configured for generating a selected test data signal, the selected test data signal being selected from the first test data signal when the driving circuit is operating in the external test mode.

Abstract: A vertical four-quadrant triac wherein the gate region, arranged on the side of a front surface, includes a U-shaped region of a first conductivity type, the base of the U lying against one side of the structure, the main front surface region of the second conductivity type extending in front of the gate region and being surrounded with portions of the main front surface region of the first conductivity type.

Abstract: An integrated circuit chip includes a substrate die and integrated circuits and a layer incorporating a front electrical interconnect network formed on a front face of the substrate die. A local electrical connection via made of an electrically conductive material is formed in a hole of the substrate die. The via is linked to a connection portion of the electrical interconnect network. An electrical connection pillar made of an electrically conductive material is formed on a rear part of the electrical connection via. A local external protection layer at least partly covers the electrical connection via and the electrical connection pillar.

Abstract: A camera module includes a sensor die, a glass plate, peripheral spacer, an optical element, an outer surface having a shoulder extending in a direction substantially parallel to the sensor die, and a metal layer at least partially covering the outer surface. A method of manufacturing a camera module includes providing an assembly including a sensor dice wafer, a spacer wafer in front of the sensor dice wafer, and an optical element wafer in front of the spacer wafer. The method includes sawing a top cut, using a first saw blade of a first thickness, proceeding in a direction from the optical element wafer toward the sensor dice wafer, stopping before the sensor dice wafer is reached, and sawing a bottom cut, using a second saw blade of a second thickness, proceeding in a direction from the sensor dice wafer toward the optical element wafer.

Abstract: A method for determining, by means of a computer, a photolithography mask for the manufacturing a microstructure by grey level etching of a resist layer, this mask including a plurality of elementary cells, each including an opaque area arranged, in top view, in a non-peripheral portion of a transparent region or, conversely, in a transparent area arranged, in top view, in a non-peripheral portion of an opaque region, comprising the steps of: a) initializing the mask pattern in a first state; b) determining, by simulation, the profile of the microstructure which would result from the use of the mask according to said pattern; c) adjusting said pattern by modifying, in certain cells, the position of the opaque or transparent area within the cell; and d) forming the mask according to said pattern.

Abstract: A method and integrated circuit for preserving a battery's charge and protecting electrical devices is disclosed. A maximum and a minimum battery voltage value at the output port are stored in a memory. A steady state battery voltage at the output port is measured and stored in the memory. A processor compares the measured steady battery voltage value to the maximum and the minimum battery voltage values. If the measured steady state battery voltage value is greater than the maximum battery voltage value, an over voltage state is reported by the processor. If the measured steady state battery voltage value is less than the minimum battery voltage value, a low battery voltage state is reported by the processor.

Abstract: An embodiment of a voltage converter includes: voltage-transformer means having a primary side, designed to receive an input voltage, and a secondary side, designed to supply an output voltage; control-switch means coupled to said primary side; and a control circuit, coupled to a control terminal of said control-switch means and designed to control switching thereof as a function of a first signal correlated to said output voltage; said control circuit being provided with an error-amplifier stage, designed to process a difference between said first signal and a reference signal, wherein said error-amplifier stage is configured so as to have a transconductance characteristic with a linear-operation region, having a given slope, and at least one first clamped region, which has a slope lower than said given slope and is contiguous to said linear-operation region.

Abstract: An embodiment of a voltage converter, designed to convert an input voltage into a regulated output voltage, having: a voltage transformer having a primary winding receiving the input voltage, a secondary winding supplying the output voltage (Vout), and an auxiliary winding supplying a feedback signal correlated to the output voltage; a control switch, connected to the primary winding; and a control circuit, connected to a control terminal of the control switch for controlling switching thereof as a function of the feedback signal. The control circuit is provided with a sampling stage that samples the feedback signal and supplies a sampled signal. An averager stage is connected to the output of the sampling stage and implements a low-pass filtering of the sampled signal so as to reduce undesirable oscillations due to sampling.

Abstract: A device generates a signal representative of a current flowing through a load inductor of a converter, the converter having a first transformer including a primary winding driven with a pulse width modulated (PWM) voltage signal. The device may include a sense inductor magnetically coupled to the load inductor, and an integrator configured to integrate a voltage drop on the sense inductor and to generate a first signal representative of the current flowing through the load inductor with an offset. The device may further include a second transformer to be magnetically coupled to the primary winding of the first transformer and generating a second signal representative of a current flowing through the primary winding, and a peak detector configured to sample and hold a peak value of the second signal at every cycle of the PWM voltage signal.

Abstract: A self-coexistence window reservation protocol for a plurality of Wireless Regional Area Network (WRAN) cells operating in a WRAN over a plurality of channels includes a sequence of self-coexistence windows that uniquely identifies a transmission period for each WRAN cell. A self-coexistence window reservation protocol is included within the first packet of a Coexistence Beaconing Protocol period identifying when each WRAN cell associated with a particular channel will transmit. When not actively transmitting, a WRAN cells remains in a passive, receiving mode to accept data. As the transmissions of each WRAN cell operating on a particular channel are scheduled, contention for a transmission period is eliminated.

Abstract: A method and audio device are presented that preserve mono energy during downmixing of a hybrid coding process of an audio signal. The method includes calculating a stereo scaling factor in a group level that is definable within a stereo band. The method may also include updating the stereo scaling factor using an update rate and synchronizing the update rate of a spatial parameter during a fast changing transient portion of the signal. A number of groups in a first stereo band may be greater than a number of groups in a second stereo band, and the first stereo band may be a lower frequency band than the second band or may be perceptually more important than the second band.

Abstract: A method of performing transactions in a communication network in which is exchanged between Intellectual Property (IP) cores has information transported in packets which include a header for transporting control information and one or more payloads transporting content. A versatile packet format is used which is adapted to transport different traffic patterns generated by the IP cores using different protocols for simple interoperability between the IP cores and also providing configurability of the granularity arbitration process to correct crossing the routers in the communication network.

Abstract: A copper interconnect structure has an intrinsic graphene cap for improving back end of line (BEOL) reliability of the interconnect by reducing time-dependent dielectric breakdown (TDDB) failure and providing resistance to electromigration. Carbon atoms are selectively deposited onto a copper layer of the interconnect structure by a deposition process to form a graphene cap. The graphene cap increases the activation energy of the copper, thus allowing for higher current density and improved resistance to electromigration of the copper. By depositing the graphene cap on the copper, the dielectric regions remain free of conductors and, thus, current leakage within the interlayer dielectric regions is reduced, thereby reducing TDDB failure and increasing the lifespan of the interconnect structure. The reduction of TDDB failure and improved resistance to electromigration improves BEOL reliability of the copper interconnect structure.

Abstract: A differential successive approximation analog to digital converter including: a comparator; a first plurality of capacitors coupled between a corresponding plurality of first switches and a first input of the comparator, at least one of the first capacitors being arranged to receive a first component of a differential input signal; and a second plurality of capacitors coupled between a corresponding plurality of second switches and a second input of the comparator, at least one of the second capacitors being arranged to receive a second component of the differential input signal, wherein each of the first and second plurality of switches are each adapted to independently couple the corresponding capacitor to a selected one of: a first supply voltage level; a second supply voltage level; and a third supply voltage level; and control circuitry adapted to sample the differential input voltage during a sample phase, and to control the first and second switches to couple each capacitor of the first and second plu

Abstract: The present disclosure relates to a method for detecting an object near an electronic system, comprising steps of: forming electrodes around a central area, on an electrically insulating medium, determining measurements representative of the capacitance of the electrodes, and comparing the measurements with a detection threshold, and deducing whether or not an object is near the central area in a detection, the electrically insulating medium on which the electrodes are formed being deposited on an electrically conductive medium forming a shield, the capacitance measurements being taken by simultaneously activating all the electrodes.

Abstract: A monitoring system includes an array of concatenated sensing nodes, with each sensing node being configured to have at least one of near-field and far-field RF coupling circuitry to interface with an adjacent sensing node. A respective device is coupled to each of the sensing nodes. A reader device is configured to have at least one of near-field and far-field RF coupling circuitry to interface with the array of concatenated sensing nodes to read data from the devices.

Abstract: A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.

Abstract: A process for manufacturing a MOS device includes forming a semiconductor layer having a first type of conductivity; forming an insulated gate structure having an electrode region, above the semiconductor layer; forming body regions having a second type of conductivity, within the semiconductor layer, laterally and partially underneath the insulated gate structure; forming source regions having the first type of conductivity, within the body regions; and forming a first enrichment region, in a surface portion of the semiconductor layer underneath the insulated gate structure. The first enrichment region has the first type of conductivity and is set at a distance from the body regions. In order to form the first enrichment region, a first enrichment window is defined within the insulated gate structure, and first dopant species of the first type of conductivity are introduced through the first enrichment window and in a way self-aligned thereto.

Abstract: The present disclosure relates to a method for controlling a touch pad, comprising an object locate mode for locating an object on the touch pad comprising steps of: determining a measurement of capacitance of each of the pairs of electrodes of the touch pad, each pair comprising a row electrode and a column electrode transverse to the row electrode, comparing each measurement with a first detection threshold, and if the comparison of at least one measurement with the first threshold reveals the presence of an object on the touch pad, locating the object on the touch pad according to the capacitance measurements, the method comprising a proximity detection mode comprising steps of: determining a measurement representative of the capacitance between one or two electrodes and one or two other electrodes of the touch pad, and comparing a measurement obtained with a second detection threshold different from the first threshold.