Patents Assigned to STMicroelectronics
  • Patent number: 11836346
    Abstract: A memory array arranged as a plurality of memory cells. The memory cells are configured to operate at a determined voltage. A memory management circuitry coupled to the plurality of memory cells tags a first set of the plurality of memory cells as low-voltage cells and tags a second set of the plurality of memory cells as high-voltage cells. A power source provides a low voltage to the first set of memory cells and provides a high voltage to the second set of memory cells based on the tags.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: December 5, 2023
    Assignees: STMICROELECTRONICS S.r.l., STMicroelectronics International N.V.
    Inventors: Nitin Chawla, Giuseppe Desoli, Anuj Grover, Thomas Boesch, Surinder Pal Singh, Manuj Ayodhyawasi
  • Patent number: 11837558
    Abstract: A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: December 5, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Santo Alessandro Smerzi, Michele Calabretta, Alessandro Sitta, Crocifisso Marco Antonio Renna, Giuseppe D'Arrigo
  • Patent number: 11836318
    Abstract: A method for operating an electronic device includes a touchscreen controller determining based on a frequency of a vertical synchronization signal (Vsync), whether a first display frame includes an idle time, the idle time being a duration of time remaining in the first display frame after an image displayed on a display of the electronic device is updated during the first display frame. The method further includes in response to determining that the first display frame includes the idle time, the touchscreen controller transmitting an uplink signal in the first display frame, the uplink signal being transmitted during the idle time of the first display frame.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics Asia Pacific Pte Ltd.
    Inventors: Tchung Jing Siaw, Chen Khoi Chin, Jenn Woei Soo, Cheng Hung Lin
  • Patent number: 11837678
    Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Charles Baudot, Sebastien Cremer, Nathalie Vulliet, Denis Pellissier-Tanon
  • Patent number: 11835541
    Abstract: A MEMS accelerometric sensor includes a bearing structure and a suspended region that is made of semiconductor material, mobile with respect to the bearing structure. At least one modulation electrode is fixed to the bearing structure and is biased with an electrical modulation signal including at least one periodic component having a first frequency. At least one variable capacitor is formed by the suspended region and by the modulation electrode in such a way that the suspended region is subjected to an electrostatic force that depends upon the electrical modulation signal. A sensing assembly generates, when the accelerometric sensor is subjected to an acceleration, an electrical sensing signal indicating the position of the suspended region with respect to the bearing structure and includes a frequency-modulated component that is a function of the acceleration and of the first frequency.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: December 5, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Alessandro Tocchio, Gabriele Gattere
  • Patent number: 11837647
    Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 5, 2023
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Alexis Gauthier, Pascal Chevalier
  • Patent number: 11839159
    Abstract: A transducer includes a supporting body and a suspended structure mechanically coupled to the supporting body. The suspended structure has a first and a second surface opposite to one another along an axis, and is configured to oscillate in an oscillation direction having at least one component parallel to the axis. A first piezoelectric transducer is disposed on the first surface of the suspended structure, and a second piezoelectric transducer is disposed on the second surface of the suspended structure.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 5, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Luca Seghizzi, Federico Vercesi, Claudia Pedrini
  • Patent number: 11838025
    Abstract: In an embodiment a radiofrequency doubler includes a first transistor and a second transistor connected in parallel between a first differential output and a first terminal of a current source configured to provide a bias current, a second terminal of the current source being connected to a first supply potential, a third transistor connected between the first terminal of the current source and a second differential output, a circuit configured to apply an AC component of a first differential input and a first DC voltage to a gate of the first transistor, apply an AC component of a second differential input and the first DC voltage to a gate of the second transistor and apply a second DC voltage to a gate of the third transistor, and a feedback loop configured to control the first voltage or the second voltage from a difference between DC components of the first and second differential outputs so as to equalize the DC components.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: December 5, 2023
    Assignee: STMICROELECTRONICS SA
    Inventor: Lionel Vogt
  • Patent number: 11837953
    Abstract: First and second circuit branches are coupled between an input node and ground. Each circuit branch includes a series coupling first-fourth transistors in a current flow path with an output node. A first capacitor is coupled between a first capacitor node and a second capacitor node intermediate the first transistor and the second transistor in the first circuit branch. A second capacitor is coupled between a third capacitor node and a fourth capacitor node intermediate the first transistor and the second transistor in the second circuit branch. An inter-branch circuit block between the first and second branches includes a first inter-branch transistor coupled between the first capacitor node in the first circuit branch and the fourth capacitor node in the second circuit branch and a second inter-branch transistor coupled between the third capacitor node in the second circuit branch and the second capacitor node in the first circuit branch.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Dago, Alessandro Gasparini, Osvaldo Enrico Zambetti, Salvatore Levantino, Massimo Antonio Ghioni
  • Patent number: 11838024
    Abstract: An embodiment provides a circuit of cyclic activation of an electronic function including a hysteresis comparator controlling the charge of a capacitive element powering the function.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Tramoni, Jimmy Fort
  • Patent number: 11834054
    Abstract: A system includes inertial sensors and a GPS. The system generates a first estimated vehicle velocity based on motion data and positioning data, generates a second estimated vehicle velocity based on the processed motion data and the first estimated vehicle velocity, and generates fused datasets indicative of position, velocity and attitude of a vehicle based on the processed motion data, the positioning data and the second estimated vehicle velocity. The generating the second estimated vehicle velocity includes: filtering the motion data, transforming the filtered motion data in a frequency domain based on the first estimated vehicle velocity, generating spectral power density signals, generating an estimated wheel angular frequency and an estimated wheel size based on the spectral power density signals, and generating the second estimated vehicle velocity as a function of the estimated wheel angular frequency and the estimated wheel size.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: December 5, 2023
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC., STMicroelectronics (Grand Ouest) SAS
    Inventors: Nicola Matteo Palella, Leonardo Colombo, Andrea Donadel, Roberto Mura, Mahaveer Jain, Joƫlle Philippe
  • Patent number: 11835991
    Abstract: In an embodiment, a method for managing self-tests in an integrated circuit (IC) includes: receiving built-in-self-test (BIST) configuration data; configuring a first clock to a first frequency based on the BIST configuration data; performing a first BIST test at the first frequency; configuring a second clock to a second frequency that is different from the first frequency; and performing a second BIST test at the second frequency.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics International N.V.
    Inventors: Amulya Pandey, Balwinder Singh Soni, Amritanshu Anand, Venkata Narayanan Srinivasan
  • Publication number: 20230389450
    Abstract: Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.
    Type: Application
    Filed: April 21, 2023
    Publication date: November 30, 2023
    Applicants: STMICROELECTRONICS S.r.l., COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Paolo Giuseppe CAPPELLETTI, Gabriele NAVARRO
  • Publication number: 20230387208
    Abstract: A lateral bipolar transistor includes an emitter region doped with a first conductivity type, having a first width and a first average doping concentration; a collector region doped with the first conductivity type, having a second width greater than the first width of the emitter region and a second average doping concentration lower than the first average doping concentration ; and a base region positioned between the emitter and collector regions. The emitter, collector and base regions are arranged in a silicon layer on an insulator layer on a substrate. A substrate region that is deprived of the silicon and insulator layers is positioned on a side of the collector region. A bias circuit is coupled, and configured to deliver, to the substrate region a bias voltage. This bias voltage is controlled to modulate an electrostatic doping of the collector region.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 30, 2023
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Pascal CHEVALIER, Sebastien FREGONESE, Thomas ZIMMER
  • Publication number: 20230381816
    Abstract: Micromachined pressure transducer including: a fixed body of semiconductor material, which laterally delimits a main cavity; a transduction structure, which is suspended on the main cavity and includes at least a pair of deformable structures and a movable region, which is formed by semiconductor material and is mechanically coupled to the fixed body through the deformable structures. Each deformable structure includes: a support structure of semiconductor material, which includes a first and a second beam, each of which has ends fixed respectively to the fixed body and to the movable region, the first beam being superimposed, at a distance, on the second beam; and at least one piezoelectric transduction structure, mechanically coupled to the first beam. The piezoelectric transduction structures are electrically controllable so that they cause corresponding deformations of the respective support structures and a consequent translation of the movable region along a translation direction.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 30, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Domenico GIUSTI, Fabio QUAGLIA, Marco FERRERA
  • Publication number: 20230387917
    Abstract: An integrated circuit includes a programmable logic array. The programmable logic array incudes a plurality of logic elements arranged in rows and columns. Each logic element includes a direct output and a synchronized output. The direct output of each logic element is coupled to all other logic elements of higher rank, but is not coupled to logic elements of lower rank.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Jean-Francois LINK, Mark WALLIS, Joran PANTEL
  • Publication number: 20230386980
    Abstract: A semiconductor die is attached on a die-attachment portion of a substrate such as a leadframe. The semiconductor die has a front surface opposite the substrate and one or more contact pads at the front surface having an outer surface finishing of a first electrically conductive material such as NiPd or Al. An encapsulation of laser direct structuring, LDS material is molded onto the semiconductor die attached on the substrate. Laser beam energy is applied to selected locations of the front surface of the encapsulation of LDS material to activate the LDS material at the selected locations and structure therein electrically conductive formations comprising one or more vias towards the contact pad. The vias comprise a second electrically conductive material that is different from the first electrically conductive material of the outer surface finishing of the contact pad.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 30, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Michele DERAI, Guendalina CATALANO
  • Publication number: 20230386565
    Abstract: An in-memory computation circuit includes a memory array including sub-arrays of with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit selectively actuates word lines across the sub-arrays for an in-memory compute operation. A computation tile circuit for each sub-array includes a column compute circuit for each bit line. Each column compute circuit includes a switched timing circuit that is actuated in response to weight data on the bit line for a duration of time set by an in-memory compute operation enable signal. A current digital-to-analog converter powered by the switched timing circuit operates to generate a drain current having a magnitude controlled by bits of feature data for the in-memory compute operation. The drain current is integrated to generate an output voltage.
    Type: Application
    Filed: April 19, 2023
    Publication date: November 30, 2023
    Applicant: STMicroelectronics International N.V.
    Inventors: Kedar Janardan DHORI, Harsh RAWAT, Promod KUMAR, Nitin CHAWLA, Manuj AYODHYAWASI
  • Publication number: 20230389426
    Abstract: MEMS thermoelectric generator comprising: a thermoelectric cell including one or more thermoelectric elements partially extending on a cavity of the thermoelectric cell; a thermoplastic layer extending on the thermoelectric cell and having a top surface and a bottom surface opposite to each other along a first axis, the bottom surface facing the thermoelectric cell and the thermoplastic layer being of thermally insulating material and configured to be processed through laser direct structuring, LDS, technique; a heat sink configured to exchange heat with the thermoelectric cell interposed, along the first axis, between the heat sink and the thermoplastic layer; and a thermal via of metal material, extending through the thermoplastic layer from the top surface to the bottom surface so that it is superimposed, along the first axis, on the cavity, wherein the thermoelectric cell may exchange heat with a thermal source through the thermal via.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 30, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Paolo FERRARI, Flavio Francesco VILLA, Marco DEL SARTO
  • Publication number: 20230384343
    Abstract: The present disclosure is directed to a device and method for lid angle detection that is accurate even if the device is activated in an upright position. While the device is in a sleep state, first and second sensor units measure acceleration and angular velocity, and calculate orientations of respective lid components based on the acceleration and angular velocity measurements. Upon the device exiting the sleep state, a processor estimates the lid angle using the calculated orientations, sets the estimated lid angle as an initial lid angle, and updates the initial lid angle using, for example, two accelerometers; two accelerometers and two gyroscopes; two accelerometers and two magnetometers; or two accelerometers, two gyroscopes, and two magnetometers.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Federico RIZZARDINI, Lorenzo BRACCO