Patents Assigned to Sumco Techxiv Corporation
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Publication number: 20100093177Abstract: A silicon wafer surface other than a defect is oxidized by ozone to form a silicon oxide film. A hydrofluoric acid is sprayed and subsequently a cleaning gas is sprayed onto the surface of the silicon wafer.Type: ApplicationFiled: September 30, 2009Publication date: April 15, 2010Applicant: SUMCO TECHXIV CORPORATIONInventors: Kazuaki KOZASA, Tomonori KAWASAKI, Takahisa SUGIMAN, Hironori NISHIMURA
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Patent number: 7686891Abstract: An apparatus and a method are provided for accurately analyzing and evaluating a degree of contamination on a chamfered part without mixing impurities from parts other than the chamfered part into chemicals. At a position in which, on a front plane flat part of a semiconductor wafer, a boundary region bordering the chamfered part can come into contact with the chemicals, a radius direction position of the chemicals (a distance between a chemicals center and a wafer center) is determined, scanning is performed in a circumference direction, and the chemicals including impurities are collected. Then, at a position that can be brought into contact with the both chamfered part of the semiconductor wafer and the boundary region, a radius direction position of the chemicals is determined, scanning is performed in the circumference direction and the chemicals including impurities are collected.Type: GrantFiled: June 28, 2005Date of Patent: March 30, 2010Assignee: Sumco TechXIV CorporationInventors: Mariko Wakuda, Ichiro Sato
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Publication number: 20100060891Abstract: A semiconductor wafer inspection method includes: an imaging step in which a first image being an image of the chamfered surface seen from the main surface side and a second image being an image of the chamfered surface seen from the back surface side are taken; a calculation step in which a first width is obtained based on the first image, the first width being a width of the chamfered surface seen from the main surface side, a second width is obtained based on the second image, the second width being a width of the chamfered surface seen from the back surface side, and a ratio of the first width to the second width thus obtained is calculated; and a shape determination step in which a form of the chamfered surface is determined to be abnormal in a case where the ratio is out of a predetermined range.Type: ApplicationFiled: September 8, 2009Publication date: March 11, 2010Applicant: SUMCO TECHXIV CORPORATIONInventors: Kantarou TORII, Kouichi IMURA
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Publication number: 20100050931Abstract: Using a pulling-up apparatus, an oxygen concentration of the monocrystal at a predetermined position in a pulling-up direction is controlled based on a relationship in which the oxygen concentration of the monocrystal is decreased as a flow rate of the inactive gas at a position directly above a free surface of the dopant-added melt is increased when the monocrystal is manufactured with a gas flow volume in the chamber being in the range of 40 L/min to 400 L/min and an inner pressure in the chamber being in the range of 5332 Pa to 79980 Pa. Based on the relationship, oxygen concentration is elevated to manufacture the monocrystal having a desirable oxygen concentration. Because the oxygen concentration is controlled under a condition corresponding to a condition where the gas flow rate is rather slow, the difference between a desirable oxygen concentration profile of the monocrystal and an actual oxygen concentration profile is reduced.Type: ApplicationFiled: May 7, 2008Publication date: March 4, 2010Applicant: SUMCO TECHXIV CORPORATIONInventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Tsuneaki Tomonaga, Yasuyuki Ohta, Toshimichi Kubota, Shinsuke Nishihara
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Patent number: 7666063Abstract: A rough-polishing method for conducting a rough polishing before mirror-finish polishing on a semiconductor wafer using a polishing apparatus includes a first polishing step for polishing the semiconductor wafer using slurry containing colloidal silica supplied by a slurry supplying unit and a second polishing step for polishing the semiconductor wafer using alkali solution provided by mixing deionized water supplied from a deionized-water supplying unit and alkali concentrate solution supplied by an alkali-concentrate-solution supplying unit. The pH value of the alkali solution and polishing time in the second polishing step are determined based on the load current value of the polishing table in the first polishing step.Type: GrantFiled: October 13, 2008Date of Patent: February 23, 2010Assignee: Sumco Techxiv CorporationInventors: Kazuaki Kozasa, Tomonori Kawasaki, Kosuke Miyoshi
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Patent number: 7654883Abstract: A polishing apparatus comprises a polishing plate (24), an abrasive cloth (25) attached to the surface of the polishing plate (24), a chuck (19) for holding and pressing one surface of a wafer (39) against the abrasive cloth (25), and a circular retaining ring (23) concentrically arranged on the periphery of the chuck (19). The retaining ring (23) is rotatable and vertically movable with respect to the chuck (19), and is pressed against the abrasive cloth (25) during the lapping step. The retaining ring (23) is lifted upward during the final polishing step, thereby preventing lapping grains from being brought into the final polishing stage. Accordingly, lapping and final polishing can be successively conducted using the same polishing head. With this structure, cost cutting of the apparatus can be realized, since lapping and final polishing are successively conducted using the same polishing head without bringing the lapping grains used for lapping into the final polishing stage.Type: GrantFiled: February 13, 2009Date of Patent: February 2, 2010Assignee: Sumco Techxiv CorporationInventors: Masamitsu Kitahashi, Toshiyuki Kamei, Hidetoshi Takeda, Hiroyuki Tokunaga, Tamoaki Tajiri
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Publication number: 20100009548Abstract: Provided is a heat treatment method wherein generation of slip dislocation in silicon wafer RTP is suppressed, in order to solve a problem of not sufficiently suppressing generation of slip dislocation of silicon wafers in conventional RTP. A step is provided for suspending temperature rising for 10 seconds or longer at a temperature in a range of over 700° C. to below 950° C., so as to prevent generation of slip dislocation during rapid heating, at least at a silicon wafer portion that contacts with a supporting section of a rapid heating apparatus or at a portion on the outermost circumference section of the silicon wafer.Type: ApplicationFiled: August 21, 2007Publication date: January 14, 2010Applicant: SUMCO TECHXIV CORPORATIONInventors: Kozo Nakamura, Seiichi Shimura, Tomoko Nakajima
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Publication number: 20090311460Abstract: A semiconductor wafer with high flatness is provided. The semiconductor wafer has a diameter ? of 450 mm and a thickness of at least 900 ?m and no greater than 1,100 ?m.Type: ApplicationFiled: June 5, 2009Publication date: December 17, 2009Applicants: SUMCO CORPORATION, SUMCO TECHXIV CORPORATIONInventors: Tomohiro HASHII, Kazushige TAKAISHI, Shinji SAKAMOTO, Tomoko OHMACHI
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Publication number: 20090311862Abstract: By removing residual mechanical stress generated during processing, wafers can be manufactured while suppressing deformation and cracking of the wafer even if the wafer is a large-diameter wafer. A method for manufacturing a wafer, includes: a slicing step (S10) for slicing an ingot to obtain a wafer; a double-sided simultaneous grinding step (S20) for roughly grinding the cut surfaces of each wafer; a chamfering step (S22) for chamfering the edge portion of the wafer; a double-sided simultaneous processing step for simultaneously processing both faces of the wafer so as to remove residual mechanical stress generated on the both faces thereof due to the slicing step and the double-sided grinding step; a single-sided finishing step for separately performing finishing processing on at least one face of the wafer; and a cleaning step for cleaning the wafer.Type: ApplicationFiled: June 15, 2009Publication date: December 17, 2009Applicant: SUMCO TECHXIV CORPORATIONInventors: Tomoaki Tajiri, Daisuke Maruoka
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Publication number: 20090297302Abstract: In order to make it possible to reduce the occurrence of physical damage to wafers during conveyance, a state is established in which wafers W are contained in a wafer cassette 1 standing approximately vertically, and the wafer cassette 1 is conveyed, in this state in which the wafers W are contained in the wafer cassette 1 standing approximately vertically, so that the planes of the wafers W are approximately parallel to the direction of conveyance. Since the wafers are kept in the state of standing approximately vertically, it is possible to reduce the occurrence of bending, as happens when they are held horizontally.Type: ApplicationFiled: May 19, 2009Publication date: December 3, 2009Applicant: SUMCO TECHXIV CORPORATIONInventor: Shinji Sakamoto
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Publication number: 20090293800Abstract: A Czochralski single crystal manufacturing apparatus uses multiple heaters to improve the controllability of crystal diameter. The power supplied to the multiple heaters is controlled so as to bring the pulling up speed close to a predetermined speed set value, and so as to bring the heater temperatures close to predetermined target temperature values. The ratio of electrical power between the heaters is controlled to agree with a predetermined power ratio set value which varies according to the crystal pulling up length, and the heater temperatures change along with this change, which causes disturbance to the diameter control. To compensate for this, heater temperature changes along with the power ratio set value change are taken into account in advance in the temperature set values. Accordingly, along with change of the power ratio set value, the temperature set values change to values appropriate for the current power ratio set value.Type: ApplicationFiled: July 20, 2007Publication date: December 3, 2009Applicant: SUMCO TECHXIV CORPORATIONInventors: Tetsuhiro Iida, Shin Matsukuma
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Publication number: 20090297755Abstract: A semiconductor wafer has a diameter of 450 mm and a thickness of at least 725 ?m and no greater than 900 ?m.Type: ApplicationFiled: May 26, 2009Publication date: December 3, 2009Applicants: SUMCO CORPORATION, SUMCO TECHXIV CORPORATIONInventors: Sakae KOYATA, Tomohiro HASHII, Yasunori YAMADA, Satoshi YUKIWAKI, Shinji SAKAMOTO, Tomoko OHMACHI
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Publication number: 20090269861Abstract: In order to manufacture an epitaxial wafer having satisfactory flatness over its entire surface, epitaxial layers are experimentally grown upon actual wafer samples under various different layer formation conditions, the thickness profiles are measured over the entire surfaces of these wafers before and after growth of the layers, and, from the differences thereof, layer thickness profiles over the entire areas of the epitaxial layers under the various different layer formation conditions are ascertained and stored. Thereafter, the thickness profile of a substrate wafer is measured over its entire area, this is added to each of the layer thickness profiles under the various different layer formation conditions which have been stored, and the planarities of the manufactured wafers which would be manufactured under these various different layer formation conditions are predicted.Type: ApplicationFiled: April 20, 2009Publication date: October 29, 2009Applicant: SUMCO TECHXIV CORPORATIONInventor: Yoshiaki Kurosawa
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Publication number: 20090229512Abstract: A velocity of Ar gas flow passing through between a lower end of a cylindrical body and a thermal shielding body is influenced by arrangement of a pulling path of single crystal silicon, a cylindrical body, and a thermal shielding body. Accordingly, the velocity of the Ar gas flow passing through between a lower end of the cylindrical body and the thermal shielding body is controlled by adjusting a relative position of the pulling path of the single crystal silicon, the cylindrical body, and the thermal shielding body. As described above, dust falling off to silicon melt can be reduced, thereby preventing deterioration in quality of the single crystal silicon.Type: ApplicationFiled: June 27, 2006Publication date: September 17, 2009Applicant: SUMCO TECHXIV CORPORATIONInventors: Makato Kamogawa, Koichi Shimomura, Yoshiyuki Suzuki, Daisuke Ebi
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Publication number: 20090173884Abstract: An object of the present invention is to provide a spectroscopic method and an apparatus which can measure a trace element accurately with high sensitivity. In order to achieve this object, for example, in Fourier transformation infrared spectroscopy (FT-IR), a reference spectrum and a measurement spectrum including an impurity spectrum are measured in order to obtain a differential spectrum comprising the impurity spectrum and a flat baseline, correction including a frequency shift of the reference spectrum before calculating a differential spectrum, is performed on the reference spectrum. This makes it possible to remove baseline deformation due to phonon absorbance of silicon included in the conventional differential spectrum, and to obtain an infrared absorption spectrum of the substitutional carbon with high accuracy and high sensitivity.Type: ApplicationFiled: January 6, 2009Publication date: July 9, 2009Applicant: SUMCO TECHXIV CORPORATIONInventors: Kiyoshi Nagai, Harumi Shibata, Sayaka Hamaguchi
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Publication number: 20090145350Abstract: According to an dopant-injection method for injecting volatilized dopant gas into semiconductor melt in a crucible (31), the crucible (31) is rotated alternately clockwise and counterclockwise around a support shaft (36) extending in a flowing direction of the dopant gas, so that the dopant gas is blown against the semiconductor melt white the crucible is rotated. Rotating the crucible (31) causes convection currents in the semiconductor melt therein, thereby facilitating diffusion of the blown dopant in the semiconductor melt.Type: ApplicationFiled: September 27, 2007Publication date: June 11, 2009Applicant: SUMCO TECHXIV CORPORATIONInventors: Yasuhito Narushima, Fukuo Ogawa, Shinichi Kawazoe, Toshimichi Kubota
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Patent number: 7540800Abstract: A rough-polishing method for conducting a rough polishing before mirror-finish polishing on a semiconductor wafer (W) using a polishing apparatus (1) includes a first polishing step for polishing the semiconductor wafer using slurry containing colloidal silica supplied by a slurry supplying unit (4) and a second polishing step for polishing the semiconductor wafer using alkali solution provided by mixing deionized water supplied from a deionized-water supplying unit (5) and alkali concentrate solution supplied by an alkali-concentrate-solution supplying unit (6). The pH value of the alkali solution and polishing time in the second polishing step are determined based on the load current value of the polishing table (2) in the first polishing step.Type: GrantFiled: September 28, 2007Date of Patent: June 2, 2009Assignee: Sumco Techxiv CorporationInventors: Kazuaki Kozasa, Tomonori Kawasaki, Kosuke Miyoshi
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Patent number: 7537658Abstract: An oxide film 13 on the surface of the substrate 11 and an inner wall oxide film 112 in a COP 111 exposed to the surface of the substrate 11 are removed by cleaning the surface of the substrate 11 with a hydrofluoric acid solution. The substrate 11 is then cleaned with ozone water, thereby forming an oxide film 13 on the surface of the substrate 11. Thereafter the substrate 11 is subjected to a heat treatment for removing the oxide film 13 on the surface of the substrate 11. Consequently, the COP 111 on the surface of the substrate 11 is planarized to be eliminated from the substrate surface. Thereafter an epitaxial layer 12 is formed on the surface of the substrate 11.Type: GrantFiled: December 20, 2005Date of Patent: May 26, 2009Assignee: Sumco Techxiv CorporationInventors: Yuichi Nasu, Kazuhiro Narahara
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Patent number: 7524371Abstract: A method for controlling the temperature gradient on the side surface of a silicon single crystal, the height of a solid-liquid interface, and the oxygen concentration in the longitudinal direction of the silicon single crystal is provided in order to manufacture a defect-free silicon single crystal whose oxygen concentration is controlled to a predetermined value rapidly and stably. By disposing a cylindrical cooler around the silicon single crystal, and adjusting the pulling speed of the silicon single crystal, the rotation speed of a crucible that stores molten silicon and the rotation speed of the silicon single crystal, and the output ratio of a multi-heater separated into at least two in the longitudinal direction of the silicon single crystal disposed around the crucible, the temperature gradient on the side surface, the height of the solid-liquid interface, and the oxygen concentration in the longitudinal direction of the silicon single crystal are controlled.Type: GrantFiled: March 27, 2007Date of Patent: April 28, 2009Assignee: Sumco Techxiv CorporationInventors: Takashi Yokoyama, Toshiaka Saishoji, Toshirou Kotooka, Kazuyoshi Sakatani
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Patent number: 7507148Abstract: A polishing apparatus comprises a polishing plate (24), an abrasive cloth (25) attached to the surface of the polishing plate (24), a chuck (19) for holding and pressing one surface of a wafer (39) against the abrasive cloth (25), and a circular retaining ring (23) concentrically arranged on the periphery of the chuck (19). The retaining ring (23) is rotatable and vertically movable with respect to the chuck (19), and is pressed against the abrasive cloth (25) during the lapping step. The retaining ring (23) is lifted upward during the final polishing step, thereby preventing lapping grains from being brought into the final polishing stage. Accordingly, lapping and final polishing can be successively conducted using the same polishing head. With this structure, cost cutting of the apparatus can be realized, since lapping and final polishing are successively conducted using the same polishing head without bringing the lapping grains used for lapping into the final polishing stage.Type: GrantFiled: September 26, 2003Date of Patent: March 24, 2009Assignee: Sumco Techxiv CorporationInventors: Masamitsu Kitahashi, Toshiyuki Kamei, Hidetoshi Takeda, Hiroyuki Tokunaga, Tamoaki Tajiri