Patents Assigned to Sumco Techxiv Corporation
  • Patent number: 9074298
    Abstract: A process for production of a silicon ingot, by which a silicon ingot exhibiting a low resistivity even in the top portion can be produced. The process for the production of a silicon ingot includes withdrawing a silicon seed crystal from a silicon melt to grow a silicon single crystal, with the silicon seed crystal and the silicon melt containing dopants of the same kind. The process includes the dipping step of dipping a silicon seed crystal containing a dopant in a specific concentration in a silicon melt in such a manner that the temperature difference between both falls within the range of 50 to 97K, and the growing step of growing a silicon single crystal withdrawn after the dipping to form a silicon ingot, the growing step being conducted by using a single crystal puller provided with a thermal shield plate for shielding against radiant heat emitted from the silicon melt and controlling the distance between the thermal shield plate and the silicon melt within a specific range.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: July 7, 2015
    Assignees: SUMCO TECHXIV CORPORATION, SUMCO CORPORATION
    Inventors: Shinichi Kawazoe, Toshimichi Kubota, Fukuo Ogawa, Yasuhito Narushima
  • Publication number: 20150162181
    Abstract: A method of manufacturing a semiconductor wafer includes: rough-polishing front and back surfaces of the semiconductor wafer; mirror-polishing a chamfered portion of the rough-polished semiconductor wafer; performing mirror finish polishing on the front surface or both the front and back surfaces of the semiconductor wafer having the mirror-polished chamfered portion; and forming an oxide film on an entire surface of the semiconductor wafer after the mirror-polishing of the chamfered portion and before the mirror finish polishing.
    Type: Application
    Filed: June 12, 2013
    Publication date: June 11, 2015
    Applicant: SUMCO TECHXIV CORPORATION
    Inventor: Kenji Yamashita
  • Publication number: 20150107509
    Abstract: Disclosed is a silicon single crystal pull-up apparatus that can grow a silicon single crystal having a desired electrical resistivity, to which a sublimable dopant has been reliably added, regardless of the length of the time necessary for the formation of a first half part of a straight body part in a silicon single crystal. Also disclosed is a process for producing a silicon single crystal. The silicon single crystal pull-up apparatus pulls up a silicon single crystal from a melt by a Czochralski method. The silicon single crystal pull-up apparatus comprises a pull-up furnace, a sample chamber that is externally mounted on the pull-up furnace and houses a sublimable dopant, a shielding mechanism that thermally shields the pull-up furnace and the sample chamber, and supply means that, after the release of shielding of the shielding mechanism, supplies the sublimable dopant into the melt.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Applicant: SUMCO TECHXIV CORPORATION
    Inventor: Tomohiro FUKUDA
  • Patent number: 8992791
    Abstract: A silicon wafer surface other than a defect is oxidized by ozone to form a silicon oxide film. A hydrofluoric acid is sprayed and subsequently a cleaning gas is sprayed onto the surface of the silicon wafer.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: March 31, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki, Takahisa Sugiman, Hironori Nishimura
  • Patent number: 8961686
    Abstract: For manufacturing a monocrystal, a monocrystal pulling-up device controls pressure within a flow straightening cylinder to be from 33331 Pa to 79993 Pa and a flow velocity of inert gas in the cylinder to be from 0.06 m/sec to 0.31 m/sec (0.005 to 0.056 SL/min·cm2) during a post-addition-pre-growth period. By controlling the flow velocity of the inert gas to be in the above-described range during the post-addition-pre-growth period, the inert gas flows smoothly even when the pressure within the cylinder is relatively high. Evaporation of a volatile dopant because of a reverse flow of the inert gas can be restrained. The volatile dopant can be prevented from adhering to the flow straightening cylinder in an amorphous state, and the volatile dopant can be prevented from dropping into a melt or sticking on the melt while growing a crystal. Foulings can be easily removed.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: February 24, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Shinichi Kawazoe, Fukuo Ogawa, Yasuhito Narushima, Toshimichi Kubota
  • Patent number: 8956927
    Abstract: A method of manufacturing an epitaxial silicon wafer including a silicon wafer having a surface added with phosphorus and an epitaxial film provided on the surface includes adjusting an in-plane thickness distribution of the epitaxial film formed on the surface of the silicon wafer based on an in-plane resistivity distribution of the silicon wafer before an epitaxial growth treatment.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: February 17, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Tadashi Kawashima, Naoya Nonaka
  • Patent number: 8920561
    Abstract: A silicon single crystal pull-up apparatus includes a pull-up furnace, a sample chamber in which a sublimable dopant is housed, a sample tube which can be raised and lowered between the interior of the sample chamber and the interior of the pull-up furnace, a raising and lowering means for raising and lowering the sample tube, a supply pipe which is installed inside the pull-up furnace and supplies the sublimable dopant to a melt, and a connection means for connecting the sample tube and the supply pipe. The connection means is constructed from a ball joint structure comprising a convex member which projects from one end of the sample tube and a concave member which is provided at one end of the supply pipe and is formed to be engageable with the convex member. The contact surfaces of the convex member and the concave member are formed to be curved surfaces.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: December 30, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Toshimichi Kubota, Tomohiro Fukuda
  • Patent number: 8906777
    Abstract: A method for evaluating a shape change of a semiconductor wafer is provided. The method comprises acquiring unconstrained shape data of shape data of the semiconductor wafer being placed on a reference surface in a unconstrained state; acquiring constrained shape data of shape data of the semiconductor wafer being constrained along the reference surface in a constrained state; and comparing the unconstrained shape data and the constrained shape data. A method for manufacturing the semiconductor wafer utilizing a result of the evaluation of the wafer is also provided.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: December 9, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuhiro Iriguchi, Toshiyuki Isami, Kouhei Kawano
  • Patent number: 8888911
    Abstract: The present invention provides a technique which enables production of single crystal silicon having relatively low resistivity by preventing cell growth during crystal growth from occurring, especially in a case where a relatively large amount of dopant is added to a molten silicon raw material. Specifically, the present invention provides a method of producing single crystal silicon by the Czochralski process, comprising producing single crystal silicon having relatively low resistivity by controlling a height of a solid-liquid interface when the single crystal silicon is pulled up.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: November 18, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Masayuki Uto, Tuneaki Tomonaga, Toshimichi Kubota, Fukuo Ogawa, Yasuhito Narushima
  • Patent number: 8888913
    Abstract: A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: November 18, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuhiro Narahara, Hirotaka Kato, Koichiro Hayashida
  • Patent number: 8853103
    Abstract: A method of manufacturing a silicon wafer, an oxygen concentration in a surface layer to be maintained more than a predetermined value while promoting a defect-free layer. Strength of the surface layer can be made higher than that of an ordinary annealed sample as a COP free zone is secured. A method of manufacturing a silicon wafer doped with nitrogen and oxygen, includes growing a single crystal silicon doped with the nitrogen by Czochralski method, slicing the grown single crystal silicon to obtain a single crystal silicon wafer; heat treating the sliced single crystal silicon wafer in an ambient gas including a hydrogen gas and/or an inert gas; polishing the heat treated single crystal silicon wafer, after the heat treatment, such that an obtained surface layer from which COP defects have been removed by the heat treatment is polished away until an outermost surface has a predetermined oxygen concentration.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 7, 2014
    Assignee: Sumco Techxiv Corporation
    Inventor: Shinya Sadohara
  • Patent number: 8852340
    Abstract: In consideration of influence of segregation, an evaporation area of a volatile dopant and influence of pulling-up speed at the time of manufacturing a monocrystal using a monocrystal pulling-up device, an evaporation speed formula for calculating evaporation speed of the dopant is derived. At predetermined timing during pulling-up, gas flow volume and inner pressure in a chamber are controlled such that a cumulative evaporation amount of the dopant, calculated based on the evaporation speed formula, becomes a predetermined amount. A difference between a resistivity profile of the monocrystal predicted based on the evaporation speed formula and an actual resistivity profile is made small. Since no volatile dopant is subsequently added, increase in workload on an operator, increase of manufacturing time, an increase in amorphous adhering to the inside of the chamber, and an increase in workload at the time of cleaning the inside of the chamber can be prevented.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: October 7, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Fukuo Ogawa, Shinichi Kawazoe, Toshimichi Kubota
  • Publication number: 20140295126
    Abstract: An amount of warp of a wafer is not only reduced, but the amount of warp of the wafer is also accurately controlled to a desired amount. The present invention relates to a method for slicing a semiconductor single crystal ingot, by which a cylindrical semiconductor single crystal ingot is bonded to and held by a holder in a state where the ingot is rotated at a predetermined rotation angle around a crystal axis of the ingot different from a center axis of a cylinder of this ingot and the ingot is sliced by a cutting apparatus in this state. The predetermined rotation angle at the time of bonding and holding the ingot with the use of the holder in such a manner that an amount of warp of a wafer sliced out by the cutting apparatus becomes a predetermined amount.
    Type: Application
    Filed: March 14, 2014
    Publication date: October 2, 2014
    Applicant: SUMCO TECHXIV CORPORATION
    Inventor: Hiroshi NOGUCHI
  • Patent number: 8840721
    Abstract: The present invention provides a method of producing low-resistivity silicon single crystal containing a dopant at a relatively high concentration by adding a large amount of the dopant to silicon melt when the silicon single crystal is pulled up, with suppressing occurrence of dislocation in the crystal. Specifically, the present invention provides a method of manufacturing silicon single crystal by bringing silicon seed crystal into contact with silicon melt and pulling up the silicon seed crystal while rotating the crystal to grow silicon single crystal whose straight body section has a diameter of ? mm below the silicon seed crystal, the method comprising: the dopant-adding step of adding a dopant to the silicon melt during growth of the straight body section of the silicon single crystal, while rotating the silicon single crystal at a rotational speed of ? rpm (where ??24?(?/25)).
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: September 23, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Fukuo Ogawa, Toshimichi Kubota
  • Patent number: 8747551
    Abstract: After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method, where a phosphorus concentration [P]L(atoms/cm3) in the silicon melt, a Ge concentration in the silicon monocrystal, an average temperature gradient Gave (K/mm) and a pull speed V (mm/min) are controlled to satisfy a formula (1) as follows, a phosphorus concentration [P](atoms/cm3) and the Ge concentration [Ge](atoms/cm3) in the silicon monocrystal satisfy a relationship according to a formula (2) as follows while growing the silicon monocrystal, where dSi(?) represents a lattice constant of silicon, rSi(?) represents a covalent radius of silicon, rP(?) represents a covalent radius of phosphorus, and rGe(?) represents a covalent radius of Ge: [ P ] L + ( 0.3151 × [ Ge ] + 3.806 × 10 18 ) / 1.5 < 0.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: June 10, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Shinichi Kawazoe, Yasuhito Narushima, Toshimichi Kubota, Fukuo Ogawa
  • Patent number: 8715416
    Abstract: A doping device includes a first dopant accommodating portion including an opening on an upper portion to accommodate a first dopant that is evaporated near a surface of a semiconductor melt; a second dopant accommodating portion including a dopant holder that holds a second dopant that is liquefied near the surface of the semiconductor melt while including a communicating hole for delivering the liquefied dopant downwardly, and a conduit tube provided on a lower portion of the dopant holder for delivering the liquefied dopant flowed from the communicating hole to the surface of the semiconductor melt; and a guide provided by a cylinder body of which a lower end is opened and an upper end is closed for guiding dopant gas generated by evaporation of the first dopant to the surface of the semiconductor melt.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: May 6, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Toshimichi Kubota
  • Patent number: 8696809
    Abstract: A manufacturing method of an epitaxial silicon wafer is provided. The epitaxial silicon wafer includes: a substrate cut out from a silicon monocrystal that has been manufactured, doped with nitrogen and pulled up in accordance with Czochralski method; and an epitaxial layer formed on the substrate. The manufacturing method includes: cleaning a surface of the substrate with fluorinated acid by spraying onto the surface of the substrate fluorinated acid vaporized by a bubbling tank of a substrate cleaning apparatus; and forming an epitaxial layer on the cleaned surface of the substrate.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: April 15, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Kosuke Miyoshi
  • Patent number: 8662961
    Abstract: A seasoning plate is placed on a polishing pad and performs seasoning of the polishing pad by abrading the polishing pad through the friction caused by rotation of the polishing pad. The seasoning plate includes: conditioners that abrade the polishing pad; a round flexible substrate that has the conditioners attached to the lower face thereof; an O-ring that is placed on the upper face of the flexible substrate, the O-ring forming a circle concentric with the flexible substrate; and a weight plate serving as a weight portion that is placed on the O-ring and applies weight for deforming the flexible substrate.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: March 4, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Daisuke Maruoka, Koudai Moroiwa
  • Publication number: 20140033967
    Abstract: In consideration of influence of segregation, an evaporation area of a volatile dopant and influence of pulling-up speed at the time of manufacturing a monocrystal using a monocrystal pulling-up device, an evaporation speed formula for calculating evaporation speed of the dopant is derived. At predetermined timing during pulling-up, gas flow volume and inner pressure in a chamber are controlled such that a cumulative evaporation amount of the dopant, calculated based on the evaporation speed formula, becomes a predetermined amount. A difference between a resistivity profile of the monocrystal predicted based on the evaporation speed formula and an actual resistivity profile is made small. Since no volatile dopant is subsequently added, increase in workload on an operator, increase of manufacturing time, an increase in amorphous adhering to the inside of the chamber, and an increase in workload at the time of cleaning the inside of the chamber can be prevented.
    Type: Application
    Filed: October 4, 2013
    Publication date: February 6, 2014
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Yasuhito NARUSHIMA, Fukuo OGAWA, Shinichi KAWAZOE, Toshimichi KUBOTA
  • Publication number: 20140020617
    Abstract: After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method, where a phosphorus concentration [P]L(atoms/cm3) in the silicon melt, a Ge concentration in the silicon monocrystal, an average temperature gradient Gave (K/mm) and a pull speed V (mm/min) are controlled to satisfy a formula (1) as follows, a phosphorus concentration [P](atoms/cm3) and the Ge concentration [Ge](atoms/cm3) in the silicon monocrystal satisfy a relationship according to a formula (2) as follows while growing the silicon monocrystal, where dSi(?) represents a lattice constant of silicon, rSi(?) represents a covalent radius of silicon, rP(?) represents a covalent radius of phosphorus, and rGe(?) represents a covalent radius of Ge: [ P ] L + ( 0.3151 × [ Ge ] + 3.806 × 10 18 ) / 1.5 < 0.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 23, 2014
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Shinichi KAWAZOE, Yasuhito NARUSHIMA, Toshimichi KUBOTA, Fukuo OGAWA