Abstract: A method and apparatus for performing virtualized parsing of an XML document. A document is divided into multiple segments, which may correspond to separate packets containing portions of the document, disk blocks, memory pages, etc. For each segment, a processor operating within an XML accelerator initiates parsing by identifying to a hardware parsing unit the document segment, a symbol table for the document and a location for storing state information regarding the parsing. Each segment is parsed in sequence, and the state information of the parsing is stored after each segment is completed, for retrieval when the next segment is to be parsed.

Abstract: A method for configuring a circuit for providing a power OK (POK) signal is described. The method includes identifying a voltage range and voltage interval, dividing the voltage range into a plurality of segments, selecting a reference voltage for each segment, and selecting resistor values for a plurality of voltage dividers for dividing an output voltage from a precision voltage reference into each of the reference voltages. A power OK signal generator and method for generating a power OK signal are also described.

Abstract: Embodiments of the present invention provide a system that executes program code in a processor. The system starts by executing the program code in a normal mode using a primary strand while concurrently executing the program code ahead of the primary strand using a subordinate strand in a scout mode. Upon resolving a branch using the subordinate strand, the system records a resolution for the branch in a speculative branch resolution table. Upon subsequently encountering the branch using the primary strand, the system uses the recorded resolution from the speculative branch resolution table to predict a resolution for the branch for the primary strand. Upon determining that the resolution of the branch was mispredicted for the primary strand, the system determines that the subordinate strand mispredicted the branch. The system then recovers the subordinate strand to the branch and restarts the subordinate strand executing the program code.

Abstract: A system that solves a parametric multi-objective optimization problem in a combined design space and parameter space using interval techniques is described. The design space contains design-space variables fixed for a selected design; the parameter space contains variable parameters for the selected design. Multiple-objective functions are specified for optimization.

Abstract: One embodiment of the present invention provides a system that uses a zooming effect to provide additional display space to manage applications. In one mode of operation, the system presents an image of a computer desktop to the user on a display device. When the system receives a request from a user to provide additional display space in a display device for application management purposes, the system decreases the size of the computer desktop in the display device to provide an extended display area. The system then facilitates application management by displaying items useful for application management in this extended display area. By providing the extended display area, the system allows the user to access such items easily and efficiently without losing the context of the computer desktop.

Abstract: A method of resolving mutex contention within a network interface unit which includes providing a plurality of memory access channels, and moving a thread via at least one of the plurality of memory access channels, the plurality of memory access channels allowing moving of the thread while avoiding mutex contention when moving the thread via the at least one of the plurality of memory access channels is disclosed.

Abstract: One embodiment of the present invention provides a system that performs thread migration within an array of computing nodes, wherein computing nodes in the array contain central processing units (CPUs) and/or memories. During operation, the system identifies CPUs within the array of computing nodes that are available to accept a given thread. For each available CPU, the system computes an average communication distance between the CPU and memories which are accessed by the given thread. Next, the system determines whether to move the given thread to an available CPU based on the average communication distance for the available CPU.

Abstract: Embodiments of a system for regulating an efficiency of a power supply in a computer system are described. During operation, the system measures an output load of the power supply using one or more telemetry monitors in the computer system. Then, the system determines if an efficiency of the power supply corresponding to the measured output load is within a predetermined range that includes an optimal efficiency of the power supply. If the efficiency is outside of the predetermined range, the system performs remedial action so that the power supply operates at an adjusted efficiency that falls within the predetermined range.

Abstract: Some embodiments of the present invention provide a system that controls a cooling fan for a storage array. During operation, an input-output (I/O) metric of the storage array is monitored. Then, the cooling fan is controlled based on the I/O metric.

Abstract: Some embodiments of the present invention provide a system that generates a simulated vibration pattern in a computer subsystem. During operation, a vibration pattern is monitored at a location in the computer subsystem, wherein the vibration pattern is monitored while the computer subsystem is incorporated into the computer system and the computer system is operating. Then, the vibrations of the computer subsystem are mimicked by generating the simulated vibration pattern at the same location in the computer subsystem based on the monitored vibration pattern.

Abstract: An apparatus or method for testing of a SOC processor device may minimize interference that is caused by interfacing a comparatively low-speed testing device with the high-speed processor during testing. Implementations may gate the input clock signal at the clock input to each domain of the SOC processor device rather than at the output of the PLL clock. The gating of the clock signal to each domain may then be controlled by clock stop signals generated by the testing device and sent to the individual domains of the processor device. Gating the clock signal at the domain may provide a more natural state for the circuit during testing as well as allow the test control unit to test the different domains of the SOC device individually.

Abstract: Some embodiments of the present invention provide a system that characterizes a response of a component in a computer system to vibrations generated by the computer system. First, the system measures the response of the component to vibrations in a frequency range while the component is located outside of the computer system. The system also measures vibrations generated by the computer system in the frequency range during operation of the computer system, wherein the vibrations are measured at a location in the computer system which is configured to receive the component. The system then characterizes the response of the component to vibrations generated by the computer system based on the measured response of the component to vibrations in the frequency range and the measured vibrations in the frequency range at the location.

Abstract: Systems and methods are described for authentication of tunneled connections.

Abstract: A method for analyzing a target system that includes obtaining a characteristics model, generating at least one selected from the group consisting of a schema, characteristics store API, and a characteristics extractor, using the characteristics model, obtaining a plurality of characteristics from the target system using characteristics extractor, wherein each of the plurality of characteristics is associated with the characteristics model, storing each of the plurality of characteristics in the characteristics store using the schema, and analyzing the target system by issuing at least one query to the characteristics store to obtain an analysis result.

Abstract: There is described an apparatus and method for implementing a communications port. The apparatus comprises a core, which is operable to divide the port into a plurality of sub-ports by dividing a data transfer capacity of the port among the plurality of sub-ports using time division multiplexing. Each sub-port is allocated a corresponding data transfer capacity.

Abstract: A method and apparatus for managing protocol information used in exchanging communications is provided. One or more protocol profiles are stored. Each of the protocol profiles is associated with a protocol. One or more transaction profiles are stored. Each of the transaction profiles identifies a combination of protocol profiles. One or more trading partner transaction profiles are stored. Each of the trading partner transaction profiles identifies a configuration of protocols for exchanging communications with a receiving party. After storing the profiles, a particular parameter value of a particular protocol profile is updated to identify an updated value without updating any of the transaction profiles. Updating the particular parameter value causes the updated value to be inherited by at least one of the transaction profiles. An application may obtain the updated value by accessing a profile that references the particular protocol profile.

Abstract: The invention relates to a method for performing generational garbage collection on a heap comprising a plurality of generations. The method involves dividing a young generation of the heap into a first young generation and a second young generation, evacuating the first young generation concurrently with allocating the second young generation, and evacuating the second young generation concurrently with allocating the first young generation and subsequent to fully evacuating the first young generation.

Abstract: An apparatus for enabling a connection over a serial interface is provided. The apparatus is a connector interface that includes a plurality of switches configured to cross-link signals to switch a straight-through connection to a null-modem connection. Additionally included is a microprocessor in communication with the plurality of switches, whereby the microprocessor is capable of interfacing with the plurality of switches to trigger the switch to the null-modem connection. Circuitry and a hardware implemented method for enabling a connection over a serial interface also are described.

Abstract: One embodiment of the present invention provides a system that constructs a classifier that distinguishes between different classes of data points. During operation, the system first receives a data set, which includes class-one data points and class-two data points. For each class-one data point in the data set, the system uses a separating primitive to produce a set of point-to-point separating boundaries, wherein each point-to-point separating boundary separates the class-one data point from a different class-two data point. Next, the system combines separating boundaries in the set of separating boundaries to produce a point-to-class separating boundary that separates the class-one data point from all of the class-two data points in the data set.

Abstract: A device includes a first semiconductor die having a first surface and a second surface. The first semiconductor die is configured to communicate by capacitive coupling using one or more of a plurality of proximity connectors proximate to the first surface. The first semiconductor die is configured to have a flexibility compliance greater than a first pre-determined value in a direction substantially perpendicular to a plane including the plurality of proximity connectors in order to reduce misalignment in the direction between the plurality of proximity connectors and additional proximity connectors on another device.