Abstract: A system and method of character input using a virtual keyboard, which may have a reduced number of keys. The virtual keyboard may be displayed on a touch screen and may include a plurality of keys. The virtual keyboard may have a plurality of keys, each key having a number of characters or symbols. Characters associated with a particular key may be selected through a series of related touch screen inputs.

Abstract: Some embodiments provide a system that analyzes telemetry data from a monitored system. During operation, the system obtains the telemetry data as a set of telemetric signals from the monitored system and groups the telemetry data into one or more clusters of correlated telemetric signals from the telemetric signals. Next, the system increases a bandwidth associated with monitoring the telemetric signals. To increase the bandwidth, the system omits one or more of the correlated telemetric signals from each of the clusters during sampling of the telemetric signals and estimates the omitted correlated telemetric signals by applying a nonlinear, nonparametric regression technique to the sampled telemetric signals.

Abstract: A system for characterizing vibration of a rack structure having at least one hard disk drive disposed therein and a vibration exciter operatively associated with the rack structure includes one or more computers. The one or more computers are configured to command the vibration exciter to provide vibration input to the rack structure and to command a plurality of reads from the at least one hard disk drive such that, for each of the plurality of reads, data stored on the at least one hard disk drive is retrieved from the at least one hard disk drive. The one or more computers are also configured to obtain read rate information related to the plurality of reads and to identify at least one resonant frequency of the rack structure based on the read rate information.

Abstract: A memory device that includes multiple blocks of static random access memory (SRAM), which each have a standby mode and an active operating mode, is described. During the active operating mode, a selection circuit couples a higher voltage from a first power-signal line and a power-supply circuit to a given block of SRAM, and during the standby mode the selection circuit couples a lower voltage from a second power-signal line to the given block of SRAM. Note that a regulator circuit regulates the lower voltage on the second power-signal line by selectively opening or closing a first switch between the first power-signal line and the second power-signal line. Furthermore, a recycling circuit selectively opens a second switch between the first switch and the first power-signal line when the block of SRAM transitions from the active operating mode to the standby mode, thereby transferring charge from the block of SRAM to other blocks of SRAM.

Abstract: A method for scrubbing a storage pool. The method includes loading a scrub queue with a number of identifiers corresponding to a number of datasets, selecting a first identifier from the scrub queue, where the first identifier corresponds to a first dataset, initiating a scrubbing of the first dataset. The method further includes, upon receiving an indication of a requirement to pause the scrubbing, pausing the scrubbing of the first dataset, creating a bookmark recording a last location within the first dataset that was scrubbed before pausing the scrubbing of the first dataset, detecting at least one change to a storage pool, and performing a modification in response to detecting the at least one change to the storage pool.

Abstract: Some embodiments of the present invention provide a system that acquires a lock in a shared memory multiprocessor system. During operation, the system loads the lock into a cache associated with the thread and then reads a value of the lock. If the value indicates that the lock is currently held by another thread, the system periodically executes an instruction that tests a status of the lock. If the status indicates the lock is valid, the system continues to test the status of the lock. Otherwise, if the status indicates that the lock was invalidated by a store, the system attempts to acquire the lock by executing an atomic operation. On the other hand, if the status indicates that the lock was invalidated by an atomic operation, or that the lock is not present in the cache, the system repeats the loading and reading operations.

Abstract: One embodiment provides a system that analyzes a target electromagnetic signal radiating from a monitored system. During operation, the system monitors the target electromagnetic signal using a set of antennas to obtain a set of received target electromagnetic signals from the monitored system. Next, the system calculates a weighted mean of the received target electromagnetic signals using a first pattern-recognition model. The system then subtracts the received target electromagnetic signals from the weighted mean of the received target electromagnetic signals to obtain a set of noise-reduced signals for the monitored system. Finally, the system assesses the integrity of the monitored system by analyzing the noise-reduced signals using a second pattern-recognition model.

Abstract: A system for dispatching a thread to a resource obtains a thread and utilization data for all resources. The system determines if there is a thread-resource affinity. The system uses thread-resource affinity to identify a resource and a timestamp for when the thread last completed executing on the resource. The system determines if the resource qualifies under a dispatch policy. The system uses utilization data to determine a timestamp for when the resource last transitioned to a not powered state. When the second timestamp precedes the first timestamp, the system dispatches the thread to the resource and generates a power management event. The system determines if the power management event satisfies a throttle policy. The system discards the power management event when throttle policy is unsatisfied and determines whether to adjust the current power state of the resource based on the power management event when throttle policy is satisfied.

Abstract: One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a failure state of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides an advice state associated with the recorded failure state to the program to facilitate a response to the transaction failure by the program.

Abstract: Some embodiments of the present invention provide a system for receiving packets on a multi-threaded computing device which uses a memory-buffer-usage scorecard (MBUS) to enable multiple hardware threads to share a common pool of memory buffers. During operation, the system can identify a memory-descriptor location for posting a memory descriptor for a memory buffer. Next, the system can post the memory descriptor for the memory buffer at the memory-descriptor location. The system can then update the MBUS to indicate that the memory buffer is in use. Next, the system can store a packet in the memory buffer, and post a completion descriptor in a completion-descriptor location to indicate that the packet is ready to be processed. If the completion-descriptor indicates that the memory buffer is ready to be reclaimed, the system can reclaim the memory buffer, and update the MBUS to indicate that the memory buffer has been reclaimed.

Abstract: The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO) enabling circuit coupled to the pulse generator circuit; and a disable signal coupled to the IDO enabling circuit. When the disable signal is asserted, the IDO enabling circuit is disabled and the pulse generator circuit is configured as a pulse generator. In contrast, when the disable signal is deasserted, the IDO enabling circuit is enabled and the pulse generator circuit is configured as part of an IDO.

Abstract: The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable signal is coupled to the test circuit. When the disable signal is asserted, the test circuit is disabled, and the pulse generator circuit outputs pulses of a predetermined duration. In contrast, when the disable signal is deasserted, the test circuit is enabled, and the pulse generator circuit outputs an oscillating signal.

Abstract: A method for transmitting packets, including forwarding a first set of upstream packets and a first set of local packets by inserting at least one of the first set of local packets between subsets of the first set of upstream packets according to a first insertion rate; calculating a second insertion rate after forwarding a predetermined number of upstream packets generated by a single upstream source, by dividing a cardinality of the first set of upstream packets by a greatest common divisor of the predetermined number and the cardinality of the first set of upstream packets; and forwarding a second set of upstream packets and a second set of local packets from the local switch to the downstream switch by inserting at least one of the second set of local packets between subsets of the second set of upstream packets according to the second insertion rate.

Abstract: An optical device that includes multiple optical modulators having actual operating wavelengths at a given temperature is described. Because of differences between the actual operating wavelengths and target operating wavelengths of the optical modulators, heating elements may be used to thermally tune the optical modulators so that the actual operating wavelengths match corresponding carrier wavelengths in a set of optical signals. Furthermore, control logic in the optical device may assign the optical modulators to the corresponding carrier wavelengths based at least on differences between the carrier wavelengths and the actual operating wavelengths, thereby reducing an average thermal tuning energy associated with the heating elements.

Abstract: In general, the invention relates to reclaiming transmit descriptors by configuring a media access control (MAC) to execute a first MAC layer thread to reclaim a first number of transmit descriptors (TDs) from a first hardware transmit ring (HTR) using a first reclaim algorithm, where the first reclaim algorithm is associated with a first transmission pattern and a first TDR status. The invention further includes receiving, by a virtual NIC (VNIC) executing within the MAC layer, a first number of packets, forwarding the first number of packets to a device driver on the host associated with the physical NIC, and forwarding the first number of packets from the device driver to the physical NIC using the first number of TDs, where the first plurality of TDs are reclaimed by the first MAC layer thread according to the first reclaim algorithm.

Abstract: A method and system for creating and executing tasks within a multithreaded application composed according to the OpenMP application programming interface (API). The method includes generating threads within a parallel region of the application, and setting a counter equal to the quantity of the threads. The method also includes, for each one of the plurality of threads, assigning an implicit task, and executing the implicit task. Further, the method includes, upon encountering a task construct, during execution of the implicit tack, for an explicit asynchronous task generating the explicit asynchronous task, adding the explicit asynchronous task to a first task queue, where the first task queue corresponds to the one of the plurality of threads; and incrementing the counter by one.

Abstract: A computer readable medium that includes computer readable program code embodied therein. The computer readable medium causes the computer system to receive, by a data link rule enforcer, a packet from a packet source of the packets, and obtain a data link rule applying to a data link. The data link is operatively connected to the packet source, and the data link is associated with a media access control (MAC) address. The computer readable medium further causes the computer system to determine, by the data link rule enforcer, whether the packet complies with the data link rule, and drop, by the data link rule enforcer, the packet when the packet fails to comply with the data link rule.

Abstract: Some embodiments of the present invention provide a system for packet classification and spreading in a virtualized system. The system can use information in a packet's header to determine a destination system-image in the virtualized system, and a packet-spreading policy for the destination system-image. The system can determine a key using the information in a packet's header. Alternatively, the system can hash the information in the packet's header to obtain an index value. Next, the system can use the key or the index value to perform a lookup in a table which associates keys or index values with system images and/or packet-spreading policies. Once the destination system-image and the packet-spreading policy are determined, the system can deliver the packet to a thread on the destination system-image according to the packet-spreading policy.

Abstract: One embodiment provides a system that protects translated guest program code in a virtual machine that supports self-modifying program code. While executing a guest program in the virtual machine, the system uses a guest shadow page table associated with the guest program and the virtual machine to map a virtual memory page for the guest program to a physical memory page on the host computing device. The system then uses a dynamic compiler to translate guest program code in the virtual memory page into translated guest program code (e.g., native program instructions for the computing device). During compilation, the dynamic compiler stores in a compiler shadow page table and the guest shadow page table information that tracks whether the guest program code in the virtual memory page has been translated. The compiler subsequently uses the information stored in the guest shadow page table to detect attempts to modify the contents of the virtual memory page.

Abstract: A memory system that interleaves storage of data across and within a plurality memory modules is described. The memory system includes a hybrid interleaving mechanism which maps physical addresses to locations within memory modules and ranks so that physical addresses for a given page all map to the same memory module, and physical addresses for the given page are interleaved across the plurality of ranks which comprise the same memory module.