Abstract: Computing apparatus including a housing that defines a cavity. The computer apparatus further includes within the cavity multiple computing components, such as a processor, memory, and so on, and a fan for generating an airflow to cool these components. There is a first path defining an air inflow for the fan, and a second path defining an air outflow for the fan. One of these paths is externally ducted to a vent facility in a first wall of the housing, and the other one of the paths communicates with the cavity adjacent the first wall. Typically, the externally ducted airflow is arranged to cool a CPU, which is the component most vulnerable to over-heating.

Abstract: A method and apparatus for assigning a set of region-based voltage drop budgets to an integrated circuit is provided. Further, a method for partitioning an integrated circuit into optimal voltage drop regions includes analyzing the integrated circuit for worst-case voltage drop data. The worst-case voltage drop data is used to partition the integrated circuit into a set of voltage drop regions, wherein each voltage drop region is assigned a region-based voltage drop budget. The region-based voltage drop budget assigned to a particular voltage drop region is based on a worst-case voltage drop experienced by that voltage drop region.

Abstract: One embodiment of the present invention provides a system that solves a problem involving an interval parameter p through an interval solution process. During operation, the system receives a representation of the problem, wherein the problem includes a number of variables x1, x2, x3, . . . xn and at least one interval parameter p. The system stores the representation in a computer memory, and then performs the interval solution process on the problem. During this interval solution process, the system splits the problem into sub-problems by splitting the interval parameter p into subintervals, and creating separate sub-problems for each subinterval. The system then performs the interval solution process on the sub-problems. By splitting the interval parameter p, the system can achieve a tighter bound on the solution set of the problem. The decision to split on any parameter p is made in exactly the same way it would be made if p were a variable of the problem.

Abstract: One embodiment of the present invention provides a system for predicting hot spots in a cache memory. Upon receiving a memory operation at the cache, the system determines a target location within the cache for the memory operation. Once the target location is determined, the system increments a counter associated with the target location. If the counter reaches a pre-determined threshold value, the system generates a signal indicating that the target location is a hot spot in the cache memory.

Abstract: A system and method for providing security for newly spawned spaces in a distributed computing environment. A client may access a first space service. The creation of a second space may be requested, such as by the client sending an appropriate request to an interface of the first space. In one embodiment, the first space and second space may share a common storage model, storage facility, and/or XML schema. The second space may initially be configured to permit access only to the requesting client. In one embodiment, a root authentication token is created for the second space. An authentication service associated with the second space may be initialized, whereby the second space is configured to permit access only to a client holding the root authentication token. The root authentication token may be sent to the requesting client or service. The requesting client may send the root authentication token to a second client.

Abstract: A high-speed semi-dynamic flip-flop circuit uses a keeper transistor to replace the back-to-back inverter keeper circuit of prior art semi-dynamic flip-flop circuits to avoid the fight between a first node, or OUTBAR node, and the prior art back-to-back inverter keeper circuit. The result is a faster semi-dynamic flip-flop circuit that is also immune to noise.

Abstract: Apparatus representing a computer system or such-like is disclosed that includes a hierarchy of field replaceable units (FRUs). Each FRU in the hierarchy has a type, and may have a number of subsidiary FRUs. A FRU stores data indicative of at least the number and type of any subsidiary FRUs that may be immediately below it in the hierarchy, as well as data concerning the identity of the FRU itself. The apparatus has a utility to allow access and consolidation at a single location of all the FRU data stored in the hierarchy. In one embodiment, this utility is provided in the form of a configuration application running on a service processor of the apparatus.

Abstract: A mechanism is disclosed for migrating a file sequence from a first workspace managed by a first workspace management system into a second workspace managed by a second workspace management system. To carry out the file sequence migration, the mechanism does not implement a format conversion process. Instead, the mechanism invokes and exploits the functionality provided by the workspace management systems. By avoiding the format conversion process, the mechanism is able to carry out the migration process much more easily and cost effectively.

Abstract: In a data cache unit that exchanges data signal groups with at least two execution units, the operation of the data cache unit is implemented as a three-stage pipeline in order to access data at the speed of the system clock. For a READ operation, virtual address components are applied to a storage cell bank unit implemented in SAM technology to begin access of the storage cells with the data signal group identified by the virtual address components. The virtual address components are also applied to a microtag unit, the microtag unit identifying a subgroup of the signal group identified by the address components. Simultaneously, the virtual address is formed from the two virtual address components and applied to a translation table unit, to a valid-bit array unit, and to a tag unit. The translation table unit and the tag unit determine whether the correct data signal subgroup identified by the address signal group is stored in the data cache memory unit.

Abstract: A directory server includes a supplier server, a consumer server in communication with the supplier server, a plurality of pluggable services that manage replication of data contained within the directory server from the supplier server to the consumer server, and a change log maintained on the consumer server of data replicated to the consumer server. The replication of data is managed by the plurality of pluggable services using the change log.

Abstract: A memory controller comprises a check bit encoder circuit and a check/correct circuit. The check bit encoder circuit is coupled to receive a data block to be written to a memory comprising a plurality of memory devices, and is configured to encode the data block with a plurality of check bits to generate an encoded data block. The plurality of check bits are defined to provide at least: (i) detection and correction of a failure of one of the plurality of memory devices; and (ii) detection and correction of a single bit error in the encoded data block following detection of the failure of one of the plurality of memory devices. The check/correct circuit is coupled to receive the encoded data block from the memory and is configured to decode the encoded data block and perform at least the detection of (i) and (ii) on the encoded data block.

Abstract: A coherence prediction mechanism includes a history cache for storing a plurality of cache entries each storing coherence history information for a corresponding block of data. Entries in the history cache are used to index into a pattern memory containing coherence predictions.

Abstract: A method and apparatus for adjusting clock skew involves sensing a temperature at a location on an integrated circuit. A temperature sensor indicates a temperature value of the location on the integrated circuit. The temperature value is monitored, and a tunable buffer is adjusted dependent on the monitoring. The tunable buffer is used to adjust clock skew.

Abstract: A method of predicting whether a failure of an electrical device may occur if a receiver within the electrical device is subjected to an electrical noise pulse. The method may include locating an integrated circuit that drives the receiver and locating an integrated circuit that is driven by the receiver, the integrated circuit that is driven by the receiver having a circuit type and a capacitance. The method may also include selecting a plurality of noise-tolerance curves and then selecting one of the plurality of noise-tolerance curves. The method may also include selecting a set of noise-propagation constants and then selecting a noise-propagation constant from the set of noise-propagation constants. The method may further include generating an offset noise-tolerance curve by offsetting the selected one of the plurality of noise-tolerance curves by the noise-propagation constant, determining a noise-tolerance for the receiver; and then comparing the noise-tolerance to the amplitude of the noise pulse.

Abstract: A system and method for monitoring the configuration and/or status of target devices on a network. The system comprises a monitoring application that can be run on a first network device. The monitoring application is configured to monitor one or more target devices on the network using data collector modules that run on the target devices. The data collector modules are launched on the target devices by the monitoring application and are configured to collect configuration and/or status information about the target devices. After collecting the data, the data collector modules preferably pass the data back to the first network device, where a data upload application receives the data and uploads it to a central site. The data at the central site is placed in a database for access by users or clients. Users can access the data in the database by communicating with the central site, for example, via a dial-up connection or via the Internet.

Abstract: One embodiment of the present invention provides a system that amplifies capacitively coupled inter-chip communication signals. During operation, the system transmits a signal through a capacitive transmitter pad and receives a corresponding input signal through a capacitive receiver pad. The system amplifies the input signal by feeding it through a number of cascaded CMOS inverters operating from ever-increasing power supply voltages from the first to the last inverter.

Abstract: Various systems and methods for using a directory based coherency protocol in a system that employs a split ownership and access right cache coherence mechanism are disclosed. A computer system may include a directory, several active devices configured to access data, an address network configured to convey coherence requests point-to-point between the active devices and the directory, and a data network configured to convey data between the active devices. Each active device includes a cache configured to store data accessed by that active device. An ownership responsibility and an access right associated with a first coherency unit in a first cache transition at different times.

Abstract: A server-centric approach is disclosed for enabling a browser to handle content types that it cannot inherently process. Rather than executing plug-ins on a client, pluglets are executed on one or more servers. A pluglet can perform any function that a plug-in can perform. Because a pluglet resides and executes on a server, the shortcomings of the plug-in approach are overcome. Specifically, a client no longer needs to have large amounts of storage and processing resources since pluglets do not run on clients. Also, a user no longer needs to install plug-ins on a client. In addition, maintenance of the overall system is greatly simplified. To replace, add, or remove functionality, all that needs to be done is to replace, add, or remove pluglets from a relatively small number of servers. It is no longer necessary to maintain plug-ins on a relatively large number of clients.

Abstract: A certification authority generates certificates in response to respective certification requests. The certification authority generally includes a computer that is bootable from a removable medium and a removable medium. The removable medium includes a machine readable medium having encoded thereon an operating system module configured to enable the computer to boot from the removable medium and a certificate generation module configured to, after the computer has been booted, control the computer to facilitate the generation of at least one certificate in response to an associated certificate request, the certification authority module being configured to provide that the computer not be remotely controlled during a certificate generation session.

Abstract: A digital crossbar switch utilizes an asynchronous RAM to provide high density and low latency storage and a write enable pulse generator to generate write enable pulses that are independent of the clock signal duty cycles. The crossbar switch includes a plurality of ports coupled to a bus, at least one memory element coupled to one of the plurality of ports, and a circuit for generating a write enable pulse coupled to each of the memory element. The circuit for generating the write enable pulse includes a pulse generator for generating a pulse, the pulse tracking a leading edge of a clock signal, a write enable signal generator for generating a write enable signal, and a first logic circuit coupled to the pulse generator and the write enable signal generator for generating the write enable pulse by combining the pulse and the write enable signal.