Abstract: A method and apparatus for testing for latent faults in the isolation devices of a system including redundant power supplies which supply power to one or more system units. A system controller is operable to perform a test cycle to perform the fault checks, which may including checks for short circuits and/or open circuits. The checks may be performed within a test cycle in which each of the isolation devices in the system is tested. The test cycle may be performed at regular intervals, the interval between each cycle being determinable by user input. In the event that a fault in one of the isolation devices is detected, the system controller may be operable to report the fault to an alarm system.

Abstract: Provided are a method, system, and program for monitoring a system including a plurality of subcomponents. An implementation of a plurality of subcomponent finite state machines for subcomponents of the system is provided, wherein each subcomponent finite state machine indicates output values for combinations of input state values related to states in the subcomponent. An implementation of a system finite state machine having output values for combinations of the output values from the subcomponent finite state machines is provided. For each subcomponent finite state machine, a determination is made of the output value by determining the input state values of the subcomponent, processing the subcomponent finite state machine with the determined input state values to determine the subcomponent output value, and processing the system finite state machine with the determined subcomponent output values to determine the system output value.

Abstract: Communications bandwidth available to network servers and computers running client processes is allocated among connections available to those devices based on sets of priorities. Those priorities include type of information being retrieved, how fast user connections can receive information, which part of a document is being transmitted, user identity, stored indicia indicating importance of the document and the state of application processes running on said computer. Bandwidth is reallocated on an event driven basis upon arrival of a new request for retrieval, finishing sending information in response to a retrieval request, cancellation of a retrieval request, detection of the inability of a user connection to use all of the bandwidth allocated to it, a change of priority and timeout of a timer.

Abstract: One embodiment of the present invention provides a system for controlling cache line eviction. The system operates by first receiving a sequence of instructions at a processor during execution of a program, wherein the sequence of instructions causes a cache line to be loaded into the cache. Next, the system examines the sequence of instructions to determine if an associated cache line includes only scratch data that will not be reused. If so, upon loading the cache line into the cache, the system marks the cache line as containing only scratch data, which allows the cache line to be evicted next from the cache.

Abstract: A method for modeling an enterprise application to be performed over multiple tiers in a distributed computer system. The method includes generating a model, such as a sequence diagram, of the enterprise application showing the tiers with standard responsibilities assigned to a client tier, a Web tier, a business logic tier, and an enterprise information system tier. The standard functions are assigned by identifying protocol services and mapping these to the tiers. Business functions for the application are identified with use cases. The basic business services are then mapped to the enterprise application model. This model is then further modified, such as by subdividing the tiers into subtiers, and mapping the detailed business services to the appropriate tiers. The method continues with identifying of architectural goals or capabilities and modifying of the enterprise application model to map or implement the architectural services associated with each goal to the tiers.

Abstract: Methods and systems for load balancing a plurality of entities, such as firewalls, in a network environment are disclosed. In particular, the load balancing of firewalls on a bidirectional traffic path is performed using a single device that controls both incoming and outgoing traffic through the firewalls. The single device may include virtual routers for controlling the bidirectional traffic through the firewalls. A first virtual router may control incoming traffic to the firewalls and the other virtual router may control outgoing traffic to the firewalls. The virtual routers are logical partitions of the device layered on the physical resources of the device. The virtual routers share all or portions of the physical resources of the single device.

Abstract: A host may be coupled to a fabric network. Fabric devices attached to the fabric network may be visible to the host through one or more host adapter ports. The host system may include a device centric discovery interface configured to provide an interface to a fabric driver to obtain information about the devices in the fabric network. The device centric discovery interface may be configured to return device centric discovery information such that a multi-path fabric device is presented as a single device with transport information provided for each path to the multi-path device. A device centric configuration interface may provide an interface to the fabric driver for device centric configuration of the devices in the fabric for use by the host such that a requested fabric device is configured for use by the host on multiple paths in the fabric network.

Abstract: Provided is a computer implemented method, system, and program for discovering a topology of a switch from an initiator device. The switch includes a plurality of switch ports. A plurality of Input/Output (I/O) devices are connected to the switch ports, wherein each I/O device and the initiator device connect to the switch through one of the switch ports. The initiator and I/O devices communicate on a first network configured by the switch and the initiator device communicates with the switch over a second network. The initiator device performs submitting a first query over the first network to the switch requesting a unique address of a plurality of I/O devices that are accessible to the initiator device over the first network. In response to the first query to the switch on the first network, the unique address of each I/O device is received from the switch. A second query is submitted over the second network to the switch for information on switch ports on the switch.

Abstract: Structures for providing devices that include resistive paths specifically designed to provide a predetermined resistance between the bulk material of the device and a well tie contact. By providing a resistive path, an equivalent RC circuit is introduced to the device that allows the bulk material potential to track the gate potential, thereby advantageously lowering the threshold voltage as the device turns on and raising the threshold voltage as the device turns off. In addition, the introduction of the resistive path also allows the bulk material potential to be controlled and stabilize at an equilibrium potential between switching events.

Abstract: A method of assigning a buffer size in a video decoder includes the step of establishing a first buffer size for a scalable buffer. A video data stream is then processed with the scalable buffer configured to the first buffer size. A second buffer size is then selected for the scalable buffer. The video stream is then processed with the scalable buffer configured to the second buffer size. Memory utilization data characterizing memory performance during processing with the scalable buffer at the first buffer size and the second buffer size is then created. Afterwards, a buffer size is assigned for the scalable buffer in accordance with the memory utilization data.

Abstract: A system may perform interconnect BIST (IBIST) testing on source synchronous links. The system may perform, at normal operating frequency, a source synchronous link test that tests a victim line on the source synchronous link using a transition weave pattern. The transition weave pattern causes interaction between a data transition on the victim line, previous transitions on the victim line, and transitions on the other lines of the link (the “aggressor” lines). The interaction caused may be: (i) a first crossing pulse on the victim line; (ii) a second crossing pulse of the opposite polarity on each aggressor line concurrent with the first crossing pulse on the victim line; and (iii) a reflection in the opposite direction of the first transition of the first crossing pulse, wherein the reflection results from a previous transition on the victim line.

Abstract: A multi-threaded garbage collector operates in increments and maintains, for each of a plurality of car sections in which it has divided a portion of the heap, a respective remembered set of the locations at which it has found references to objects in those car sections. It stores the remembered sets in respective hash tables, whose contents it updates in a scanning operation, executed concurrently by multiple threads, in which it finds references and records their locations in the appropriate tables. Occasionally, one of the threads replaces the hash table for a given car section. Rather than wait for the replacement operation to be completed, a thread that has an entry to be made into that car section's remembered set accesses the old table to find out whether the entry has already been made. If so, no new entry is necessary. Otherwise, it places an entry into the old table and sometimes places an insertion record containing that entry into a linked list associated with that car section.

Abstract: A light guide for an interconnecting device. The light guide comprises a first section having a Fiber Channel connector disposed therein and a second section having a Fiber Channel receptacle disposed therein. The second section is coupled to the first section. A mirror section is disposed within either the second section or the first section to direct light out the Fiber Channel receptacle.

Abstract: A method is provided for the precise reporting of errors in a flow of successive messages. The method includes detecting a transmission error in a message and then deferring the reporting of the transmission error. The method defers the reporting of the transmission error by saving a sequence number for the message and by setting a deferred error flag in a state saved for the flow. The method processes the deferred transmission error when it receives an acknowledgement that completes an immediately preceding message in the flow. When a positive acknowledgement is received, the deferred transmission error is reported. When a negative acknowledgement is received, the deferred transmission error is ignored and a remote error is reported.

Abstract: An improved power fail-safe has an effective maximum delay of two gate delays from an input operably powered by a first power supply to a first and a second output operably powered by a second power supply. The first and second outputs have predetermined values during an interval when the first power supply has failed and the second power supply is active. The first and second power supplies may be based at least in part on different power domains. The first power supply may be based at least in part on a core power domain and the second power supply may be based at least in part on an I/O power domain.

Abstract: A system and method for assigning operations to multiple pipelines in a graphics system is disclosed. The graphics system may include an arbitration unit coupled to a plurality of calculation pipelines. The arbitration unit is operable to provide graphics operations to selected ones of the calculation pipelines. Each of the calculation pipelines is operable to perform a graphics operation. Each of the calculation pipelines may include digital logic and/or a processing element for performing the graphics operations. An operation may be assigned to a pipeline if the pipeline is performing a low latency operation. A low latency operation may comprise an operation that is performed by one of the calculation pipelines in less time than a pre-determined number of clock cycles.

Abstract: Techniques for customization of Java runtime environments are disclosed. The techniques can be used to provide Java runtime environments that are specifically tailored for various Java applications. Accordingly, for a particular Java application, an optimized runtime environment can be created. One or more optional attributes which represent the desired runtime customizations are generated. As will be appreciated, the optional attributes can be generated in the attribute table in the class file. The optional attributes can then be parsed and appropriate features can be loaded into the virtual machine. In this way, Java runtime environments can be customized based on a particular Java application requirement. Moreover, customizations can be automated using a runtime performance manager that interacts with various other components that operate to first generate and then load optional attributes into the Java runtime environment.

Abstract: A large multimaster I2C bus system is partitioned into smaller bus segments. The bus segments are connected by bridges that isolate the segments and direct selected transactions and commands between the segments. By programming address bitmaps that are internal to each bridge, transactions can pass through the bridges so that the various bus segments appear to be one logical bus. Because each bridge implements address filtering so that transactions are selectively forwarded from one side of the bridge to the other based on the contents of an internal address bitmap, I2C slave addresses can be arbitrarily populated on either side of the bridge. Duplicate I2C slave addresses can be also used on different segments of a single logical I2C bus system. Masters on one segment can reach devices connected to the same bus segment and can also reach devices with duplicate addresses on other bus segments by using a tunnel command addressed to a bridge.

Abstract: A logarithm unit computes an integer part of a logarithm of a floating point operand according to an embodiment of the present invention. The logarithm unit analyzes a format of the floating point operand and generates at least one signal representative of the format. The logarithm unit determines a magnitude of an unbiased exponent of the floating point operand as an intermediate result based on the at least one signal, wherein the unbiased exponent is represented by unbiased exponent bits. Still further, the logarithm unit determines an exponent field and a fraction field high part of the intermediate result.

Abstract: The present invention provides an apparatus and method for displaying information on the keys of a keyboard. The method includes receiving a request to change the configuration of the keyboard from a first configuration to a second configuration. The method further includes determining information to display on the keys of the keyboard in the second configuration, and displaying the information on the keys of the keyboard.