Abstract: A system and a method for simultaneously managing a local transaction and a global transaction in an application server. In one embodiment, a system may manage a first transaction, from a first application component, as a local transaction and also manage a second transaction, from a second application component, as a global transaction. In one embodiment, the first transaction and the second transaction may be managed from the same instance of the application server.

Abstract: An overload manager device including a monitoring function for evaluating successive values of the server operation parameter as a function of time, a first logic function capable of evaluating a first condition, which involves whether the server operation parameter passes a first threshold value in a first direction, a second logic function capable of evaluating a second condition, which involves whether a server operation parameter passes a second threshold value in a second direction, with the second direction being opposite to the first direction, and extending from the first threshold value to the second threshold value, and a request supervisor operable for starting rejection of input requests, upon verification of a third condition, related to the verification of at least one of the first and second conditions, and terminating rejection of the input requests upon verification of a fourth condition related to the verification of the second condition.

Abstract: One embodiment of the present invention provides a system that displays and facilitates browsing through a sparse view of content items in a hierarchy. First, the system receives a request to display a set of content items with a common parent in a hierarchy. If the display area has insufficient space to display some of the items, the system logically splits the content items into a first subset of content items and a distinct second subset of content items. The system then displays the first subset, and displays a search element that represents the second subset. When the system detects the selection of the search element by a user, the system initiates a search operation that allows the user to determine and select a desired item from the second subset.

Abstract: A distributed network identity is provided. An identity provider stores a portion of a user's personal information. A service provider accesses user information from one or more identity providers. System entities such as identity providers and service providers can be linked to enable information sharing and aggregation. User policies and privacy preferences are provided to control how information is shared. A single sign-on architecture is provided where an identity provider is used to facilitate cross-domain authentication and to enhance user convenience. Service delegation features are also provided.

Abstract: A system that diagnoses a failure in a computer system is described. During operation, the system tests the computer system using a sequence of tests, where a given test includes a given load associated with a pre-determined failure mechanism for a given failure condition. During the given test, the system obtains results, which include telemetry signals that are monitored within the computer system. If the results indicate the given failure condition, the system ceases the testing and indicates that the computer system has the given failure condition. Otherwise, the system continues the sequence of tests until the sequence is completed, at which point, if no fault has been detected, the system indicates that a no-trouble-found (NTF) condition exists.

Abstract: An in-system memory testing method includes transparently selecting and “stealing” a portion of memory from the memory system for running memory tests, then running one or more of the numerous known memory system tests on the selected portion of memory, and then inserting the selected, and now tested, portion of memory back into the system for normal application use. The disclosed in-system memory testing method is capable of testing system memory in both offline and online environments, without imposing any additional hardware requirements or significantly affecting system performance. The disclosed in-system memory testing method is compatible with any conventional prior art functional test algorithm for in-system memory testing and can be performed under real life system environmental conditions. Therefore, the disclosed in-system memory testing method complements other test techniques like BIST/POST that are conventionally used only at the time of system boot up.

Abstract: A system and method for implementing flow control, at the link and/or transport layers, for InfiniBand receive traffic. A shared memory structure may be used for combined queuing of virtual lane and queue pair traffic. Each virtual lane is allocated a number of memory buffers; a packet is dropped if buffering it would cause its virtual lane to exceed its allocation of buffers. For each active queue pair, a linked list of buffers is maintained in the structure. Each queue pair is dedicated zero or more of its virtual lane's buffers, and may also use a set of buffers shared among multiple queue pairs. Thresholds are established in a queue pair's dedicated set of buffers and/or the shared set of buffers. As each threshold number of buffers is used, a queue pair can advertise fewer message credits. RNR-NAKs are issued when no more buffers are available to a queue pair.

Abstract: One embodiment of the present invention provides a system that prevents data hazards during simultaneous speculative threading. The system starts by executing instructions in an execute-ahead mode using a first thread. While executing instructions in the execute-ahead mode, the system maintains dependency information for each register indicating whether the register is subject to an unresolved data dependency. Upon the resolution of a data dependency during execute-ahead mode, the system copies dependency information to a speculative copy of the dependency information. The system then commences execution of the deferred instructions in a deferred mode using a second thread.

Abstract: In an interconnect apparatus for interconnecting at least one host to at least a plurality of presentation registers provide a presentation interface for the device to the host. The interconnect apparatus includes memory for holding the presentation registers and a governor operable to manage the presentation registers in the memory.

Abstract: One embodiment of the present invention provides a system that uses a computer to evaluate a function within a domain using an interval computing technique. During operation, the system receives the function and the domain over which the function is to be evaluated. Next, the system creates a set of sampling subdomains within the domain by generating a set of boxes of different sizes which are located at different positions across the domain. The system then performs evaluations on the set of sampling subdomains to generate evaluation results. Next, the system sorts the evaluation results based on box size. The system then selects a box size from the different box sizes by identifying a largest box size which achieves tight bounds on the evaluation results. The system next discretizes the domain into subdomains of the selected box size.

Abstract: A technique maintains return address stack (RAS) content and alignment of a RAS top-of-stack (TOS) pointer upon detection of a tail-call elimination of a return-type instruction. In at least one embodiment of the invention, an apparatus includes a processor pipeline and at least a first return address stack for maintaining a stack of return addresses associated with instruction flow at a first stage of the processor pipeline. The processor pipeline is configured to maintain the first return address stack unchanged in response to detection of a tail-call elimination sequence of one or more instructions associated with a first call-type instruction encountered by the first stage. The processor pipeline is configured to push a return address associated with the first call-type instruction onto the first return address stack otherwise.

Abstract: An automatic phase detection circuit for generating an internal synchronization signal when two clock input signals achieve a certain phase relationship. No external reference signal is required. The logic state of one clock is sampled on the active edge of the other clock and stored in a shift register. The content of the shift register is compared to a pre-defined signature and a sync signal is generated when the content matches the pre-defined signature. A mask register may be used to define which bits of the shift register and pre-defined signature are compared.

Abstract: A method for retrieving a logical block, including receiving a request to read the logical block, and obtaining metadata associated with the logical block, wherein the metadata includes a replication type used to store the logical block and physical block locations in a storage pool for each physical block associated with the logical block. The method further includes obtaining power state information including a power state for the storage devices specified in the physical block locations, selecting a first set of physical block locations using the metadata, the power state information, and a power-usage selection policy, and generating I/O requests, where each I/O request specifies one of the first set of physical block locations. The method further includes issuing the I/O requests, receiving physical blocks in response to the I/O requests, and constructing the logical block using the physical blocks.

Abstract: A method for installing software involves obtaining a knowledge package including guidelines for obtaining and installing software deliverables, and simulating installation of the software deliverables on a managed host based on the guidelines in the knowledge package. Simulating installation of the software deliverables involves obtaining the software deliverables based on the guidelines in the knowledge package, caching the software deliverables on the managed host to obtain a local installation cache, and obtaining a response to an installation prompt associated with at least one of the software deliverables. The method further involves performing an actual installation of the software deliverables on the managed host using the local installation cache and the response to the installation prompt.

Abstract: A system and method for using an opaque group within a federated identity management environment, to prevent disclosure of identities of the group. An opaque group is constructed at an identity provider within the system and has a group identity that references primary system identities of its members (e.g., electronic mail addresses, public key certificates, network addresses). Services to the group (e.g., distribution of an object such as a document or electronic mail message, invitation to an online meeting, authentication as a member of the group) can be requested from service providers, but because service providers do not have access to members' primary identities, the service providers forward the requests to an identity provider that has access to the group identity. That identity provider retrieves the members' identities and completes the action.

Abstract: A method for dynamic intent logging in a file system. The method including pre-allocating a first log block, receiving a request to write a first set of deltas into a dynamic intent log, determining whether a size of the first set of deltas is larger than a size of the first log block, if the size of the first set of deltas is not larger than the size of the first log block, storing the first set of deltas in the first log block and pre-allocating a second log block.

Abstract: In accordance with one embodiment of the present invention, there are provided mechanisms and methods for implementing concurrent generation of an a-box and a t-box for use in a computing environment comprising a knowledge system. A t-box comprises categories and relationships about the categories and an a-box, comprising assertions of individual instances of the categories of the t-box. With these mechanisms and methods, it is possible to process structured information into a form usable by a knowledge engine.

Abstract: A system may include a device configured to initiate a transaction by sending an address packet and an additional device configured to respond to the address packet. The additional device is coupled to receive the address packet from the device via an address network. The address packet includes a mask field configured to indicate which of N quantities of data are targeted by the transaction. The address packet also includes a granularity field configured to indicate a size of each of the N quantities of data. If the size is less than a maximum size, a portion of the granularity field stores additional address bits of an address of the N quantities of data. If the size is the maximum size, none of the granularity field stores any additional address bits of the address of the N quantities of data.

Abstract: A method for routing an incoming service request is described wherein the service request is routed to a selected storage tier based on that selected storage tier having a predicted value indicating a state having greater utility as compared with the predicted value of the state associated with at least one other storage tier within the storage system. A computer system comprising a multi-tier storage system is described, the multi-tier storage system having a routing algorithm configured to adaptively tune functions which map variables describing the state of each storage tier of the storage system into the average latency experienced by incoming service requests associated with the storage tier.

Abstract: In one embodiment, a cache memory system includes a cache memory coupled to a cache controller. The cache memory controller may receive an address and generate an index value corresponding to the address for accessing a particular entry within the cache memory. More particularly, the cache controller may generate the index value by performing a hash function on a first portion of the address such as an address tag, and combining a result of the hash function with a second portion of the address such as an index, for example.