Patents Assigned to Sun Microsystems
  • Patent number: 6448829
    Abstract: A low hold time flip-flop that has a dynamic input stage and a static output stage is provided. The flip-flop uses a feedback stage to maintain a value on a dynamic node during an evaluation phase of the flip-flop so that an input to the flip-flop only has to be held for a relatively short period of time after the start of the evaluation phase.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Ritesh Saraf
  • Patent number: 6449711
    Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide a development tool that enables computer programmers to design and develop a data flow program for execution in a multiprocessor computer system. The tool displays an interface that enables the programmer to define a region divided into multiple blocks, wherein each block is formed of a set of values associated with a function, and to define sets of the blocks, each block in a set having a state reflected by a designated portion of the program that when executed transforms the values forming the block based on the function. The interface also records any dependencies among the blocks, each dependency indicating a relationship between two blocks and requiring the portion of the program associated with a first block of the relationship to be executed before the portion of the program associated with a second block of the relationship.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Jeremy Week
  • Patent number: 6449754
    Abstract: A technique measuring accuracy of parasitic capacitance extraction defines the error in an extracted total net parasitic capacitance intended for timing analysis as a sum of the errors in the extracted values of the individual capacitance elements, with the error for each element being influenced by a weight factor. Similarly, the technique defines an error in the extracted value of a crosstalk factor for the net of interest as a difference between the errors in the extracted values of the individual capacitance elements, with the error in each element being influenced by a weight factor. For signal timing and crosstalk analyses, the weight factors allow a designer to focus calibration of the extraction tool on the capacitive element having the highest weight factor.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Eileen H. You, Weize Xie, John F. MacDonald
  • Patent number: 6449641
    Abstract: Cluster membership in a distributed computer system is determined by determining with which other nodes each node is in communication and distributing that connectivity information through the nodes of the system. Accordingly, each node can determine an optimized new cluster based upon the connectivity information. Specifically, each node has information regarding with which nodes the node is in communication and similar information for each other node of the system. Therefore, each node has complete information regarding interconnectivity of all nodes which are directly or indirectly connected. Each node applies optimization criteria to such connectivity information to determine an optimal new cluster. Data represent the optimal new cluster is broadcast by each node. In addition, the optimal new cluster determined by the various nodes are collected by each node. Thus, each node has data representing the proposed new cluster which is perceived by each respective node to be optimal.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Hossein Moiin, Ronald Widyono, Ramin Modiri
  • Patent number: 6449626
    Abstract: A garbage collector collects a generation of a collected heap in accordance with the train algorithm. It employs remembered sets associated with respective car sections to keep track of references into the associated car sections. Each remembered set contains entries that identify respective regions in the generation that contain references into the associated car section. In some collection cycles, the collector collects a collection set of more than one car section. When it does, it processes the remembered-set entries by searching the regions specified thereby not only for references into the associated car sections but also for references into other car sections in the collection set. The collector further treats the generation as divided into segments, for each of which it maintains a Boolean value that indicates whether the segment has been searched during the current collection cycle.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Alexander T. Garthwaite, Ole Agesen
  • Patent number: 6449700
    Abstract: A multiprocessing system includes a plurality of nodes interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote node's memory. A cluster protection mechanism is employed within a system interface of the remote node. The system interface, which is coupled between the global interconnect network and a local bus of the remote node, includes a memory management unit, referred to as a cluster MMU, including a plurality of entries which are selectable on a page basis. Depending upon the particular address of a received global transaction, an entry within the memory management unit is retrieved. The entry includes various fields which may be used to protect against accesses by unauthorized nodes, and to specify the local physical address to be conveyed upon the local bus.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Erik E. Hagersten, Christopher J. Jackson, Aleksandr Guzovskiy, William A. Nesheim
  • Patent number: 6447309
    Abstract: An apparatus for suppressing power bus bouncing in a hot-swappable system has been developed. The apparatus includes a connection module with three interior pins for: the power return; the power supply; and the system ground. The system ground pin is shorter than the other two so that it makes contact with the power bus after the bouncing from the return and supply pins has subsided.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Han Y. Ko, Robert C. Cyphers, Tomonori Hirai, Keith Y. Oka, Alan D. Martin
  • Publication number: 20020124076
    Abstract: Disclosed is a method for automatically determining whether a browser supports scalable vector graphics (“SVG”). The method for automatically determining whether a browser supports SVG according to embodiments of the present invention uses a two prong process in an attempt to make a proper detection for various types of browsers. In preferred embodiments, the method includes the steps of using JavaScript to detect Multipurpose Internet Mail Extensions (“MIME”) types from the browser to detect SVG support. If scanning of the MIME types detects that SVG support is present, the version of the requested web page containing SVG content is sent. If no SVG support is detected in the returned MIME types, the non-SVG version of the web page is sent to the browser.
    Type: Application
    Filed: December 26, 2000
    Publication date: September 5, 2002
    Applicant: Sun Microsystems, Inc.
    Inventor: Ana M. Lindstrom-Tamer
  • Publication number: 20020124083
    Abstract: Methods and apparatus for improving the overall performance of a system which processes transactions and provides connections in an enterprise environment are disclosed. According to one aspect of the present invention, a method for processing a transaction in an enterprise environment includes receiving a request to start the transaction, storing information which indicates that the request to start the transaction was received, and accessing a first resource manager associated with the transaction. Typically, a container receives the request to start a transaction from a component such as an enterprise bean. Once the first resource is accessed, the transaction is initiated as a local transaction on the first resource manager, and, eventually, the transaction is completed. In one embodiment, completing the transaction includes using a local transaction mechanism of the first resource manager to complete the local transaction.
    Type: Application
    Filed: March 5, 2001
    Publication date: September 5, 2002
    Applicant: Sun Microsystems, Inc.
    Inventors: Thulasiraman Jeyaraman, Mark W. Hapner, Vladimir Matena, Linda DeMichiel
  • Publication number: 20020124162
    Abstract: N instruction class (IClass) fields, m branch prediction (BRPD) and k next fetch address fields are added to each instruction set of n instructions of a cache line of an instruction cache, where m and k are less than or equal to n. The BRPD and NFAPD fields of a cache line are initialized in accordance to a pre-established initialization policy of a branch and next fetch address prediction algorithm while the cache line is first brought into the instruction cache. The sets of IClasses, BRPDS, and NFAPDs of a cache line are accessed concurrently with the corresponding sets of instructions of the cache line. One BRPD and one NFAPD is selected from the set of BRPDs and NFAPDs corresponding to the selected set of instructions. The selected BRPD and NFAPD are updated in accordance to a pre-established update policy of the branch and next fetch address prediction algorithm when the actual branch direction and next fetch address are resolved.
    Type: Application
    Filed: August 13, 2001
    Publication date: September 5, 2002
    Applicant: Sun Microsystems, Inc.
    Inventors: Robert Yung, Kit Sang Tam, Alfred K. W. Yeung, William N. Joy
  • Publication number: 20020122044
    Abstract: A system and method for performing color correction based on physical measurements (or estimations) of color component spectra (e.g. red, green, blue color component spectra). A color correction system may comprise a spectrum sensing device, a color calibration processor, and a calculation unit. The spectrum sensing device may be configured to measure color component power spectra for pixels generated by one or more display devices on a display surface. The color calibration processor may receive power spectra for a given pixel from the spectrum sensing device and compute a set of transformation parameters in response to the power spectra. The transformation parameters characterize a color correction transformation for the given pixel. The color calibration processor may compute such a transformation parameter set for selected pixels in the pixel array.
    Type: Application
    Filed: September 12, 2001
    Publication date: September 5, 2002
    Applicant: Sun Microsystems, Inc.
    Inventor: Michael F. Deering
  • Patent number: 6446084
    Abstract: One embodiment of the present invention provides a method for increasing performance of code executing on a platform-independent virtual machine. The method operates by receiving a request to resolve an entry in a symbol table at run-time, wherein resolving the entry requires multiple lookups into the symbol table. It next determines if the entry has previously been resolved. If so, the system returns a direct pointer to a runtime structure associated with the entry, which was returned during a previous resolution of the entry. If not, the system resolves the entry through multiple lookups into the symbol table to produce a direct pointer to the runtime structure, and replaces the entry with the direct pointer. In a variation on the above embodiment, the symbol table assumes the form of a constant pool within an object-oriented class file defined within the JAVA programming language.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Nik Shaylor, Antero K. P. Taivalsaari
  • Patent number: 6445391
    Abstract: A system and method for performing visible object determination based upon a dual search of a cone hierarchy and a bounding (e.g. hull) hierarchy. Visualization software running on a host processor represents space with a hierarchy of cones constructed by recursive refinement, and represents a collection of objects with a hierarchy of bounding hulls. The visualization software searches the cone and hull hierarchies starting with the root cone and the root hull. Before exploring a given cone-hull pair, a cone-restricted minimum distance between the cone and the hull is measured and compared to the visibility distance value of the cone. Only when the former is smaller than the latter will the cone be searched against the hull.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Henry Sowizral, Karel Zikan
  • Patent number: 6446137
    Abstract: A system and method allow client applications to invoke remote procedures on a server application using any of a plurality of remote procedure mechanisms, by selecting a remote procedure call mechanism at runtime. The system and method uses client and server stubs in the application that include an mechanism-independent canonical specification of each procedure interface. The specification defines the form of the interface and arguments, but not does include conventional mechanism-specific marshalling arguments for marshalling the arguments. The resulting compiled stubs may be used with any remote procedure call engine. Such remote procedure call engines receive the specification of the procedure interface and the arguments passed by the client application to the server, and determine at runtime the particular marshalling routines to use, according to the canonical specification.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Rangaswamy Vasudevan, Caveh Jalali
  • Patent number: 6446245
    Abstract: A method and apparatus for performing power routing in ASIC design. Power routing is performed after cell placement, allowing more knowledgeable placement of power structures in the physical layout. By performing cell placement prior to power routing, standard cells are allowed to be placed in more optimal configurations. In one embodiment, power rings and power straps are placed over the top of the standard cells based on power analysis of the standard cell layout. Those regions of the layout where design violations are triggered are corrected by an incremental placement correction of affected cells. In another embodiment, cells are placed in the physical layout in a bottom-up hierarchical manner. When a given cell becomes large enough to require power routing, a power feed cell of sufficient dimension to support the necessary power strap is inserted into the layout during the placement process. In the subsequent power routing phase, power straps are placed over the power feed cells.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Zhaoyun Xing, Russell Kao
  • Patent number: 6446109
    Abstract: A computing environment that offers a level of decentralization wherein application server code resident on a remote application server can be distributed to a local server. The local server becomes a local application server for a client. A request for information by a client is serviced by the local application server. If the information is available on the local application server, the local application server satisfies the request using this information. If the information is not available locally, the local application server can access the remote application server to obtain the requested information. When the information is copied to the local application server, the local application server retains a copy of the information and forwards a copy to the client. Thus, subsequent requests can be satisfied without accessing the remote application server.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Abhay K. Gupta
  • Patent number: 6446219
    Abstract: A cluster implements a virtual disk system that provides each node of the cluster access to each storage device of the cluster. The virtual disk system provides high availability such that a storage device may be accessed and data access requests are reliably completed even in the presence of a failure. To ensure consistent mapping and file permission data among the nodes, data are stored in a highly available cluster database. Because the cluster database provides consistent data to the nodes even in the presence of a failure, each node will have consistent mapping and file permission data. A cluster transport interface is provided that establishes links between the nodes and manages the links. Messages received by the cluster transports interface are conveyed to the destination node via one or more links. The configuration of a cluster may be modified during operation.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory L. Slaughter, Robert Herndon
  • Patent number: 6446104
    Abstract: A double-precision multiplier for use in the floating point pipeline of a processor has an array multiplier and a carry-save partial-product accumulator. Double precision multiplication is accomplished by generating a plurality of partial products and summing these in the carry-save partial-product accumulator. The partial-product accumulator has a carry-save adder, a sum register, a carry-out counter and an extender. The carry-out counter receives a carry outputs of the carry-save adder and array multiplier, and the extender is coupled to extend the sum register dependent upon the contents of the carry-out counter. The extension occurs during addition of the most significant partial product to the sum of less significant partial products.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Tzungren Allan Tzeng, Choon Ping Chng
  • Patent number: 6445640
    Abstract: An electronic device that invalidates a memory write operation before a memory address predecode occurs. The electronic device uses several dynamic latches to assert complementary clock like memory address data to drive the associated predecode circuitry. A stack of serially connected transistors is coupled to the input node of each dynamic latch to provide input node state control. By managing the operation of each stack of serially connected transistors, the dynamic latches may be prevented from asserting their complementary clock like memory address data to the associated predecode circuitry in order to invalidate a memory write operation.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Spencer Gold
  • Patent number: 6446116
    Abstract: A method and apparatus for dynamic loading of a transport mechanism is provided. A resource locator (RL) corresponding to a collaboration session is requested from a registry. A location indicator to the RL in the registry is received. In response to receiving the location indicator to the RL in the registry, a transportation mechanism specified in the first RL is dynamically loaded, and the collaboration session is joined. Thus, users wishing to collaborate use the registry to determine the type of transport mechanism they need to dynamically load to communicate with each other.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: September 3, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Richard N. Burridge