Patents Assigned to Sun Microsystems
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Publication number: 20020147700Abstract: Methods and apparatus for deleting a member in a circular singly linked list are described. Just prior to the current pointer register being updated, its contents are copied to the previous pointer register. When the consumer needs to delete a member from the list, the previous member location is known because it is saved in the previous pointer register. In this way, deletions done at the time of scanning involve only a single SRAM write access since the contents of the current pointer register is copied into the member referenced by the previous pointer register.Type: ApplicationFiled: April 10, 2001Publication date: October 10, 2002Applicant: Sun Microsystems, IncInventors: Thomas Peter Webber, Hugh Kurth
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Patent number: 6462593Abstract: A phase-locked loop circuit and method for providing for compensation for an offset. A phase-locked loop circuit comprises a phase detector, a compensation circuit, a loop filter, and a VCO. The phase detector is coupled to receive a first input signal and a second input signal. The phase detector is configured to output one or more of a plurality of output signals indicative of a difference between the first input signal and the second input signal. The compensation circuit is coupled to receive the output signals and to reduce a voltage offset between the output signals. The compensation circuit is further configured to provide a plurality of compensated output signals. The loop filter is coupled to receive the compensated control signals. The loop filter is configured to output a first control signal. The VCO is coupled to receive the first control signal and to output the second input signal based on the first control signal.Type: GrantFiled: July 22, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: Chung-Hsiao R. Wu, Drew G. Doblar
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Patent number: 6463574Abstract: A method of inserting repeaters into a complex integrated circuit includes the step of selecting, based upon signal transition data, a maximum wire length to be positioned between two repeaters in a complex integrated circuit. The maximum wire length is then correlated with a signal transition-based ratio coefficient defining the relation between a signal transition time and a Resistive-Capacitive delay. A signal transition-based Resistive-Capacitive delay is then defined based upon the signal transition-based ratio coefficient. A repeater distribution is then mapped within the complex integrated circuit based upon the signal transition-based Resistive-Capacitive delay.Type: GrantFiled: June 10, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: Julian Culetu, Chaim Amir
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Patent number: 6463472Abstract: A system for maintaining reliable packet distribution in a ring network with support for strongly ordered, nonidempotent commands. Each consumer node on the network maintains a record of the sequence of packets that have passed through that node, and the state of each of the packets at the time it passed through, including a record of the last known good packet and its sequence number. When a producer node detects an error condition in an acknowledgement for a packet, resends all packets beginning with the last known good packet. Each consumer node is able to process or reject the resent packets, including packets that may already have been processed, which it is aware of due to the packet and state records for all packets.Type: GrantFiled: May 10, 2001Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventor: William C. Van Loo
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Patent number: 6462570Abstract: A test breakout board using blind vias to eliminate stubs. The test breakout board includes a printed circuit board (PCB), having a first set of contact pads on one side and a second set of contact pads which are directly opposite the first set of contact pads on it's other side. Each pad in the first set of contact pads is connected to a corresponding pad in the second set of contact pads through a pair of blind vias, a pair of signal traces and a through-hole via. Each of the through-hole vias is connected to a corresponding contact pin in a test connector. The test connector provides an interface to test equipment such as a logic analyzer or an oscilloscope. The test breakout board may include a test socket for holding a device-under-test (DUT), such as a microprocessor or an application specific integrated circuit (ASIC) chip. Additionally, the breakout board may also include an electrical interface adapter, which mechanically resembles the DUT.Type: GrantFiled: June 6, 2001Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: William J. Price, Drew G. Doblar
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Patent number: 6462604Abstract: A circuit for reducing the noise associated with a clock signal for a flip-flop based circuit has been developed. The circuit includes a charge control portion that stores charge at a pre-determined time of the clock cycle and a dump control portion that releases the stored current also at a pre-determined time of the clock cycle. The charge is released onto the power grid of the system served by the clock signal.Type: GrantFiled: May 2, 2001Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: Brian W. Amick, Claude R. Gauthier
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Patent number: 6463465Abstract: A parallel filesystem remote access subsystem facilitates remote access to files in a parallel filesystem in a digital computer network, the network including at least one client computer and a plurality of server computers interconnected by a communication link, and each server computer storing a portion of at least one file in the parallel filesystem. The parallel filesystem remote access subsystem includes, associated with the server computer, a parallel filesystem input/output daemon, and, associated with the client computer, a parallel filesystem module and a parallel filesystem proxy daemon. The parallel filesystem module receives access requests generated to access a file in the parallel filesystem and refer the access requests to the parallel filesystem proxy daemon, and the parallel filesystem proxy daemon, in turn, generates server access request messages for transfer over the communications link.Type: GrantFiled: May 7, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventor: Nils Nieuwejaar
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Patent number: 6463521Abstract: A method for including opcode information in an opcode includes numbering the opcode such that a property of the opcode is represented by at least one bit of the opcode. According to one aspect, the number of data units required to advance to the next opcode is encoded into the opcode value itself. According to another aspect, opcodes are numbered such that opcodes having the same properties have opcode values in the same opcode range.Type: GrantFiled: June 23, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventor: Dean R. E. Long
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Patent number: 6463418Abstract: A method for transacting business electronically includes storing first information in a database management module, reading the first information in the database management module by a network server module, providing a client customized interface with the first information by the network server module, providing client information and product information to a file transfer module responsive to a client ordering a product, and transferring a product to a client by the file transfer module.Type: GrantFiled: August 20, 1997Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventor: James W. Todd
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Patent number: 6463525Abstract: Where it is desired to perform a double precision operation using single precision operands, first and second single precision operands are loaded into first and second respective rows of a re-order buffer, and third and fourth single precision operands are loaded into third and fourth respective rows of the re-order buffer. A first merge instruction copies the first and second single precision operands from respective first and second rows of the re-order buffer into first and second portions of a fifth row of the re-order buffer, thereby concatenating the first and second single precision operands to represent a first double precision operand. A second merge instruction copies the third and fourth single precision operands from respective third and fourth rows of the re-order buffer into first and second portions of a sixth row of the re-order buffer, thereby concatenating the third and fourth single precision operands to represent a second double precision operand.Type: GrantFiled: August 16, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventor: J. Arjun Prabhu
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Patent number: 6462410Abstract: An integrated circuit device including an integrated circuit die having at least a first and a second heat-generating components formed thereon, and a heat dissipation structure thermally coupled to the die to dissipate heat generated by the components. The heat dissipating characteristics of the heat dissipation structure are tailored to match the heat generated by each of the first and second components.Type: GrantFiled: August 17, 2000Date of Patent: October 8, 2002Assignee: Sun Microsystems IncInventors: Shlomo D. Novotny, Marlin R. Vogel
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Patent number: 6463526Abstract: One embodiment of the present invention provides a system that facilitates multi-dimensional space and time dimensional execution of computer programs. The system includes a head thread that executes program instructions and a series of speculative threads that execute program instructions in advance of the head thread, wherein each speculative thread executes program instructions in advance of preceding speculative threads in the series. The head thread accesses a primary version of the memory element and the series of speculative threads access space-time dimensioned versions of the memory element. The system starts by receiving a memory access to the memory element. If the memory access is a write operation by the head thread or a speculative thread, the system determines if a version of the memory element associated with the head thread or speculative thread exists. If not, the system creates a version of the memory element for the thread.Type: GrantFiled: October 18, 1999Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: Shailender Chaudhry, Marc Tremblay
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Patent number: 6463446Abstract: In a distributed computing system, a first process may register interest in an event occurring in another address space or physical machine in such a way as to allow the subsequent notification of the event's occurrence to contain an object that includes methods that are to be run on receipt of the notification. When the notification is received, either by the first process or by some other entity designated by the first process to be the final point of notification, the methods may be executed as specified by the first process.Type: GrantFiled: March 20, 1998Date of Patent: October 8, 2002Assignee: Sun Microsystems, Inc.Inventors: Ann M. Wollrath, James H. Waldo, Peter C. Jones, Kenneth C.R.C. Arnold
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Publication number: 20020140147Abstract: A test stand for testing computer hardware components is provided. The test stand has a base structure. A first support arm mounts to the base structure. The first support arm has one or more apertures disposed therein to enable airflow through the support arm to avoid airflow hindrance of cooling fans during operation of the subject internal computer hardware components and when the test stand is in certain positions. A second support arm also mounts to the base structure. The second support arm has a rotation mechanism mounted therein. A support bracket for supporting the test subject computer hardware components extends between the first support arm and the second support arm. The support bracket is in communication with the rotation mechanism, such that the rotation mechanism controls and enables the rotation of the support bracket through a predetermined rotational degree range.Type: ApplicationFiled: March 27, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: Yvetta D. Pols Sandhu, William A. Izzicupo, Ronald R. Boudreau
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Publication number: 20020140695Abstract: Methods, systems, and articles of manufacture consistent with the present invention produce a three-dimensional rotational image from a two-dimensional image including a plurality of objects. Each object is assigned to one of a plurality of sequential layers that correspond to visually depicted depths of the objects in the two-dimensional image. The objects are rotatively displayed to produce the three-dimensional rotational image.Type: ApplicationFiled: November 2, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventor: Armin Weiss
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Publication number: 20020144247Abstract: Method and apparatus for simultaneous optimization of the compiler to generate codes that may be compatible and acceptable for two or more different processors without potentially sacrificing the performance on any processors is provided. In particular, the rules of instructions scheduling for the machines of interest of different processors are abstracted. From the abstractions, a hypothetical machine is generated that is the restrictive or constraining set of the actual machines modeled in the abstraction step. After generating the hypothetical machine, the restricted hypothetical machine is targeted rather than the actual machines modeled in the first step. Thereafter, conflicts, if any are resolved by modeling the performance impact and selecting the less damaging choice.Type: ApplicationFiled: March 30, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: Partha P. Tirumalai, Mahadevan Rajagopalan
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Publication number: 20020144012Abstract: A system dynamically generates interfaces on demand during runtime execution of an application containing a plurality of objects. A user object generates a request for an interface of a service object. The service object, if the interface is not available, generates an adapter request and transmits same to an adapter manager. The adapter manager selects an interface adapter based on the adapter request from a library of interface adapters or aggregates a composite adapter and transmits the obtained interface adapter to the service object. The service object enables access from the user object based on the received interface adapter.Type: ApplicationFiled: March 26, 2002Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: Michael Hoennig, Markus Meyer
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Publication number: 20020144149Abstract: A method and system for evaluating a set of credentials that includes at least one group credential and that may include one or more additional credentials. A trust rating is provided in association with the at least one group credential within the set of credentials and trust ratings may also be provided in other credentials within the set of credentials. Each trust rating provides an indication of the level of confidence in the information being certified in the respective credential. In response to a request for access to a resource or service, an evaluation of the group credentials is performed by an access control program to determine whether access to the requested resource or service should be provided. In one embodiment, within any given certification path a composite trust rating for the respective path is determined. An overall trust rating for the set of credentials is determined based upon the composite trust ratings.Type: ApplicationFiled: April 3, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: Stephen R. Hanna, Anne H. Anderson, Yassir K. Elley, Radia J. Perlman, Sean J. Mullan
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Publication number: 20020144217Abstract: A system and method for automatically selecting decoupling capacitors for an electronic device. The system determines a localized drive strength for each component in the electronic device. Based on a summation of drive strengths for components in a given area of the electronic device, the system determines whether a decoupling capacitor is necessary to provide local power bus stability.Type: ApplicationFiled: March 30, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: Chen Li Lin, Joel Grinberg, Joseph Siegel
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Publication number: 20020139759Abstract: A method and apparatus for retaining a component within a base structure is provided. The component retention mechanism, in accordance with one example embodiment of the present invention, has a bolt receiver mounted to a base structure into which the component to be installed mounts. The base structure can be, e.g., a computer hardware rack structure. A spring casing mounts to the component to be installed. A spring having a first end and a second end mounts within the spring casing. At least one bolt extends from one of the first and second ends of the spring, such that the bolt engages with the bolt receiver to retain the component in the base structure as desired.Type: ApplicationFiled: March 27, 2001Publication date: October 3, 2002Applicant: Sun Microsystems, Inc.Inventors: James M. Carney, Daniel D. Gonsalves, Robert S. Antonuccio, Timothy M. Holland