Abstract: A method for regulating resonance in a micro-chip has been developed. The circuit includes an on-chip de-coupled capacitor that is shunted across the supply and ground voltages, and a band-pass shunt regulator that is in parallel to the capacitor across the supply and ground voltages. The regulator will short circuit the supply and ground voltages at a pre-determined frequency to reduce the resonance effect on the micro-chip.

Abstract: Type safe linkage is ensured by establishing a constraint if a class references an attribute that is contained in another class. This constraint acts as a “promise” to later ensure type safe linkage. At some point later—such as at the earliest time that the type is loaded by both loaders—the constraint is verified. This may be accomplished by verifying that the type for the attribute is the same regardless of whether it is loaded by a loader that defines the referencing class or a loader that defines the referred class. If the constraint is not met, an error message is provided.

Abstract: A method and apparatus for ensuring that code being executed by a data processing system conforms to a platform standard. As an example, one embodiment of the present invention validates Pure Java platform standard conformance of Java programs downloaded from a remote server to ensure that they conform to the “Pure Java” standard. This checking can be performed at the time that the program is downloaded across a network firewall and/or at one or more times during the loading and execution of the program.

Abstract: Apparatus is disclosed for viewing computer generated images and for tracking the positions of the user's head and hand. One alternative of the apparatus includes a frame element, versatilely mountable, with sensors for the head tracking of a user whose bodily movement is constrained to a small area. Short range and inexpensive sensors are deployed for tracking the position of the user's head; these sensors are deployed partly on a on the user's head and partly on the tracking frame. All the electronics for tracking and user input are enclosed in a mobile pack. In another alternative of the tracking invention natural forces such as gravity, the Earth's magnetic field, and inertia are used, so additional references. The display allows for interchangeable optical elements so that it may be tailored to suit the needs of a particular user or application.

Abstract: A print server for print jobs printed on networked printers. First, the print server receives preferences regarding a print job the user wishes to send such as speed and image quality. Next, the server determines, using a database or other query, the most appropriate printer complying with the print job preferences that is located physically near the user and spools the print job to that printer. If the printer returns an error signal, the server will determine a different printer which closely complies with the print job preferences and re-send the print job. If a busy signal is returned, the user will be given the choice of waiting or having the server automatically determine the next available appropriate printer. When the print job is complete, the user will be notified of the physical location of the printer where the print job was processed.

Abstract: A computer system includes a chassis, electronic circuitry, a plurality of removable power supply units, and a power distribution mechanism to which the power supply units are connectable. The chassis includes at least one connector for effecting a connection to a first, chassis, ground potential. The electrical circuitry is connected to a second, logic, ground potential. Each of the power supply units is provided with a separate removable grounding plate for selectively coupling chassis ground to logic ground. The use of a power distribution mechanism with a plurality of removable power supply units enables redundancy for the power supply units, whereby the system can remain powered when one of the power supply units fail. The use of the grounding plates for each of the power supply units enables reliable connection of the electrical and chassis grounds can be effected, even when one of the power supply units and/or its connecting cable is faulty.

Abstract: A circuit for avoiding contention in such circuits as an n-to-1 transmission gate multiplexer in a high performance microprocessor or integrated circuit utilizes a same-gate symmetrical design and reverse polarity control signals to overcome disadvantages of prior circuits while accommodating increasing circuit speeds. The circuit employs all NAND gates on the select lines controlling multiplexer transmission gates rather than NAND gates and a NOR gate. The design may also be implemented using AND gates. In addition to using a NAND gate where prior designs use a NOR gate, the polarity of the flip-flop output which drives the additional NAND gate is inverted, and the polarity of the input to the transmission gate driven by the additional NAND gate is also inverted. The circuit thus provides a symmetric design using the same NAND logic gates on all select lines while preserving functionality of the n-to-1 multiplexer.

Abstract: A high performance network interface is provided for receiving a packet from a network and transferring it to a host computer system. A header portion of a received packet is parsed by a parser module to determine the packet's compatibility with, or conformance to, one or more pre-selected protocols. If compatible, a number of processing functions may be performed to increase the efficiency with which the packet is handled. In one function, a re-assembly engine re-assembles, in a re-assembly buffer, data portions of multiple packets in a single communication flow or connection. Header portions of such packets are stored in a header buffer. An incompatible packet may be stored in another buffer. In another function, a packet batching module determines when multiple packets in one flow are transferred to the host computer system, so that their header portions are processed collectively rather than being interspersed with headers of other flows' packets.

Abstract: A method and apparatus is disclosed for transmitting data about an object within a defined field and using the transmitted data to generate a virtual object on the display screen of a computer. In one embodiment of the present invention the object used to transmit input data is a wireless glove assembly. The glove assembly supports a transmitting device which transmits data bursts, containing position and gesture information, in the radio frequency wavelength to four stationary receivers. The received signal is converted to a digital signal and input to a microprocessor control unit. The software used in the microprocessor control unit uses an averaging method to generate a virtual object on the computer display screen. The position of the virtual object is calculated based on the strength of the signal received. The movement of the virtual object on the computer display screen is in the same direction as and is proportional to the glove movement.

Abstract: A system for detecting and correcting errors in a data block includes a check bits generation unit which receives and encodes data to be protected. The check bits generation unit effectively partitions the data into a plurality of logical groups. The check bits generation unit generates a parity bit for each of the logical groups, and additionally generates a pair of global error correction codes, referred to generally as an untwisted global error correction code and a twisted global error correction code. Data at corresponding bit positions within the logical groups are conveyed through a common component. The untwisted global error correction code may be equivalent to the result of generating an individual error correction code for each logical group and XORing the collection of individual error correction codes together.

Abstract: One embodiment of the present invention provides a system that facilitates marking of objects defined within an object-oriented programming system to keep track of accesses to fields within the objects. The system operates by receiving a reference to a field within an object, and identifying a marking bit within the object that is associated with the field. Note that each marking bit within the object is associated with a different subset of fields within the object. Next, the system sets the marking bit to indicate that at least one field within the associated subset of fields has been referenced. Finally, the system performs the reference to the field. In one embodiment of the present invention, the object includes N marking bits numbered 0, 1, 2, . . . , N−1 and M fields numbered 0, 1, 2, . . . , M−1.

Abstract: Apparatus, methods, systems and computer program products are disclosed to provide electronic mail systems with the capability for a group of trusted users to collectively determine whether a given electronic mail message is junk e-mail. Further, if the given electronic mail message is determined to be junk mail, the e-mail systems of other trusted users in the group dispose of unviewed copies of the junk e-mail. Thus, the invention reduces the exposure of junk e-mail messages to the group of trusted users.

Abstract: A system and method for memory allocation from a heap comprising memory blocks of a uniform fixed size. Each memory block has a status bit. A binary status key stores a Boolean value indicating free memory. The heap is scanned in order until a sequence of a requested quantity of free contiguous memory blocks is found or NULL is returned. Each scanned free memory block is marked un-free by assigning its status bit to the logical negative of the binary status key. If the end of the heap is reached before a sequence of sufficient quantity is found, all reachable blocks are marked as free. The binary status key is flipped such that all memory blocks which were marked free are now un-free, and vice versa. Any memory block whose corresponding structure has become unreferenced is reclaimed for future use. The scan then continues from the beginning of the heap. In another embodiment, a memory allocation for a partitioned data structure from a heap of fixed-size memory blocks may be used.

Abstract: A linkage editor executing at a server receives instructions for packaging software components that are required for program execution at a client. The linkage editor generates an output file by iteratively analyzing the program for references to other software components and extracting those components from their parent classes. The linkage editor sends the completed output file to an interface task, which transmits it to the client.

Abstract: The disclosure presents an apparatus, system, and method for file access for difficult domains, such as data broadcast, where the time to access a file can be considerable. The invention interposes a file access object between the client and the platform that is both scalable and interoperable. The invention decomposes file access into four (application visible) interfaces that scale between a most basic access (such as, for example, a simple load function) to the most expressive access (such as, a retrieve function).

Abstract: Methods and apparatus for enabling the association between a monitor and an object to be maintained when a garbage collection occurs during a wait action performed with respect to the object are disclosed. According to one aspect of the present invention, a method for acquiring access to an object in a multi-threaded, object-based system includes associating a monitor with the object, and setting a pointer from a thread, which is arranged to execute on the object, to the object. The method also includes setting a reference substantially directly from the thread to the monitor. In one embodiment, setting the reference includes setting a boolean reference count. In another embodiment, setting the reference enables a garbage collector to determine whether the monitor is suitable for reclamation during a garbage collection process.

Abstract: Provided is a computer implemented method, system, and program for determining system information, wherein the system is comprised of at least one host adaptor, switch, and storage device. A path in the system from one host adaptor to the I/O device includes as path components one host adaptor, one switch, one storage device, a first link between the host adaptor and the switch and a second link between the switch and the storage device. A determination is made of component information on host adaptor, switch, and I/O device components in a network system. The determined component information is added to a configuration file providing configuration information on the system. For each determined host adaptor, a determination is made from the component information of information on the first link between the host adaptor and the switch and on the I/O device to which the host adaptor communicates.

Abstract: In accordance with methods and systems consistent with the present invention, a lease manager is provided for managing leases between clients and other network services. To use the lease manager, a client enters into a management lease with the lease manager, specifying an amount of time during which the lease manager can manage preexisting leases between the client and network services on behalf of the client. This management includes renewing the preexisting leases with the other network services. Further, the lease manager notifies the client when a lease between the lease manager and the client is near expiration. The lease manager also notifies the client of failed attempts to renew the preexisting leases, as well as the management lease, either with a network service or with the lease manager.

Abstract: An automated method of analyzing crosstalk in a digital logic integrated circuit on a digital computer is described. The method uses available software to make an extracted, parameterized netlist from a layout of the integrated circuit. The netlist has gate and black box invocations as well as transistor invocations. Library models are used to find driving resistances and capacitances associated with the gate and black-box invocations. For at least one potential victim wire of the plurality of wires, a subset of the wires of the chip are found to be potential aggressor wires to the victim wire. The aggressor wires are combined into a common aggressor. A risetime of the common aggressor is calculated and used to calculate the magnitude of coupled noise on the victim wire induced by the aggressor wires. An alarm threshold for each potential victim wire is determined based upon the type of logic gate that receives the victim wire.