Abstract: A device adapted to optimize air duct flow in an electronic system including a printed circuit board configured to support one or more electronic components having various heights. The device includes an air duct including a rigid cross-sectional member, the air duct being adapted to facilitate air flow from an inlet port to an outlet port. Further, the rigid cross-sectional member includes an opening having an interior perimeter, the interior perimeter of the opening being attached to a flexible sheet by a pressure sensitive adhesive. The rigid cross-sectional member attached to the flexible sheet is adapted to compress one or more electronic components to the printed circuit board when the rigid cross-sectional member is mounted on the printed circuit board, and is configured to form an airtight enclosure to optimize air duct flow.

Abstract: The invention relates to a method for controlling bandwidth. The method includes receiving a plurality of packets from a network, analyzing each of the plurality of packets by a classifier to determine to which of a plurality of temporary data structures each of the plurality of packet is forwarded, forwarding each of the plurality of packets to one of the plurality of temporary data structures as determined by the classifier, if a virtual serialization queue is operating in polling mode: requesting a number of packets from the one of the plurality of temporary data structures by the virtual serialization queue, wherein the virtual serialization queue is associated with one of the plurality of temporary data structures, and forwarding the number of packets to the virtual serialization queue.

Abstract: In a space incremental garbage collector, remembered set information for a region is stored in a set of fixed-size data structures, each of which has a representation of the information and a level of precision that differs from other data structures in the set. Remembered set information for each other region is placed in a data structure based on the density of inter-region references between the region and the other region. The remembered set information for the other region is moved from one data structure to another data structure when the density of inter-region references between the region and the other changes. Some of the data structures use bit arrays to store the information and these arrays can be combined with bit arrays produced by the collector to facilitate the identification and removal of stale remembered set entries.

Abstract: Load balancing method and system for balancing a processing load in a network, wherein load balancer upon receiving a client request selects one of a plurality of processing servers for serving the request. The selection of a processing server may be based on a location of a client and a processing server. The load balancer may comprise a load balancing master and a plurality of load balancing slaves, wherein the load balancing slaves receive client requests and transmit a selection request message to the load balancing master. The load balancing master selects a load balancing slave and/or a processing server for serving the request and generates a corresponding instruction message. The client request is served by the selected load balancing slave and the selected processing server by establishing a communication link between the client and the processing server.

Abstract: A method for processing a plurality of packets that includes receiving the plurality of packets from a network, analyzing each of the plurality of packets by a classifier to determine to which of a plurality of temporary data structures each of the plurality of packet is to be forwarded, forwarding each of the plurality of packets to one of the plurality of temporary data structures as determined by the classifier, forwarding a plurality of packets from the one of the plurality of temporary data structures to a virtual serialization queue associated with the one of the plurality of temporary data structures, wherein the virtual serialization queue is bound to a thread having a processing priority, and processing the plurality of packets on the virtual serialization queue using at least one processor bound to the virtual serialization queue and the processing priority.

Abstract: Methods for processing annotations from files are provided. The method initiates with identifying an annotation present in a source file or a class file, and identifying factories available for processing annotations. The method includes determining annotations supported by each of the available factories. Then, one of the available factories is assigned to process the annotation based on the annotation present in the source file or the class file being supported by the one of the available factories. The annotation processing tool directly accesses the class files to process the annotations. The explicitly processed class files may or may not be referenced by source files.

Abstract: A network having a plurality of nodes is disclosed. The network includes an event channel adapted to transmit an event between a publisher node and a subscriber node within the network. The network also includes a filter to identify the event on the subscriber node. The network also includes an application on the subscriber node to receive the event according to the filter.

Abstract: A method for relocating virtual to physical memory mappings in a computer system is described in which a new hardware mapping entry (HME) block is allocated at a new location in memory. Contents of an old HME block are copied to the new HME block. The new HME block is added to a linked list of HME blocks. The old HME block is then removed from the linked list. A lock is acquired during the adding and during the removing. A machine readable medium having processor instructions for relocating virtual to physical memory mappings is also described.

Abstract: An approach for partitioning virtual memory address space and identifying relocatable and non-relocatable regions of memory is provided. In one embodiment, the allocations of physical addresses and kernel virtual memory addresses are partitioned into relocatable and non-relocatable regions such that, by inspecting a virtual address, the property of the physical memory (relocatable or non-relocatable) is identified.

Abstract: One embodiment of the present invention supports execution of a start transactional execution (STE) instruction, which marks the beginning of a block of instructions to be executed transactionally. Upon encountering the STE instruction during execution of a program, the system commences transactional execution of the block of instructions following the STE instruction. Changes made during this transactional execution are not committed to the architectural state of the processor until the transactional execution successfully completes.

Abstract: A system and method for application resource utilization metering and cost allocation in a utility computing environment. In one embodiment, the system may include a computational resource, a plurality of applications configured to utilize the computational resource, a metering utility configured to measure utilization of the computational resource by a given one of the plurality of applications, and a cost model configured to allocate a first portion of a cost of the computational resource to the given application dependent upon the measured utilization of the computational resource by the given application.

Abstract: An interface is provided to couple an input/output device (e.g., a network interface unit) to one or more different host system buses without altering the configuration of the device (e.g., to include logic specific to the host buses). Functionality of the device (e.g., MTU size, error detection) is therefore independent of the host bus. Host bus logic for managing operation of the host bus is augmented with logic for translating between semantics of the interface and the host bus. Also, end-to-end verification of a complex ASIC in multiple configurations or environments can be performed over the interface without probing into the ASIC.

Abstract: A method for creating an install program involves selecting a plurality of icons (where each of the plurality of icons represents an element of the install program), defining the install program by placing and arranging the plurality of icons onto a workspace to obtain a defined install program, and building the install program based on the defined install program.

Abstract: A method and mechanism for managing operating system instances in a computing system. A computing system is configured to enable users to model and manage operating system instances. One or more defined operating system instances may be created and stored for future use. Each of the defined operating system instances may include a description of required resources. In addition, the definition of desired and/or optimal resources may be specified. In response to an attempt to realize an operating system instance, a determination is made as to whether resources allocated for the operating system instance are adequate. If the allocated resources are inadequate, further resources may be allocated. In addition, a determination may be made as to whether a standby mode is indicated for the operating system instance. If a standby mode is indicated, the operating system instance may be realized but not booted.

Abstract: Cache logic associated with a respective one of multiple processing threads executing in parallel updates corresponding data fields of a cache to uniquely mark its contents. The marked contents represent a respective read set for a transaction. For example, at an outset of executing a transaction, a respective processing thread chooses a data value to mark contents of the cache used for producing a transaction outcome for the processing thread. Upon each read of shared data from main memory, the cache stores a copy of the data and marks it as being used during execution of the processing thread. If uniquely marked contents of a respective cache line happen to be displaced (e.g., overwritten) during execution of a processing thread, then the transaction is aborted (rather than being committed to main memory) because there is a possibility that another transaction overwrote a shared data value used during the respective transaction.

Abstract: A method for managing identification in a data communications network includes receiving a user-controlled secure storage device and enrolling the user with an authority network site. The enrolling includes providing information requested by the authority network site. The method also includes receiving user data in response to the enrolling, storing the user data in the user-controlled secure storage device, enabling the user-controlled secure storage device to release the user data and using the user data at a service provider network site to obtain a service.

Abstract: A method for storing a data block, comprising compressing the data block using a first compression algorithm to obtain a compressed data block, generating a data block compression header, combining the compressed data and the data compression header to obtain a compressed data block package, storing the compressed data block package in a storage pool, obtaining a compressed data block package location, calculating a data block checksum for the compressed data block, and storing a first indirect block in the storage pool, wherein the first indirect block comprises the compressed data block package location, the data block checksum, and a compression flag.

Abstract: It has been discovered that preventing performance of ineffective write operations reduces demand on memory bandwidth, as well as preventing unnecessary consumption of resources. A write operation is inspected to determine whether the write operation will effectively modify the destination of the write operation (i.e., whether a net change will occur). Those ineffective write operations are not performed. Preventing performance of the write operation includes not changing contents of locations in a memory hierarchy that correspond to the destination of the write operation.

Abstract: A method and computer program product for detecting and diagnosing errors in a generic function call and then presenting them in an error message is disclosed. A generic function call is provided for evaluation. A corresponding generic function definition containing sets of dummy arguments that define arguments signatures for associated specific functions is also provided. In a first sorting the generic function call is compared with the argument signatures to determine whether the generic function call contains errors. A second sorting is then used to determine the nature of the errors. An error message describing the nature of the errors is then generated.