Abstract: Elements on a network are selectively unmanaged by a network manager. An element is not managed when it is placed in a Pending state. Traps and events from the element in the Pending state are handled but not processed. The element can be automatically placed in the Pending state if a trap or event has been generated by that element.
Abstract: A file system includes a file allocation table (FAT) and a file allocation table extension. Each FAT element of the file allocation table corresponds to a unique cluster on disk and represents the status of that cluster. These FAT elements are indexed by a cluster number that corresponds to that cluster on disk. Each element of the file allocation table extension does not correspond to any region on disk. Writing a file divided into clusters to disk first involves determining whether the cluster may be represented by a hole. If not, the cluster is written to disk at a particular cluster number and a status indicator is stored in the file allocation table at a FAT element indexed by that cluster number indicating that the cluster is allocated. If the cluster may be represented by a hole, a status indicator is stored in the file allocation table extension at an element indicating that the cluster is not stored on the disk of the computer.
Abstract: A programmable clock circuit generates a real time clock value, which is incremented in response to a real time clock increment signal. The real time clock increment signal is generated after a selected number of ticks of a system clock signal, with the number of ticks being determined by whether it is operating in a normal mode or an error compensation mode. In the normal mode, the real time clock increment signal is generated after a selected number of ticks of the system clock signal, which results in an increasing cumulative timing error. In the error compensation mode, the real time clock increment signal will be generated after a number of ticks of the system clock signal selected so as to reduce this cumulative error. The programmable clock circuit keeps track of the cumulative error in the real time clock signal while operating in the normal mode.
Abstract: A CMOS 4-2 carry-save adder cell implementation. A XNOR gate is used in the computation of SUM and CARRY. By using an XNOR gate, there are no possible input permutations which will cause any output in the SUM logic to be driven by two P-channel devices in series. The final XOR function needed to compute the SUM output is performed by a 2-to-1 multiplexor and two inverters. The maximum resistance from input to output of the 2-to-1 multiplexor is relatively low, and the worst case is when the CIN input drives through the transmission gate. The input capacitances are very low. The maximum load driven by the output is low because the output never drives through the drains of any transistors. Instead, the output drives only the gates of four transistors to implement the XOR function. A single 8-transistor complex gate and an inverter are used to calculate COUT. The transistors in the complex gate can be made relatively small, thus minimizing the input capacitance.
Abstract: A method for minimizing thermal overhead in an integrated circuit package is described. A heat sink having a base is integrally formed into the package. The base is connected to the die, and a portion of the heat sink projects from the package, forming a post. A heat transfer assembly having a shaft with an aperture is heated until the aperture expands sufficiently to allow the heat transfer assembly to be fitted on the post with a minimum of force. Upon cooling, a tight joint is formed between the heat sink and the heat transfer assembly.
Abstract: A method and apparatus are described for automatically converting documents from a first hypertext format that supports multi-layered backgrounds to a second hypertext format that does not support multi-layered backgrounds, such as HyperText Markup Language (HTML). According to the method, a target file is generated that stores all non-background elements of the document in the second hypertext format. A mechanism that reads the first hypertext format is used to display a current page of the document. A screen dump is made of the displayed page after removing or hiding the non-background elements. This process is repeated for all of the pages of the document. References to the graphics files generated by the screen dumps are embedded in the target file. The references cause the background elements of a page to be displayed behind non-background elements of the page when the document is displayed based upon the target file by a mechanism that reads the second hypertext format.
Abstract: A method of processing a remote procedure call from a client computer to an object stored on an aggregation of server computers includes the step of checking a server aggregation location data field and a server aggregation contact strategy data field of the remote procedure call. The aggregation of server computers is designated as replicating server computers, migrating server computers, or federated server computers based upon the checking operation. Once a server computer aggregation topology is identified, parameters associated with the remote procedure call may be modified to alter the interaction with the server computer aggregation.
Abstract: A method of transposing data. Either eight bit or sixteen bit data is placed in a buffer. Each buffer is defined to contain one or more sub-buffers. Rows of the sub-buffer are selectively interleaved with the results of the selective interleaving being again interleaved in a specific order. Successive interleavings create the transpose of the original sub-buffer.
Abstract: A system and method for providing a distributed debugger system for a distributed target computer application are disclosed wherein the programmer/developer of the application can be at one host machine and wherein the application being developed makes use of objects and object implementations which may be located on a different host machine which is unknown to the programmer/developer. The system and method provides solutions to problems which are encountered in trying to debug a new application which is associated with the use of objects in a widely distributed, object oriented, client-server system. In a distributed object environment, requests and replies are made through an Object Request Broker (ORB) that is aware of the locations and status of objects. One architecture which is suitable for implementing such an ORB is provided by the Common Object Request Broker Architecture (CORBA) specification.
Abstract: A class loader downloads objects and object viewers from remote computer nodes, and invokes locally stored object viewers to view objects. When a user selects an object to view, a conventional downloading of the referenced object is initiated. The class loader, however, utilizes data type information received at the beginning of the object downloading process to determine if a viewer for the referenced object is available on the user's workstation. If an appropriate view is not locally available, the class loader automatically locates an appropriate viewer on the server from which the object is being downloaded, or from any other appropriate server known to the user's workstation. The class loader downloads the located viewer and then invokes a program verification procedure to verify the integrity of the downloaded viewer before the viewer is executed.
Abstract: A method and apparatus for high speed signal path arbitration and transfer of a plurality of source signals to a destination signal path, is provided. An arbiter system includes an arbiter and a multiplexer. The multiplexer includes a plurality of n inputs each coupled to receive a source signal from one of a plurality of source signal paths and an output coupled to provide an output signal to the destination signal path. The multiplexer is controlled by a plurality of n select signal values received from the arbiter. The arbiter is coupled to receive a plurality of request signal values which prompt the arbiter to control the multiplexer to pass one of the source signals to the destination signal path. The multiplexer includes a plurality of n multiplexer signal paths each extending from one of n multiplexer inputs to the multiplexer output. Time characteristics of each of the n multiplexer signal paths are unequal.
Abstract: A circuit to reduce the power consumption of a microprocessor includes activity monitor circuitry to generate an activity signal in response to a low activity operational state of the microprocessor. A clock controller connected to the activity monitor circuitry produces a periodic clock gating signal from the activity signal. Clock gating circuits intermittently apply the internal clock signal to the microprocessor logic circuitry in response to the periodic clock gating signal.
Abstract: A system for providing a user or agent control over functions defined by an object in a target application. The object is a new type of object called a controllable object, which publishes its functions and for use by a control application. When the target application execution is commenced, it generates predefined controllable objects, and then execution of the control application is commenced. The control application obtains a handle on the controllable object, and then is able to set any of a number of predefined values in the controllable object, such as individual variables or parameters, ranges of values, a list of choices from which the user can select, and others. In this way, the user can manipulate, test and optimize the target application even during its execution, by virtue of the pre-programmed controllable object functions.
Type:
Grant
Filed:
July 18, 1997
Date of Patent:
September 29, 1998
Assignee:
Sun Microsystems, Inc.
Inventors:
David M. Bristor, Brian T. Lewis, Graham Hamilton
Abstract: A method for handling method calls in a client/server computer system includes the step of receiving at a server computer a method call generated by a client computer. The server computer then attempts to execute the method call and subsequently generates an exception. The exception is passed to the client computer. The client computer matches the exception to exceptions in an exception list stored in the client computer to obtain an exception object identifier. The exception object identifier is used to load exception code into the client computer. The exception code is then processed. Thus, the exception code need not be loaded at the time of generating the method call. Instead, it is only loaded when it is required at run time.
Type:
Grant
Filed:
October 6, 1995
Date of Patent:
September 29, 1998
Assignee:
Sun Microsystems, Inc.
Inventors:
Peter B. Kessler, Graham Hamilton, Jeffrey D. Nisewanger
Abstract: A method and system for providing an executable module having an address space for storing program data that is to reside in a read-only storage medium and an address space for storing program data that is to reside in a random access memory is herein described. The executable module represents Java classes that are structured for dynamic class loading. A static class loader is used to modify the class structure to accommodate static loading. The static class loader also identifies methods that contain unresolved symbolic references and data that varies during the execution of the module. These methods and data are identified in order to place them in the address space that resides in the random access memory. The static loader is beneficial in a distributed computing environment having a client computer that has little or no secondary storage thereby requiring applications to run entirely in random access memory.
Abstract: Small assembly code routines are inlined with source code prior to optimization processing in a compiler in a data processing system. Each assembly code routine is presented to the compiler in the form of a template having instructions and operands. Whenever a call to the template is detected by the compiler, the instructions and operands of the template are examined by the compiler to determine whether all instructions and operands in the template are recognizable by the compiler for optimization processing. If so, the assembly code template is virtualized by transforming physical registers to virtual registers, and the intermediate code form of the template is combined with the intermediate code form of the source code. This combined code is then subjected to optimization procedures in the compiler, and the result is used to generate the assembly code.
Abstract: A method and apparatus for managing relationships among objects in a distributed object environment includes a method and apparatus for determining whether two or more object references refer to identical objects; a method and apparatus for providing a unique identifier for an object; a method and apparatus for checking role types for the formation of relationships; and a method and apparatus for caching role and object locations in roles in a relationship. In the method and apparatus for determining whether two or more object references refer to the same object, a unique object identifier is compared to determine if the objects referred to by the object references are identical. The unique identifier is provided by concatenating information identifying the machine address of the process that created the object in addition to the process ID, the time of creation and a process counter.
Type:
Grant
Filed:
September 17, 1996
Date of Patent:
September 29, 1998
Assignee:
Sun Microsystems, Inc.
Inventors:
Bruce E. Martin, Jefferson A. Dinkins, Mark W. Hapner
Abstract: An image rescaling method utilizing a parallel processor is provided. The computer-implemented method includes the steps of loading multiple word components into a processor in one machine instruction, each word component associated with a pixel of an image; rescaling the multiple word components in parallel; and packing the rescaled multiple word components into an image buffer in one machine instruction. Additionally, a second set of multiple word components may be processed concurrently with the processing of a first set of multiple word components.
Abstract: An apparatus and method for processing display data in multi-pixel sections which also tracks and maps a cursor in single pixel increments is disclosed. A video buffer card receives display data and generates display control data for a multi-pixel section of display frame, and cursor display information including cursor enable information, cursor color selection information, cursor color and blending information, and X and Y cursor location information. Additionally, the current horizontal and vertical location of the multi-pixel section of the display data is tracked and used in combination with the cursor X and Y location information to calculate an offset that is used to replace certain portions of the display data with cursor color information. The video buffer card also supports a blending operation which provides a blend of the cursor foreground and background colors with the displayed image colors.
Type:
Grant
Filed:
October 19, 1994
Date of Patent:
September 29, 1998
Assignee:
Sun Microsystems, Inc.
Inventors:
Jim Weatherford, Brad W. Hoffert, Robert Stano, Shawn Storm, Andreas Bechtolshein