Patents Assigned to SUNEDISON
  • Patent number: 9490743
    Abstract: This disclosure generally relates to integrated grounding for solar modules and electrical wire management, and more specifically, to grounding clips and tabs that are integrated into solar module racking systems.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: November 8, 2016
    Assignee: SunEdison, Inc.
    Inventors: Charles Jonathan Reynolds, Morgan Davis Smith, Brian Gabriel Willkom, Christopher Thomas Needham
  • Patent number: 9487406
    Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: November 8, 2016
    Assignee: SunEdison, Inc.
    Inventors: Puneet Gupta, Henry F. Erk, Alexis Grabbe
  • Patent number: 9476141
    Abstract: A system for growing a crystal ingot from a melt is provided. The system includes a first crucible, a barrier, and a shield. The first crucible has a first base and a first sidewall forming a first cavity for containing the melt. The barrier is disposed within the first cavity of the first crucible to inhibit movement of the melt from outward of the barrier to inward of the barrier. The barrier extends from the first base to above the melt. The barrier has an inner arm and an outer arm extending upward to form a channel therebetween. The shield extends downward between the inner arm and the outer arm to inhibit passage of contaminants.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: October 25, 2016
    Assignee: SunEdison, Inc.
    Inventor: Tirumani Swaminathan
  • Patent number: 9459935
    Abstract: A computing device is configured to execute a first instance of a single-threaded script engine in a first thread associated with a first execution context, wherein the first instance of the single-threaded script engine accesses at least one shared script object through a first reference counted script base value object. The computing device is also configured to concurrently execute a second instance of the single-threaded script engine in a second thread_associated with a second execution context, wherein the second instance of the single-threaded script engine accesses the at least one shared script object through a second reference counted script base value object. The script engine does not switch between the execution contexts.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: October 4, 2016
    Assignee: SunEdison Semiconductor Limited
    Inventor: Benno Orschel
  • Publication number: 20160281260
    Abstract: An improved system based on the Czochralski process for continuous growth of a single crystal ingot comprises a low aspect ratio, large diameter, and substantially flat crucible, including an optional weir surrounding the crystal. The low aspect ratio crucible substantially eliminates convection currents and reduces oxygen content in a finished single crystal silicon ingot. A separate level controlled silicon pre-melting chamber provides a continuous source of molten silicon to the growth crucible advantageously eliminating the need for vertical travel and a crucible raising system during the crystal pulling process. A plurality of heaters beneath the crucible establish corresponding thermal zones across the melt. Thermal output of the heaters is individually controlled for providing an optimal thermal distribution across the melt and at the crystal/melt interface for improved crystal growth. Multiple crystal pulling chambers are provided for continuous processing and high throughput.
    Type: Application
    Filed: January 28, 2016
    Publication date: September 29, 2016
    Applicant: SunEdison, Inc.
    Inventor: David L. Bender
  • Patent number: 9452403
    Abstract: A method and apparatus for determining the fluidization quality of a fluidized bed reactor is disclosed. The method includes measuring pressure within the fluidized bed reactor to obtain a pressure signal. The pressure signal is then transformed using wavelet decomposition into higher-frequency details and lower-frequency approximations. The dominance of the various features is then calculated based on the energy of each feature in relation to the normalized wavelet energies. The fluidization quality of the fluidized bed reactor is then determined from a comparison over time of the calculated energies.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: September 27, 2016
    Assignee: SunEdison, Inc.
    Inventors: Jia Wei Chew, Satish Bhusarapu, Keith E. Weatherford
  • Patent number: 9401271
    Abstract: Apparatus and methods for wafer processes such as etching and chemical vapor deposition processes are disclosed. In some embodiments, the apparatus includes a susceptor and a ring disposed beneath the susceptor to influence a thickness of the deposited epitaxial layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 26, 2016
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: John Allen Pitney, Manabu Hamano
  • Patent number: 9394180
    Abstract: Production of polycrystalline silicon in a substantially closed-loop process is disclosed. The processes generally include decomposition of trichlorosilane produced from metallurgical grade silicon.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: July 19, 2016
    Assignee: SunEdison, Inc.
    Inventors: Satish Bhusarapu, Yue Huang, Puneet Gupta
  • Patent number: 9391380
    Abstract: An electrical connector/cable harness includes an electrically insulative housing and first and second passageways extending from a first end of the connector/cable harness to a second end thereof, first and second electrically conductive wires disposed in the passageways, respectively, wherein the passageways and the wires therein reverse their dispositions in the connector/cable harness such that at the second end of the connector/cable harness the two wires are disposed oppositely to their disposition at the first end of the connector/cable harness.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: July 12, 2016
    Assignee: SunEdison, Inc.
    Inventors: Ruel Davenport Little, Zachary Adam King
  • Patent number: 9384540
    Abstract: A method for measuring phase shift to detect irregularities of a surface is described. Additionally, a system for measuring phase shift to detect irregularities of a surface is provided. Further, a non-transitory computer-readable storage medium having computer-executable instructions embodied thereon is described. The computer-executable instructions are for measuring phase shift to detect irregularities of a surface.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: July 5, 2016
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventor: Benno Orschel
  • Patent number: 9355842
    Abstract: The invention generally related to a method for preparing a layer of graphene directly on the surface of a substrate, such as a semiconductor substrate. The layer of graphene may be formed in direct contact with the surface of the substrate, or an intervening layer of a material may be formed between the substrate surface and the graphene layer.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 31, 2016
    Assignees: SunEdison Semiconductor Limited (UEN201334164H), Kansas State University Research Foundation
    Inventors: Michael R. Seacrist, Vikas Berry, Phong Tuan Nguyen
  • Patent number: 9343533
    Abstract: The invention generally related to a method for preparing a layer of graphene directly on the surface of a semiconductor substrate. The method includes forming a carbon-containing layer on a front surface of a semiconductor substrate and depositing a metal film on the carbon layer. A thermal cycle degrades the carbon-containing layer, which forms graphene directly upon the semiconductor substrate upon cooling. In some embodiments, the carbon source is a carbon-containing gas, and the thermal cycle causes diffusion of carbon atoms into the metal film, which, upon cooling, segregate and precipitate into a layer of graphene directly on the semiconductor substrate.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: May 17, 2016
    Assignees: SunEdison Semiconductor Limited (UEN201334164H), Kansas State University Research Foundation
    Inventors: Michael R. Seacrist, Vikas Berry
  • Patent number: 9343379
    Abstract: This invention generally relates to a process for detecting grown-in-defects in a semiconductor silicon substrate. The process includes contacting a surface of the semiconductor silicon substrate with a gaseous acid in a reducing atmosphere at a temperature and duration sufficient to grow grown-in -defects disposed in the semiconductor silicon substrate to a size capable of being detected by an optical detection device.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: May 17, 2016
    Assignee: SunEdison Semiconductor Limited
    Inventors: Jeffrey L. Libbert, Lu Fei
  • Patent number: 9330014
    Abstract: A method and data-logging system are provided. The system includes a map-ahead thread configured to acquire blocks of private memory for storing data to be logged, the blocks of private memory being twice as large as the file page size, a master thread configured to write data to the blocks of private memory, in real-time and in full resolution, the data acquired during operation of a machine generating the data and written to the blocks of private memory in real-time, the machine including a controller including a processor communicatively coupled to a memory having processor instructions therein, and a write-behind thread configured to acquire pages of memory that are mapped to pages in a file, copy the data from the blocks of private memory to the acquired file-mapped blocks of memory.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: May 3, 2016
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Benno Orschel, Mike Wolfram
  • Patent number: 9328420
    Abstract: In one aspect, a system for depositing a layer on a substrate is provided. The system includes a processing chamber, a gas injecting port, a gas distribution plate, and a plug. The gas injecting port is disposed upstream from the processing chamber. The gas distribution plate is disposed between the gas injecting port and the processing chamber, and includes an elongate planar body and an array of holes therein. The plug is sized to be received within one of the holes, and includes an orifice therethrough for permitting the passage of gas. The plug is capable of being removably secured to the gas distribution plate within one of the holes.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 3, 2016
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: John Allen Pitney, Manabu Hamano
  • Patent number: 9317912
    Abstract: Methods and systems for use in detecting an air pocket in a single crystal material are described. One example method includes providing a matrix including a plurality of data units, the plurality of data units including image data related to a region of interest of the single crystal material; defining a first half and a second half of the matrix based on a first axis passing through the center of the matrix; determining, by a processor, a difference between each data unit of the first half and a corresponding data unit of the second half; calculating, by the processor, a first index value based on the determined differences; and identifying an air pocket within the single crystal material based on the first index value and a predetermined threshold.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: April 19, 2016
    Assignee: SunEdison Semiconductor Limited
    Inventor: John F. Valley
  • Patent number: 9297765
    Abstract: A gas decomposition reactor for the decomposition of a gas into a mixture of solid and gaseous by-products is disclosed. The gas decomposition reactor includes a reactor vessel, a Raman spectrometer, and a processor. The reactor vessel has an inlet for receiving inlet gas and an exhaust outlet for releasing exhaust gas. The Raman spectrometer is connected with the exhaust outlet for determining a chemical conversion within the reactor chamber and generating a corresponding signal. The processor is connected with the Raman spectrometer to receive the signal from the Raman spectrometer. The processor is capable of comparing the signal with a set of values and calculating differences between the signal and the set of values. The processor is connected with the inlet to regulate a flow of the inlet gas.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 29, 2016
    Assignee: SunEdison, Inc.
    Inventors: Alexis Grabbe, Pramatha Payra
  • Publication number: 20160068399
    Abstract: Methods for separating halosilanes that involve use of a distillation column having a partition that divides the column into portions for producing three product fractions are disclosed. Methods and systems for producing silane by disproportionation of halosilanes that use such columns and methods for producing polycrystalline silicon are also disclosed.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 10, 2016
    Applicant: SunEdison, Inc.
    Inventors: Sathy Ponnuswamy, Nageswara Reddy Kota, Satish Bhusarapu, Puneet Gupta
  • Patent number: 9281233
    Abstract: A method of preparing a monocrystalline donor substrate, the method comprising (a) implanting helium ions through the front surface of the monocrystalline donor substrate to an average depth D1 as measured from the front surface toward the central plane; (b) implanting hydrogen ions through the front surface of the monocrystalline donor substrate to an average depth D2 as measured from the front surface toward the central plane; and (c) annealing the monocrystalline donor substrate at a temperature sufficient to form a cleave plane in the monocrystalline donor substrate. The average depth D1 and the average depth D2 are within about 1000 angstroms.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: March 8, 2016
    Assignee: SunEdison Semiconductor Limited
    Inventors: Jeffrey L. Libbert, Michael John Ries
  • Patent number: 9272442
    Abstract: A method of aligning an ingot of semiconductor or solar-grade material with a mounting block includes supporting the ingot using adjustable supports, aligning a predetermined centerline of the ingot with a reference line using a laser, and attaching the mounting block to the ingot such that the predetermined centerline remains aligned with the reference line.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: March 1, 2016
    Assignee: SunEdison, Inc.
    Inventors: Dusan Krulj, John Michael Pogany